cfi_flash.c 63 KB

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  1. /*
  2. * (C) Copyright 2002-2004
  3. * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
  4. *
  5. * Copyright (C) 2003 Arabella Software Ltd.
  6. * Yuli Barcohen <yuli@arabellasw.com>
  7. *
  8. * Copyright (C) 2004
  9. * Ed Okerson
  10. *
  11. * Copyright (C) 2006
  12. * Tolunay Orkun <listmember@orkun.us>
  13. *
  14. * See file CREDITS for list of people who contributed to this
  15. * project.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation; either version 2 of
  20. * the License, or (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30. * MA 02111-1307 USA
  31. *
  32. */
  33. /* The DEBUG define must be before common to enable debugging */
  34. /* #define DEBUG */
  35. #include <common.h>
  36. #include <asm/processor.h>
  37. #include <asm/io.h>
  38. #include <asm/byteorder.h>
  39. #include <asm/unaligned.h>
  40. #include <environment.h>
  41. #include <mtd/cfi_flash.h>
  42. #include <watchdog.h>
  43. /*
  44. * This file implements a Common Flash Interface (CFI) driver for
  45. * U-Boot.
  46. *
  47. * The width of the port and the width of the chips are determined at
  48. * initialization. These widths are used to calculate the address for
  49. * access CFI data structures.
  50. *
  51. * References
  52. * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  53. * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  54. * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  55. * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  56. * AMD CFI Specification, Release 2.0 December 1, 2001
  57. * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  58. * Device IDs, Publication Number 25538 Revision A, November 8, 2001
  59. *
  60. * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  61. * reading and writing ... (yes there is such a Hardware).
  62. */
  63. static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  64. #ifdef CONFIG_FLASH_CFI_MTD
  65. static uint flash_verbose = 1;
  66. #else
  67. #define flash_verbose 1
  68. #endif
  69. flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
  70. /*
  71. * Check if chip width is defined. If not, start detecting with 8bit.
  72. */
  73. #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
  74. #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
  75. #endif
  76. /*
  77. * 0xffff is an undefined value for the configuration register. When
  78. * this value is returned, the configuration register shall not be
  79. * written at all (default mode).
  80. */
  81. static u16 cfi_flash_config_reg(int i)
  82. {
  83. #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  84. return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
  85. #else
  86. return 0xffff;
  87. #endif
  88. }
  89. #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
  90. int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
  91. #endif
  92. static phys_addr_t __cfi_flash_bank_addr(int i)
  93. {
  94. return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
  95. }
  96. phys_addr_t cfi_flash_bank_addr(int i)
  97. __attribute__((weak, alias("__cfi_flash_bank_addr")));
  98. static unsigned long __cfi_flash_bank_size(int i)
  99. {
  100. #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
  101. return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
  102. #else
  103. return 0;
  104. #endif
  105. }
  106. unsigned long cfi_flash_bank_size(int i)
  107. __attribute__((weak, alias("__cfi_flash_bank_size")));
  108. static void __flash_write8(u8 value, void *addr)
  109. {
  110. __raw_writeb(value, addr);
  111. }
  112. static void __flash_write16(u16 value, void *addr)
  113. {
  114. __raw_writew(value, addr);
  115. }
  116. static void __flash_write32(u32 value, void *addr)
  117. {
  118. __raw_writel(value, addr);
  119. }
  120. static void __flash_write64(u64 value, void *addr)
  121. {
  122. /* No architectures currently implement __raw_writeq() */
  123. *(volatile u64 *)addr = value;
  124. }
  125. static u8 __flash_read8(void *addr)
  126. {
  127. return __raw_readb(addr);
  128. }
  129. static u16 __flash_read16(void *addr)
  130. {
  131. return __raw_readw(addr);
  132. }
  133. static u32 __flash_read32(void *addr)
  134. {
  135. return __raw_readl(addr);
  136. }
  137. static u64 __flash_read64(void *addr)
  138. {
  139. /* No architectures currently implement __raw_readq() */
  140. return *(volatile u64 *)addr;
  141. }
  142. #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  143. void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
  144. void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
  145. void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
  146. void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
  147. u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
  148. u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
  149. u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
  150. u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
  151. #else
  152. #define flash_write8 __flash_write8
  153. #define flash_write16 __flash_write16
  154. #define flash_write32 __flash_write32
  155. #define flash_write64 __flash_write64
  156. #define flash_read8 __flash_read8
  157. #define flash_read16 __flash_read16
  158. #define flash_read32 __flash_read32
  159. #define flash_read64 __flash_read64
  160. #endif
  161. /*-----------------------------------------------------------------------
  162. */
  163. #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
  164. flash_info_t *flash_get_info(ulong base)
  165. {
  166. int i;
  167. flash_info_t *info;
  168. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
  169. info = &flash_info[i];
  170. if (info->size && info->start[0] <= base &&
  171. base <= info->start[0] + info->size - 1)
  172. return info;
  173. }
  174. return NULL;
  175. }
  176. #endif
  177. unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
  178. {
  179. if (sect != (info->sector_count - 1))
  180. return info->start[sect + 1] - info->start[sect];
  181. else
  182. return info->start[0] + info->size - info->start[sect];
  183. }
  184. /*-----------------------------------------------------------------------
  185. * create an address based on the offset and the port width
  186. */
  187. static inline void *
  188. flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
  189. {
  190. unsigned int byte_offset = offset * info->portwidth;
  191. return (void *)(info->start[sect] + byte_offset);
  192. }
  193. static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
  194. unsigned int offset, void *addr)
  195. {
  196. }
  197. /*-----------------------------------------------------------------------
  198. * make a proper sized command based on the port and chip widths
  199. */
  200. static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
  201. {
  202. int i;
  203. int cword_offset;
  204. int cp_offset;
  205. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  206. u32 cmd_le = cpu_to_le32(cmd);
  207. #endif
  208. uchar val;
  209. uchar *cp = (uchar *) cmdbuf;
  210. for (i = info->portwidth; i > 0; i--){
  211. cword_offset = (info->portwidth-i)%info->chipwidth;
  212. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  213. cp_offset = info->portwidth - i;
  214. val = *((uchar*)&cmd_le + cword_offset);
  215. #else
  216. cp_offset = i - 1;
  217. val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
  218. #endif
  219. cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
  220. }
  221. }
  222. #ifdef DEBUG
  223. /*-----------------------------------------------------------------------
  224. * Debug support
  225. */
  226. static void print_longlong (char *str, unsigned long long data)
  227. {
  228. int i;
  229. char *cp;
  230. cp = (char *) &data;
  231. for (i = 0; i < 8; i++)
  232. sprintf (&str[i * 2], "%2.2x", *cp++);
  233. }
  234. static void flash_printqry (struct cfi_qry *qry)
  235. {
  236. u8 *p = (u8 *)qry;
  237. int x, y;
  238. for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
  239. debug("%02x : ", x);
  240. for (y = 0; y < 16; y++)
  241. debug("%2.2x ", p[x + y]);
  242. debug(" ");
  243. for (y = 0; y < 16; y++) {
  244. unsigned char c = p[x + y];
  245. if (c >= 0x20 && c <= 0x7e)
  246. debug("%c", c);
  247. else
  248. debug(".");
  249. }
  250. debug("\n");
  251. }
  252. }
  253. #endif
  254. /*-----------------------------------------------------------------------
  255. * read a character at a port width address
  256. */
  257. static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
  258. {
  259. uchar *cp;
  260. uchar retval;
  261. cp = flash_map (info, 0, offset);
  262. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  263. retval = flash_read8(cp);
  264. #else
  265. retval = flash_read8(cp + info->portwidth - 1);
  266. #endif
  267. flash_unmap (info, 0, offset, cp);
  268. return retval;
  269. }
  270. /*-----------------------------------------------------------------------
  271. * read a word at a port width address, assume 16bit bus
  272. */
  273. static inline ushort flash_read_word (flash_info_t * info, uint offset)
  274. {
  275. ushort *addr, retval;
  276. addr = flash_map (info, 0, offset);
  277. retval = flash_read16 (addr);
  278. flash_unmap (info, 0, offset, addr);
  279. return retval;
  280. }
  281. /*-----------------------------------------------------------------------
  282. * read a long word by picking the least significant byte of each maximum
  283. * port size word. Swap for ppc format.
  284. */
  285. static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
  286. uint offset)
  287. {
  288. uchar *addr;
  289. ulong retval;
  290. #ifdef DEBUG
  291. int x;
  292. #endif
  293. addr = flash_map (info, sect, offset);
  294. #ifdef DEBUG
  295. debug ("long addr is at %p info->portwidth = %d\n", addr,
  296. info->portwidth);
  297. for (x = 0; x < 4 * info->portwidth; x++) {
  298. debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
  299. }
  300. #endif
  301. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  302. retval = ((flash_read8(addr) << 16) |
  303. (flash_read8(addr + info->portwidth) << 24) |
  304. (flash_read8(addr + 2 * info->portwidth)) |
  305. (flash_read8(addr + 3 * info->portwidth) << 8));
  306. #else
  307. retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
  308. (flash_read8(addr + info->portwidth - 1) << 16) |
  309. (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
  310. (flash_read8(addr + 3 * info->portwidth - 1)));
  311. #endif
  312. flash_unmap(info, sect, offset, addr);
  313. return retval;
  314. }
  315. /*
  316. * Write a proper sized command to the correct address
  317. */
  318. void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
  319. uint offset, u32 cmd)
  320. {
  321. void *addr;
  322. cfiword_t cword;
  323. addr = flash_map (info, sect, offset);
  324. flash_make_cmd (info, cmd, &cword);
  325. switch (info->portwidth) {
  326. case FLASH_CFI_8BIT:
  327. debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
  328. cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  329. flash_write8(cword.c, addr);
  330. break;
  331. case FLASH_CFI_16BIT:
  332. debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
  333. cmd, cword.w,
  334. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  335. flash_write16(cword.w, addr);
  336. break;
  337. case FLASH_CFI_32BIT:
  338. debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
  339. cmd, cword.l,
  340. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  341. flash_write32(cword.l, addr);
  342. break;
  343. case FLASH_CFI_64BIT:
  344. #ifdef DEBUG
  345. {
  346. char str[20];
  347. print_longlong (str, cword.ll);
  348. debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
  349. addr, cmd, str,
  350. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  351. }
  352. #endif
  353. flash_write64(cword.ll, addr);
  354. break;
  355. }
  356. /* Ensure all the instructions are fully finished */
  357. sync();
  358. flash_unmap(info, sect, offset, addr);
  359. }
  360. static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
  361. {
  362. flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
  363. flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
  364. }
  365. /*-----------------------------------------------------------------------
  366. */
  367. static int flash_isequal (flash_info_t * info, flash_sect_t sect,
  368. uint offset, uchar cmd)
  369. {
  370. void *addr;
  371. cfiword_t cword;
  372. int retval;
  373. addr = flash_map (info, sect, offset);
  374. flash_make_cmd (info, cmd, &cword);
  375. debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
  376. switch (info->portwidth) {
  377. case FLASH_CFI_8BIT:
  378. debug ("is= %x %x\n", flash_read8(addr), cword.c);
  379. retval = (flash_read8(addr) == cword.c);
  380. break;
  381. case FLASH_CFI_16BIT:
  382. debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
  383. retval = (flash_read16(addr) == cword.w);
  384. break;
  385. case FLASH_CFI_32BIT:
  386. debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
  387. retval = (flash_read32(addr) == cword.l);
  388. break;
  389. case FLASH_CFI_64BIT:
  390. #ifdef DEBUG
  391. {
  392. char str1[20];
  393. char str2[20];
  394. print_longlong (str1, flash_read64(addr));
  395. print_longlong (str2, cword.ll);
  396. debug ("is= %s %s\n", str1, str2);
  397. }
  398. #endif
  399. retval = (flash_read64(addr) == cword.ll);
  400. break;
  401. default:
  402. retval = 0;
  403. break;
  404. }
  405. flash_unmap(info, sect, offset, addr);
  406. return retval;
  407. }
  408. /*-----------------------------------------------------------------------
  409. */
  410. static int flash_isset (flash_info_t * info, flash_sect_t sect,
  411. uint offset, uchar cmd)
  412. {
  413. void *addr;
  414. cfiword_t cword;
  415. int retval;
  416. addr = flash_map (info, sect, offset);
  417. flash_make_cmd (info, cmd, &cword);
  418. switch (info->portwidth) {
  419. case FLASH_CFI_8BIT:
  420. retval = ((flash_read8(addr) & cword.c) == cword.c);
  421. break;
  422. case FLASH_CFI_16BIT:
  423. retval = ((flash_read16(addr) & cword.w) == cword.w);
  424. break;
  425. case FLASH_CFI_32BIT:
  426. retval = ((flash_read32(addr) & cword.l) == cword.l);
  427. break;
  428. case FLASH_CFI_64BIT:
  429. retval = ((flash_read64(addr) & cword.ll) == cword.ll);
  430. break;
  431. default:
  432. retval = 0;
  433. break;
  434. }
  435. flash_unmap(info, sect, offset, addr);
  436. return retval;
  437. }
  438. /*-----------------------------------------------------------------------
  439. */
  440. static int flash_toggle (flash_info_t * info, flash_sect_t sect,
  441. uint offset, uchar cmd)
  442. {
  443. void *addr;
  444. cfiword_t cword;
  445. int retval;
  446. addr = flash_map (info, sect, offset);
  447. flash_make_cmd (info, cmd, &cword);
  448. switch (info->portwidth) {
  449. case FLASH_CFI_8BIT:
  450. retval = flash_read8(addr) != flash_read8(addr);
  451. break;
  452. case FLASH_CFI_16BIT:
  453. retval = flash_read16(addr) != flash_read16(addr);
  454. break;
  455. case FLASH_CFI_32BIT:
  456. retval = flash_read32(addr) != flash_read32(addr);
  457. break;
  458. case FLASH_CFI_64BIT:
  459. retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
  460. (flash_read32(addr+4) != flash_read32(addr+4)) );
  461. break;
  462. default:
  463. retval = 0;
  464. break;
  465. }
  466. flash_unmap(info, sect, offset, addr);
  467. return retval;
  468. }
  469. /*
  470. * flash_is_busy - check to see if the flash is busy
  471. *
  472. * This routine checks the status of the chip and returns true if the
  473. * chip is busy.
  474. */
  475. static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
  476. {
  477. int retval;
  478. switch (info->vendor) {
  479. case CFI_CMDSET_INTEL_PROG_REGIONS:
  480. case CFI_CMDSET_INTEL_STANDARD:
  481. case CFI_CMDSET_INTEL_EXTENDED:
  482. retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
  483. break;
  484. case CFI_CMDSET_AMD_STANDARD:
  485. case CFI_CMDSET_AMD_EXTENDED:
  486. #ifdef CONFIG_FLASH_CFI_LEGACY
  487. case CFI_CMDSET_AMD_LEGACY:
  488. #endif
  489. retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
  490. break;
  491. default:
  492. retval = 0;
  493. }
  494. debug ("flash_is_busy: %d\n", retval);
  495. return retval;
  496. }
  497. /*-----------------------------------------------------------------------
  498. * wait for XSR.7 to be set. Time out with an error if it does not.
  499. * This routine does not set the flash to read-array mode.
  500. */
  501. static int flash_status_check (flash_info_t * info, flash_sect_t sector,
  502. ulong tout, char *prompt)
  503. {
  504. ulong start;
  505. #if CONFIG_SYS_HZ != 1000
  506. if ((ulong)CONFIG_SYS_HZ > 100000)
  507. tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
  508. else
  509. tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
  510. #endif
  511. /* Wait for command completion */
  512. #ifdef CONFIG_SYS_LOW_RES_TIMER
  513. reset_timer();
  514. #endif
  515. start = get_timer (0);
  516. WATCHDOG_RESET();
  517. while (flash_is_busy (info, sector)) {
  518. if (get_timer (start) > tout) {
  519. printf ("Flash %s timeout at address %lx data %lx\n",
  520. prompt, info->start[sector],
  521. flash_read_long (info, sector, 0));
  522. flash_write_cmd (info, sector, 0, info->cmd_reset);
  523. udelay(1);
  524. return ERR_TIMOUT;
  525. }
  526. udelay (1); /* also triggers watchdog */
  527. }
  528. return ERR_OK;
  529. }
  530. /*-----------------------------------------------------------------------
  531. * Wait for XSR.7 to be set, if it times out print an error, otherwise
  532. * do a full status check.
  533. *
  534. * This routine sets the flash to read-array mode.
  535. */
  536. static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
  537. ulong tout, char *prompt)
  538. {
  539. int retcode;
  540. retcode = flash_status_check (info, sector, tout, prompt);
  541. switch (info->vendor) {
  542. case CFI_CMDSET_INTEL_PROG_REGIONS:
  543. case CFI_CMDSET_INTEL_EXTENDED:
  544. case CFI_CMDSET_INTEL_STANDARD:
  545. if ((retcode != ERR_OK)
  546. && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
  547. retcode = ERR_INVAL;
  548. printf ("Flash %s error at address %lx\n", prompt,
  549. info->start[sector]);
  550. if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
  551. FLASH_STATUS_PSLBS)) {
  552. puts ("Command Sequence Error.\n");
  553. } else if (flash_isset (info, sector, 0,
  554. FLASH_STATUS_ECLBS)) {
  555. puts ("Block Erase Error.\n");
  556. retcode = ERR_NOT_ERASED;
  557. } else if (flash_isset (info, sector, 0,
  558. FLASH_STATUS_PSLBS)) {
  559. puts ("Locking Error\n");
  560. }
  561. if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
  562. puts ("Block locked.\n");
  563. retcode = ERR_PROTECTED;
  564. }
  565. if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
  566. puts ("Vpp Low Error.\n");
  567. }
  568. flash_write_cmd (info, sector, 0, info->cmd_reset);
  569. udelay(1);
  570. break;
  571. default:
  572. break;
  573. }
  574. return retcode;
  575. }
  576. static int use_flash_status_poll(flash_info_t *info)
  577. {
  578. #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
  579. if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
  580. info->vendor == CFI_CMDSET_AMD_STANDARD)
  581. return 1;
  582. #endif
  583. return 0;
  584. }
  585. static int flash_status_poll(flash_info_t *info, void *src, void *dst,
  586. ulong tout, char *prompt)
  587. {
  588. #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
  589. ulong start;
  590. int ready;
  591. #if CONFIG_SYS_HZ != 1000
  592. if ((ulong)CONFIG_SYS_HZ > 100000)
  593. tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
  594. else
  595. tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
  596. #endif
  597. /* Wait for command completion */
  598. #ifdef CONFIG_SYS_LOW_RES_TIMER
  599. reset_timer();
  600. #endif
  601. start = get_timer(0);
  602. WATCHDOG_RESET();
  603. while (1) {
  604. switch (info->portwidth) {
  605. case FLASH_CFI_8BIT:
  606. ready = flash_read8(dst) == flash_read8(src);
  607. break;
  608. case FLASH_CFI_16BIT:
  609. ready = flash_read16(dst) == flash_read16(src);
  610. break;
  611. case FLASH_CFI_32BIT:
  612. ready = flash_read32(dst) == flash_read32(src);
  613. break;
  614. case FLASH_CFI_64BIT:
  615. ready = flash_read64(dst) == flash_read64(src);
  616. break;
  617. default:
  618. ready = 0;
  619. break;
  620. }
  621. if (ready)
  622. break;
  623. if (get_timer(start) > tout) {
  624. printf("Flash %s timeout at address %lx data %lx\n",
  625. prompt, (ulong)dst, (ulong)flash_read8(dst));
  626. return ERR_TIMOUT;
  627. }
  628. udelay(1); /* also triggers watchdog */
  629. }
  630. #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
  631. return ERR_OK;
  632. }
  633. /*-----------------------------------------------------------------------
  634. */
  635. static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
  636. {
  637. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  638. unsigned short w;
  639. unsigned int l;
  640. unsigned long long ll;
  641. #endif
  642. switch (info->portwidth) {
  643. case FLASH_CFI_8BIT:
  644. cword->c = c;
  645. break;
  646. case FLASH_CFI_16BIT:
  647. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  648. w = c;
  649. w <<= 8;
  650. cword->w = (cword->w >> 8) | w;
  651. #else
  652. cword->w = (cword->w << 8) | c;
  653. #endif
  654. break;
  655. case FLASH_CFI_32BIT:
  656. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  657. l = c;
  658. l <<= 24;
  659. cword->l = (cword->l >> 8) | l;
  660. #else
  661. cword->l = (cword->l << 8) | c;
  662. #endif
  663. break;
  664. case FLASH_CFI_64BIT:
  665. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  666. ll = c;
  667. ll <<= 56;
  668. cword->ll = (cword->ll >> 8) | ll;
  669. #else
  670. cword->ll = (cword->ll << 8) | c;
  671. #endif
  672. break;
  673. }
  674. }
  675. /*
  676. * Loop through the sector table starting from the previously found sector.
  677. * Searches forwards or backwards, dependent on the passed address.
  678. */
  679. static flash_sect_t find_sector (flash_info_t * info, ulong addr)
  680. {
  681. static flash_sect_t saved_sector; /* previously found sector */
  682. static flash_info_t *saved_info; /* previously used flash bank */
  683. flash_sect_t sector = saved_sector;
  684. if ((info != saved_info) || (sector >= info->sector_count))
  685. sector = 0;
  686. while ((info->start[sector] < addr)
  687. && (sector < info->sector_count - 1))
  688. sector++;
  689. while ((info->start[sector] > addr) && (sector > 0))
  690. /*
  691. * also decrements the sector in case of an overshot
  692. * in the first loop
  693. */
  694. sector--;
  695. saved_sector = sector;
  696. saved_info = info;
  697. return sector;
  698. }
  699. /*-----------------------------------------------------------------------
  700. */
  701. static int flash_write_cfiword (flash_info_t * info, ulong dest,
  702. cfiword_t cword)
  703. {
  704. void *dstaddr = (void *)dest;
  705. int flag;
  706. flash_sect_t sect = 0;
  707. char sect_found = 0;
  708. /* Check if Flash is (sufficiently) erased */
  709. switch (info->portwidth) {
  710. case FLASH_CFI_8BIT:
  711. flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
  712. break;
  713. case FLASH_CFI_16BIT:
  714. flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
  715. break;
  716. case FLASH_CFI_32BIT:
  717. flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
  718. break;
  719. case FLASH_CFI_64BIT:
  720. flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
  721. break;
  722. default:
  723. flag = 0;
  724. break;
  725. }
  726. if (!flag)
  727. return ERR_NOT_ERASED;
  728. /* Disable interrupts which might cause a timeout here */
  729. flag = disable_interrupts ();
  730. switch (info->vendor) {
  731. case CFI_CMDSET_INTEL_PROG_REGIONS:
  732. case CFI_CMDSET_INTEL_EXTENDED:
  733. case CFI_CMDSET_INTEL_STANDARD:
  734. flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
  735. flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
  736. break;
  737. case CFI_CMDSET_AMD_EXTENDED:
  738. case CFI_CMDSET_AMD_STANDARD:
  739. sect = find_sector(info, dest);
  740. flash_unlock_seq (info, sect);
  741. flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
  742. sect_found = 1;
  743. break;
  744. #ifdef CONFIG_FLASH_CFI_LEGACY
  745. case CFI_CMDSET_AMD_LEGACY:
  746. sect = find_sector(info, dest);
  747. flash_unlock_seq (info, 0);
  748. flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
  749. sect_found = 1;
  750. break;
  751. #endif
  752. }
  753. switch (info->portwidth) {
  754. case FLASH_CFI_8BIT:
  755. flash_write8(cword.c, dstaddr);
  756. break;
  757. case FLASH_CFI_16BIT:
  758. flash_write16(cword.w, dstaddr);
  759. break;
  760. case FLASH_CFI_32BIT:
  761. flash_write32(cword.l, dstaddr);
  762. break;
  763. case FLASH_CFI_64BIT:
  764. flash_write64(cword.ll, dstaddr);
  765. break;
  766. }
  767. /* re-enable interrupts if necessary */
  768. if (flag)
  769. enable_interrupts ();
  770. if (!sect_found)
  771. sect = find_sector (info, dest);
  772. if (use_flash_status_poll(info))
  773. return flash_status_poll(info, &cword, dstaddr,
  774. info->write_tout, "write");
  775. else
  776. return flash_full_status_check(info, sect,
  777. info->write_tout, "write");
  778. }
  779. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  780. static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
  781. int len)
  782. {
  783. flash_sect_t sector;
  784. int cnt;
  785. int retcode;
  786. void *src = cp;
  787. void *dst = (void *)dest;
  788. void *dst2 = dst;
  789. int flag = 1;
  790. uint offset = 0;
  791. unsigned int shift;
  792. uchar write_cmd;
  793. switch (info->portwidth) {
  794. case FLASH_CFI_8BIT:
  795. shift = 0;
  796. break;
  797. case FLASH_CFI_16BIT:
  798. shift = 1;
  799. break;
  800. case FLASH_CFI_32BIT:
  801. shift = 2;
  802. break;
  803. case FLASH_CFI_64BIT:
  804. shift = 3;
  805. break;
  806. default:
  807. retcode = ERR_INVAL;
  808. goto out_unmap;
  809. }
  810. cnt = len >> shift;
  811. while ((cnt-- > 0) && (flag == 1)) {
  812. switch (info->portwidth) {
  813. case FLASH_CFI_8BIT:
  814. flag = ((flash_read8(dst2) & flash_read8(src)) ==
  815. flash_read8(src));
  816. src += 1, dst2 += 1;
  817. break;
  818. case FLASH_CFI_16BIT:
  819. flag = ((flash_read16(dst2) & flash_read16(src)) ==
  820. flash_read16(src));
  821. src += 2, dst2 += 2;
  822. break;
  823. case FLASH_CFI_32BIT:
  824. flag = ((flash_read32(dst2) & flash_read32(src)) ==
  825. flash_read32(src));
  826. src += 4, dst2 += 4;
  827. break;
  828. case FLASH_CFI_64BIT:
  829. flag = ((flash_read64(dst2) & flash_read64(src)) ==
  830. flash_read64(src));
  831. src += 8, dst2 += 8;
  832. break;
  833. }
  834. }
  835. if (!flag) {
  836. retcode = ERR_NOT_ERASED;
  837. goto out_unmap;
  838. }
  839. src = cp;
  840. sector = find_sector (info, dest);
  841. switch (info->vendor) {
  842. case CFI_CMDSET_INTEL_PROG_REGIONS:
  843. case CFI_CMDSET_INTEL_STANDARD:
  844. case CFI_CMDSET_INTEL_EXTENDED:
  845. write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
  846. FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
  847. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  848. flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
  849. flash_write_cmd (info, sector, 0, write_cmd);
  850. retcode = flash_status_check (info, sector,
  851. info->buffer_write_tout,
  852. "write to buffer");
  853. if (retcode == ERR_OK) {
  854. /* reduce the number of loops by the width of
  855. * the port */
  856. cnt = len >> shift;
  857. flash_write_cmd (info, sector, 0, cnt - 1);
  858. while (cnt-- > 0) {
  859. switch (info->portwidth) {
  860. case FLASH_CFI_8BIT:
  861. flash_write8(flash_read8(src), dst);
  862. src += 1, dst += 1;
  863. break;
  864. case FLASH_CFI_16BIT:
  865. flash_write16(flash_read16(src), dst);
  866. src += 2, dst += 2;
  867. break;
  868. case FLASH_CFI_32BIT:
  869. flash_write32(flash_read32(src), dst);
  870. src += 4, dst += 4;
  871. break;
  872. case FLASH_CFI_64BIT:
  873. flash_write64(flash_read64(src), dst);
  874. src += 8, dst += 8;
  875. break;
  876. default:
  877. retcode = ERR_INVAL;
  878. goto out_unmap;
  879. }
  880. }
  881. flash_write_cmd (info, sector, 0,
  882. FLASH_CMD_WRITE_BUFFER_CONFIRM);
  883. retcode = flash_full_status_check (
  884. info, sector, info->buffer_write_tout,
  885. "buffer write");
  886. }
  887. break;
  888. case CFI_CMDSET_AMD_STANDARD:
  889. case CFI_CMDSET_AMD_EXTENDED:
  890. flash_unlock_seq(info,0);
  891. #ifdef CONFIG_FLASH_SPANSION_S29WS_N
  892. offset = ((unsigned long)dst - info->start[sector]) >> shift;
  893. #endif
  894. flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
  895. cnt = len >> shift;
  896. flash_write_cmd(info, sector, offset, cnt - 1);
  897. switch (info->portwidth) {
  898. case FLASH_CFI_8BIT:
  899. while (cnt-- > 0) {
  900. flash_write8(flash_read8(src), dst);
  901. src += 1, dst += 1;
  902. }
  903. break;
  904. case FLASH_CFI_16BIT:
  905. while (cnt-- > 0) {
  906. flash_write16(flash_read16(src), dst);
  907. src += 2, dst += 2;
  908. }
  909. break;
  910. case FLASH_CFI_32BIT:
  911. while (cnt-- > 0) {
  912. flash_write32(flash_read32(src), dst);
  913. src += 4, dst += 4;
  914. }
  915. break;
  916. case FLASH_CFI_64BIT:
  917. while (cnt-- > 0) {
  918. flash_write64(flash_read64(src), dst);
  919. src += 8, dst += 8;
  920. }
  921. break;
  922. default:
  923. retcode = ERR_INVAL;
  924. goto out_unmap;
  925. }
  926. flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
  927. if (use_flash_status_poll(info))
  928. retcode = flash_status_poll(info, src - (1 << shift),
  929. dst - (1 << shift),
  930. info->buffer_write_tout,
  931. "buffer write");
  932. else
  933. retcode = flash_full_status_check(info, sector,
  934. info->buffer_write_tout,
  935. "buffer write");
  936. break;
  937. default:
  938. debug ("Unknown Command Set\n");
  939. retcode = ERR_INVAL;
  940. break;
  941. }
  942. out_unmap:
  943. return retcode;
  944. }
  945. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  946. /*-----------------------------------------------------------------------
  947. */
  948. int flash_erase (flash_info_t * info, int s_first, int s_last)
  949. {
  950. int rcode = 0;
  951. int prot;
  952. flash_sect_t sect;
  953. int st;
  954. if (info->flash_id != FLASH_MAN_CFI) {
  955. puts ("Can't erase unknown flash type - aborted\n");
  956. return 1;
  957. }
  958. if ((s_first < 0) || (s_first > s_last)) {
  959. puts ("- no sectors to erase\n");
  960. return 1;
  961. }
  962. prot = 0;
  963. for (sect = s_first; sect <= s_last; ++sect) {
  964. if (info->protect[sect]) {
  965. prot++;
  966. }
  967. }
  968. if (prot) {
  969. printf ("- Warning: %d protected sectors will not be erased!\n",
  970. prot);
  971. } else if (flash_verbose) {
  972. putc ('\n');
  973. }
  974. for (sect = s_first; sect <= s_last; sect++) {
  975. if (ctrlc()) {
  976. printf("\n");
  977. return 1;
  978. }
  979. if (info->protect[sect] == 0) { /* not protected */
  980. #ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
  981. int k;
  982. int size;
  983. int erased;
  984. u32 *flash;
  985. /*
  986. * Check if whole sector is erased
  987. */
  988. size = flash_sector_size(info, sect);
  989. erased = 1;
  990. flash = (u32 *)info->start[sect];
  991. /* divide by 4 for longword access */
  992. size = size >> 2;
  993. for (k = 0; k < size; k++) {
  994. if (flash_read32(flash++) != 0xffffffff) {
  995. erased = 0;
  996. break;
  997. }
  998. }
  999. if (erased) {
  1000. if (flash_verbose)
  1001. putc(',');
  1002. continue;
  1003. }
  1004. #endif
  1005. switch (info->vendor) {
  1006. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1007. case CFI_CMDSET_INTEL_STANDARD:
  1008. case CFI_CMDSET_INTEL_EXTENDED:
  1009. flash_write_cmd (info, sect, 0,
  1010. FLASH_CMD_CLEAR_STATUS);
  1011. flash_write_cmd (info, sect, 0,
  1012. FLASH_CMD_BLOCK_ERASE);
  1013. flash_write_cmd (info, sect, 0,
  1014. FLASH_CMD_ERASE_CONFIRM);
  1015. break;
  1016. case CFI_CMDSET_AMD_STANDARD:
  1017. case CFI_CMDSET_AMD_EXTENDED:
  1018. flash_unlock_seq (info, sect);
  1019. flash_write_cmd (info, sect,
  1020. info->addr_unlock1,
  1021. AMD_CMD_ERASE_START);
  1022. flash_unlock_seq (info, sect);
  1023. flash_write_cmd (info, sect, 0,
  1024. info->cmd_erase_sector);
  1025. break;
  1026. #ifdef CONFIG_FLASH_CFI_LEGACY
  1027. case CFI_CMDSET_AMD_LEGACY:
  1028. flash_unlock_seq (info, 0);
  1029. flash_write_cmd (info, 0, info->addr_unlock1,
  1030. AMD_CMD_ERASE_START);
  1031. flash_unlock_seq (info, 0);
  1032. flash_write_cmd (info, sect, 0,
  1033. AMD_CMD_ERASE_SECTOR);
  1034. break;
  1035. #endif
  1036. default:
  1037. debug ("Unkown flash vendor %d\n",
  1038. info->vendor);
  1039. break;
  1040. }
  1041. if (use_flash_status_poll(info)) {
  1042. cfiword_t cword;
  1043. void *dest;
  1044. cword.ll = 0xffffffffffffffffULL;
  1045. dest = flash_map(info, sect, 0);
  1046. st = flash_status_poll(info, &cword, dest,
  1047. info->erase_blk_tout, "erase");
  1048. flash_unmap(info, sect, 0, dest);
  1049. } else
  1050. st = flash_full_status_check(info, sect,
  1051. info->erase_blk_tout,
  1052. "erase");
  1053. if (st)
  1054. rcode = 1;
  1055. else if (flash_verbose)
  1056. putc ('.');
  1057. }
  1058. }
  1059. if (flash_verbose)
  1060. puts (" done\n");
  1061. return rcode;
  1062. }
  1063. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  1064. static int sector_erased(flash_info_t *info, int i)
  1065. {
  1066. int k;
  1067. int size;
  1068. u32 *flash;
  1069. /*
  1070. * Check if whole sector is erased
  1071. */
  1072. size = flash_sector_size(info, i);
  1073. flash = (u32 *)info->start[i];
  1074. /* divide by 4 for longword access */
  1075. size = size >> 2;
  1076. for (k = 0; k < size; k++) {
  1077. if (flash_read32(flash++) != 0xffffffff)
  1078. return 0; /* not erased */
  1079. }
  1080. return 1; /* erased */
  1081. }
  1082. #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
  1083. void flash_print_info (flash_info_t * info)
  1084. {
  1085. int i;
  1086. if (info->flash_id != FLASH_MAN_CFI) {
  1087. puts ("missing or unknown FLASH type\n");
  1088. return;
  1089. }
  1090. printf ("%s flash (%d x %d)",
  1091. info->name,
  1092. (info->portwidth << 3), (info->chipwidth << 3));
  1093. if (info->size < 1024*1024)
  1094. printf (" Size: %ld kB in %d Sectors\n",
  1095. info->size >> 10, info->sector_count);
  1096. else
  1097. printf (" Size: %ld MB in %d Sectors\n",
  1098. info->size >> 20, info->sector_count);
  1099. printf (" ");
  1100. switch (info->vendor) {
  1101. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1102. printf ("Intel Prog Regions");
  1103. break;
  1104. case CFI_CMDSET_INTEL_STANDARD:
  1105. printf ("Intel Standard");
  1106. break;
  1107. case CFI_CMDSET_INTEL_EXTENDED:
  1108. printf ("Intel Extended");
  1109. break;
  1110. case CFI_CMDSET_AMD_STANDARD:
  1111. printf ("AMD Standard");
  1112. break;
  1113. case CFI_CMDSET_AMD_EXTENDED:
  1114. printf ("AMD Extended");
  1115. break;
  1116. #ifdef CONFIG_FLASH_CFI_LEGACY
  1117. case CFI_CMDSET_AMD_LEGACY:
  1118. printf ("AMD Legacy");
  1119. break;
  1120. #endif
  1121. default:
  1122. printf ("Unknown (%d)", info->vendor);
  1123. break;
  1124. }
  1125. printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
  1126. info->manufacturer_id);
  1127. printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
  1128. info->device_id);
  1129. if ((info->device_id & 0xff) == 0x7E) {
  1130. printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
  1131. info->device_id2);
  1132. }
  1133. if ((info->vendor == CFI_CMDSET_AMD_STANDARD) && (info->legacy_unlock))
  1134. printf("\n Advanced Sector Protection (PPB) enabled");
  1135. printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
  1136. info->erase_blk_tout,
  1137. info->write_tout);
  1138. if (info->buffer_size > 1) {
  1139. printf (" Buffer write timeout: %ld ms, "
  1140. "buffer size: %d bytes\n",
  1141. info->buffer_write_tout,
  1142. info->buffer_size);
  1143. }
  1144. puts ("\n Sector Start Addresses:");
  1145. for (i = 0; i < info->sector_count; ++i) {
  1146. if (ctrlc())
  1147. break;
  1148. if ((i % 5) == 0)
  1149. putc('\n');
  1150. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  1151. /* print empty and read-only info */
  1152. printf (" %08lX %c %s ",
  1153. info->start[i],
  1154. sector_erased(info, i) ? 'E' : ' ',
  1155. info->protect[i] ? "RO" : " ");
  1156. #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
  1157. printf (" %08lX %s ",
  1158. info->start[i],
  1159. info->protect[i] ? "RO" : " ");
  1160. #endif
  1161. }
  1162. putc ('\n');
  1163. return;
  1164. }
  1165. /*-----------------------------------------------------------------------
  1166. * This is used in a few places in write_buf() to show programming
  1167. * progress. Making it a function is nasty because it needs to do side
  1168. * effect updates to digit and dots. Repeated code is nasty too, so
  1169. * we define it once here.
  1170. */
  1171. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1172. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
  1173. if (flash_verbose) { \
  1174. dots -= dots_sub; \
  1175. if ((scale > 0) && (dots <= 0)) { \
  1176. if ((digit % 5) == 0) \
  1177. printf ("%d", digit / 5); \
  1178. else \
  1179. putc ('.'); \
  1180. digit--; \
  1181. dots += scale; \
  1182. } \
  1183. }
  1184. #else
  1185. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
  1186. #endif
  1187. /*-----------------------------------------------------------------------
  1188. * Copy memory to flash, returns:
  1189. * 0 - OK
  1190. * 1 - write timeout
  1191. * 2 - Flash not erased
  1192. */
  1193. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
  1194. {
  1195. ulong wp;
  1196. uchar *p;
  1197. int aln;
  1198. cfiword_t cword;
  1199. int i, rc;
  1200. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1201. int buffered_size;
  1202. #endif
  1203. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1204. int digit = CONFIG_FLASH_SHOW_PROGRESS;
  1205. int scale = 0;
  1206. int dots = 0;
  1207. /*
  1208. * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
  1209. */
  1210. if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
  1211. scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
  1212. CONFIG_FLASH_SHOW_PROGRESS);
  1213. }
  1214. #endif
  1215. /* get lower aligned address */
  1216. wp = (addr & ~(info->portwidth - 1));
  1217. /* handle unaligned start */
  1218. if ((aln = addr - wp) != 0) {
  1219. cword.l = 0;
  1220. p = (uchar *)wp;
  1221. for (i = 0; i < aln; ++i)
  1222. flash_add_byte (info, &cword, flash_read8(p + i));
  1223. for (; (i < info->portwidth) && (cnt > 0); i++) {
  1224. flash_add_byte (info, &cword, *src++);
  1225. cnt--;
  1226. }
  1227. for (; (cnt == 0) && (i < info->portwidth); ++i)
  1228. flash_add_byte (info, &cword, flash_read8(p + i));
  1229. rc = flash_write_cfiword (info, wp, cword);
  1230. if (rc != 0)
  1231. return rc;
  1232. wp += i;
  1233. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1234. }
  1235. /* handle the aligned part */
  1236. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1237. buffered_size = (info->portwidth / info->chipwidth);
  1238. buffered_size *= info->buffer_size;
  1239. while (cnt >= info->portwidth) {
  1240. /* prohibit buffer write when buffer_size is 1 */
  1241. if (info->buffer_size == 1) {
  1242. cword.l = 0;
  1243. for (i = 0; i < info->portwidth; i++)
  1244. flash_add_byte (info, &cword, *src++);
  1245. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1246. return rc;
  1247. wp += info->portwidth;
  1248. cnt -= info->portwidth;
  1249. continue;
  1250. }
  1251. /* write buffer until next buffered_size aligned boundary */
  1252. i = buffered_size - (wp % buffered_size);
  1253. if (i > cnt)
  1254. i = cnt;
  1255. if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
  1256. return rc;
  1257. i -= i & (info->portwidth - 1);
  1258. wp += i;
  1259. src += i;
  1260. cnt -= i;
  1261. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1262. /* Only check every once in a while */
  1263. if ((cnt & 0xFFFF) < buffered_size && ctrlc())
  1264. return ERR_ABORTED;
  1265. }
  1266. #else
  1267. while (cnt >= info->portwidth) {
  1268. cword.l = 0;
  1269. for (i = 0; i < info->portwidth; i++) {
  1270. flash_add_byte (info, &cword, *src++);
  1271. }
  1272. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1273. return rc;
  1274. wp += info->portwidth;
  1275. cnt -= info->portwidth;
  1276. FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
  1277. /* Only check every once in a while */
  1278. if ((cnt & 0xFFFF) < info->portwidth && ctrlc())
  1279. return ERR_ABORTED;
  1280. }
  1281. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  1282. if (cnt == 0) {
  1283. return (0);
  1284. }
  1285. /*
  1286. * handle unaligned tail bytes
  1287. */
  1288. cword.l = 0;
  1289. p = (uchar *)wp;
  1290. for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
  1291. flash_add_byte (info, &cword, *src++);
  1292. --cnt;
  1293. }
  1294. for (; i < info->portwidth; ++i)
  1295. flash_add_byte (info, &cword, flash_read8(p + i));
  1296. return flash_write_cfiword (info, wp, cword);
  1297. }
  1298. static inline int manufact_match(flash_info_t *info, u32 manu)
  1299. {
  1300. return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16);
  1301. }
  1302. /*-----------------------------------------------------------------------
  1303. */
  1304. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1305. static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
  1306. {
  1307. if (manufact_match(info, INTEL_MANUFACT)
  1308. && info->device_id == NUMONYX_256MBIT) {
  1309. /*
  1310. * see errata called
  1311. * "Numonyx Axcell P33/P30 Specification Update" :)
  1312. */
  1313. flash_write_cmd(info, sector, 0, FLASH_CMD_READ_ID);
  1314. if (!flash_isequal(info, sector, FLASH_OFFSET_PROTECT,
  1315. prot)) {
  1316. /*
  1317. * cmd must come before FLASH_CMD_PROTECT + 20us
  1318. * Disable interrupts which might cause a timeout here.
  1319. */
  1320. int flag = disable_interrupts();
  1321. unsigned short cmd;
  1322. if (prot)
  1323. cmd = FLASH_CMD_PROTECT_SET;
  1324. else
  1325. cmd = FLASH_CMD_PROTECT_CLEAR;
  1326. flash_write_cmd(info, sector, 0,
  1327. FLASH_CMD_PROTECT);
  1328. flash_write_cmd(info, sector, 0, cmd);
  1329. /* re-enable interrupts if necessary */
  1330. if (flag)
  1331. enable_interrupts();
  1332. }
  1333. return 1;
  1334. }
  1335. return 0;
  1336. }
  1337. int flash_real_protect (flash_info_t * info, long sector, int prot)
  1338. {
  1339. int retcode = 0;
  1340. switch (info->vendor) {
  1341. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1342. case CFI_CMDSET_INTEL_STANDARD:
  1343. case CFI_CMDSET_INTEL_EXTENDED:
  1344. if (!cfi_protect_bugfix(info, sector, prot)) {
  1345. flash_write_cmd(info, sector, 0,
  1346. FLASH_CMD_CLEAR_STATUS);
  1347. flash_write_cmd(info, sector, 0,
  1348. FLASH_CMD_PROTECT);
  1349. if (prot)
  1350. flash_write_cmd(info, sector, 0,
  1351. FLASH_CMD_PROTECT_SET);
  1352. else
  1353. flash_write_cmd(info, sector, 0,
  1354. FLASH_CMD_PROTECT_CLEAR);
  1355. }
  1356. break;
  1357. case CFI_CMDSET_AMD_EXTENDED:
  1358. case CFI_CMDSET_AMD_STANDARD:
  1359. /* U-Boot only checks the first byte */
  1360. if (manufact_match(info, ATM_MANUFACT)) {
  1361. if (prot) {
  1362. flash_unlock_seq (info, 0);
  1363. flash_write_cmd (info, 0,
  1364. info->addr_unlock1,
  1365. ATM_CMD_SOFTLOCK_START);
  1366. flash_unlock_seq (info, 0);
  1367. flash_write_cmd (info, sector, 0,
  1368. ATM_CMD_LOCK_SECT);
  1369. } else {
  1370. flash_write_cmd (info, 0,
  1371. info->addr_unlock1,
  1372. AMD_CMD_UNLOCK_START);
  1373. if (info->device_id == ATM_ID_BV6416)
  1374. flash_write_cmd (info, sector,
  1375. 0, ATM_CMD_UNLOCK_SECT);
  1376. }
  1377. }
  1378. if (info->legacy_unlock) {
  1379. int flag = disable_interrupts();
  1380. int lock_flag;
  1381. flash_unlock_seq(info, 0);
  1382. flash_write_cmd(info, 0, info->addr_unlock1,
  1383. AMD_CMD_SET_PPB_ENTRY);
  1384. lock_flag = flash_isset(info, sector, 0, 0x01);
  1385. if (prot) {
  1386. if (lock_flag) {
  1387. flash_write_cmd(info, sector, 0,
  1388. AMD_CMD_PPB_LOCK_BC1);
  1389. flash_write_cmd(info, sector, 0,
  1390. AMD_CMD_PPB_LOCK_BC2);
  1391. }
  1392. debug("sector %ld %slocked\n", sector,
  1393. lock_flag ? "" : "already ");
  1394. } else {
  1395. if (!lock_flag) {
  1396. debug("unlock %ld\n", sector);
  1397. flash_write_cmd(info, 0, 0,
  1398. AMD_CMD_PPB_UNLOCK_BC1);
  1399. flash_write_cmd(info, 0, 0,
  1400. AMD_CMD_PPB_UNLOCK_BC2);
  1401. }
  1402. debug("sector %ld %sunlocked\n", sector,
  1403. !lock_flag ? "" : "already ");
  1404. }
  1405. if (flag)
  1406. enable_interrupts();
  1407. if (flash_status_check(info, sector,
  1408. info->erase_blk_tout,
  1409. prot ? "protect" : "unprotect"))
  1410. printf("status check error\n");
  1411. flash_write_cmd(info, 0, 0,
  1412. AMD_CMD_SET_PPB_EXIT_BC1);
  1413. flash_write_cmd(info, 0, 0,
  1414. AMD_CMD_SET_PPB_EXIT_BC2);
  1415. }
  1416. break;
  1417. #ifdef CONFIG_FLASH_CFI_LEGACY
  1418. case CFI_CMDSET_AMD_LEGACY:
  1419. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  1420. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
  1421. if (prot)
  1422. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
  1423. else
  1424. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
  1425. #endif
  1426. };
  1427. /*
  1428. * Flash needs to be in status register read mode for
  1429. * flash_full_status_check() to work correctly
  1430. */
  1431. flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
  1432. if ((retcode =
  1433. flash_full_status_check (info, sector, info->erase_blk_tout,
  1434. prot ? "protect" : "unprotect")) == 0) {
  1435. info->protect[sector] = prot;
  1436. /*
  1437. * On some of Intel's flash chips (marked via legacy_unlock)
  1438. * unprotect unprotects all locking.
  1439. */
  1440. if ((prot == 0) && (info->legacy_unlock)) {
  1441. flash_sect_t i;
  1442. for (i = 0; i < info->sector_count; i++) {
  1443. if (info->protect[i])
  1444. flash_real_protect (info, i, 1);
  1445. }
  1446. }
  1447. }
  1448. return retcode;
  1449. }
  1450. /*-----------------------------------------------------------------------
  1451. * flash_read_user_serial - read the OneTimeProgramming cells
  1452. */
  1453. void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
  1454. int len)
  1455. {
  1456. uchar *src;
  1457. uchar *dst;
  1458. dst = buffer;
  1459. src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
  1460. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1461. memcpy (dst, src + offset, len);
  1462. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1463. udelay(1);
  1464. flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
  1465. }
  1466. /*
  1467. * flash_read_factory_serial - read the device Id from the protection area
  1468. */
  1469. void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
  1470. int len)
  1471. {
  1472. uchar *src;
  1473. src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
  1474. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1475. memcpy (buffer, src + offset, len);
  1476. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1477. udelay(1);
  1478. flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
  1479. }
  1480. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  1481. /*-----------------------------------------------------------------------
  1482. * Reverse the order of the erase regions in the CFI QRY structure.
  1483. * This is needed for chips that are either a) correctly detected as
  1484. * top-boot, or b) buggy.
  1485. */
  1486. static void cfi_reverse_geometry(struct cfi_qry *qry)
  1487. {
  1488. unsigned int i, j;
  1489. u32 tmp;
  1490. for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
  1491. tmp = get_unaligned(&(qry->erase_region_info[i]));
  1492. put_unaligned(get_unaligned(&(qry->erase_region_info[j])),
  1493. &(qry->erase_region_info[i]));
  1494. put_unaligned(tmp, &(qry->erase_region_info[j]));
  1495. }
  1496. }
  1497. /*-----------------------------------------------------------------------
  1498. * read jedec ids from device and set corresponding fields in info struct
  1499. *
  1500. * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
  1501. *
  1502. */
  1503. static void cmdset_intel_read_jedec_ids(flash_info_t *info)
  1504. {
  1505. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1506. udelay(1);
  1507. flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
  1508. udelay(1000); /* some flash are slow to respond */
  1509. info->manufacturer_id = flash_read_uchar (info,
  1510. FLASH_OFFSET_MANUFACTURER_ID);
  1511. info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
  1512. flash_read_word (info, FLASH_OFFSET_DEVICE_ID) :
  1513. flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID);
  1514. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1515. }
  1516. static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
  1517. {
  1518. info->cmd_reset = FLASH_CMD_RESET;
  1519. cmdset_intel_read_jedec_ids(info);
  1520. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1521. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1522. /* read legacy lock/unlock bit from intel flash */
  1523. if (info->ext_addr) {
  1524. info->legacy_unlock = flash_read_uchar (info,
  1525. info->ext_addr + 5) & 0x08;
  1526. }
  1527. #endif
  1528. return 0;
  1529. }
  1530. static void cmdset_amd_read_jedec_ids(flash_info_t *info)
  1531. {
  1532. ushort bankId = 0;
  1533. uchar manuId;
  1534. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1535. flash_unlock_seq(info, 0);
  1536. flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
  1537. udelay(1000); /* some flash are slow to respond */
  1538. manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
  1539. /* JEDEC JEP106Z specifies ID codes up to bank 7 */
  1540. while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
  1541. bankId += 0x100;
  1542. manuId = flash_read_uchar (info,
  1543. bankId | FLASH_OFFSET_MANUFACTURER_ID);
  1544. }
  1545. info->manufacturer_id = manuId;
  1546. switch (info->chipwidth){
  1547. case FLASH_CFI_8BIT:
  1548. info->device_id = flash_read_uchar (info,
  1549. FLASH_OFFSET_DEVICE_ID);
  1550. if (info->device_id == 0x7E) {
  1551. /* AMD 3-byte (expanded) device ids */
  1552. info->device_id2 = flash_read_uchar (info,
  1553. FLASH_OFFSET_DEVICE_ID2);
  1554. info->device_id2 <<= 8;
  1555. info->device_id2 |= flash_read_uchar (info,
  1556. FLASH_OFFSET_DEVICE_ID3);
  1557. }
  1558. break;
  1559. case FLASH_CFI_16BIT:
  1560. info->device_id = flash_read_word (info,
  1561. FLASH_OFFSET_DEVICE_ID);
  1562. if ((info->device_id & 0xff) == 0x7E) {
  1563. /* AMD 3-byte (expanded) device ids */
  1564. info->device_id2 = flash_read_uchar (info,
  1565. FLASH_OFFSET_DEVICE_ID2);
  1566. info->device_id2 <<= 8;
  1567. info->device_id2 |= flash_read_uchar (info,
  1568. FLASH_OFFSET_DEVICE_ID3);
  1569. }
  1570. break;
  1571. default:
  1572. break;
  1573. }
  1574. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1575. udelay(1);
  1576. }
  1577. static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
  1578. {
  1579. info->cmd_reset = AMD_CMD_RESET;
  1580. info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR;
  1581. cmdset_amd_read_jedec_ids(info);
  1582. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1583. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1584. if (info->ext_addr) {
  1585. /* read sector protect/unprotect scheme (at 0x49) */
  1586. if (flash_read_uchar(info, info->ext_addr + 9) == 0x8)
  1587. info->legacy_unlock = 1;
  1588. }
  1589. #endif
  1590. return 0;
  1591. }
  1592. #ifdef CONFIG_FLASH_CFI_LEGACY
  1593. static void flash_read_jedec_ids (flash_info_t * info)
  1594. {
  1595. info->manufacturer_id = 0;
  1596. info->device_id = 0;
  1597. info->device_id2 = 0;
  1598. switch (info->vendor) {
  1599. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1600. case CFI_CMDSET_INTEL_STANDARD:
  1601. case CFI_CMDSET_INTEL_EXTENDED:
  1602. cmdset_intel_read_jedec_ids(info);
  1603. break;
  1604. case CFI_CMDSET_AMD_STANDARD:
  1605. case CFI_CMDSET_AMD_EXTENDED:
  1606. cmdset_amd_read_jedec_ids(info);
  1607. break;
  1608. default:
  1609. break;
  1610. }
  1611. }
  1612. /*-----------------------------------------------------------------------
  1613. * Call board code to request info about non-CFI flash.
  1614. * board_flash_get_legacy needs to fill in at least:
  1615. * info->portwidth, info->chipwidth and info->interface for Jedec probing.
  1616. */
  1617. static int flash_detect_legacy(phys_addr_t base, int banknum)
  1618. {
  1619. flash_info_t *info = &flash_info[banknum];
  1620. if (board_flash_get_legacy(base, banknum, info)) {
  1621. /* board code may have filled info completely. If not, we
  1622. use JEDEC ID probing. */
  1623. if (!info->vendor) {
  1624. int modes[] = {
  1625. CFI_CMDSET_AMD_STANDARD,
  1626. CFI_CMDSET_INTEL_STANDARD
  1627. };
  1628. int i;
  1629. for (i = 0; i < ARRAY_SIZE(modes); i++) {
  1630. info->vendor = modes[i];
  1631. info->start[0] =
  1632. (ulong)map_physmem(base,
  1633. info->portwidth,
  1634. MAP_NOCACHE);
  1635. if (info->portwidth == FLASH_CFI_8BIT
  1636. && info->interface == FLASH_CFI_X8X16) {
  1637. info->addr_unlock1 = 0x2AAA;
  1638. info->addr_unlock2 = 0x5555;
  1639. } else {
  1640. info->addr_unlock1 = 0x5555;
  1641. info->addr_unlock2 = 0x2AAA;
  1642. }
  1643. flash_read_jedec_ids(info);
  1644. debug("JEDEC PROBE: ID %x %x %x\n",
  1645. info->manufacturer_id,
  1646. info->device_id,
  1647. info->device_id2);
  1648. if (jedec_flash_match(info, info->start[0]))
  1649. break;
  1650. else
  1651. unmap_physmem((void *)info->start[0],
  1652. MAP_NOCACHE);
  1653. }
  1654. }
  1655. switch(info->vendor) {
  1656. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1657. case CFI_CMDSET_INTEL_STANDARD:
  1658. case CFI_CMDSET_INTEL_EXTENDED:
  1659. info->cmd_reset = FLASH_CMD_RESET;
  1660. break;
  1661. case CFI_CMDSET_AMD_STANDARD:
  1662. case CFI_CMDSET_AMD_EXTENDED:
  1663. case CFI_CMDSET_AMD_LEGACY:
  1664. info->cmd_reset = AMD_CMD_RESET;
  1665. break;
  1666. }
  1667. info->flash_id = FLASH_MAN_CFI;
  1668. return 1;
  1669. }
  1670. return 0; /* use CFI */
  1671. }
  1672. #else
  1673. static inline int flash_detect_legacy(phys_addr_t base, int banknum)
  1674. {
  1675. return 0; /* use CFI */
  1676. }
  1677. #endif
  1678. /*-----------------------------------------------------------------------
  1679. * detect if flash is compatible with the Common Flash Interface (CFI)
  1680. * http://www.jedec.org/download/search/jesd68.pdf
  1681. */
  1682. static void flash_read_cfi (flash_info_t *info, void *buf,
  1683. unsigned int start, size_t len)
  1684. {
  1685. u8 *p = buf;
  1686. unsigned int i;
  1687. for (i = 0; i < len; i++)
  1688. p[i] = flash_read_uchar(info, start + i);
  1689. }
  1690. static void __flash_cmd_reset(flash_info_t *info)
  1691. {
  1692. /*
  1693. * We do not yet know what kind of commandset to use, so we issue
  1694. * the reset command in both Intel and AMD variants, in the hope
  1695. * that AMD flash roms ignore the Intel command.
  1696. */
  1697. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1698. udelay(1);
  1699. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1700. }
  1701. void flash_cmd_reset(flash_info_t *info)
  1702. __attribute__((weak,alias("__flash_cmd_reset")));
  1703. static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1704. {
  1705. int cfi_offset;
  1706. /* Issue FLASH reset command */
  1707. flash_cmd_reset(info);
  1708. for (cfi_offset = 0; cfi_offset < ARRAY_SIZE(flash_offset_cfi);
  1709. cfi_offset++) {
  1710. flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
  1711. FLASH_CMD_CFI);
  1712. if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
  1713. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
  1714. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
  1715. flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
  1716. sizeof(struct cfi_qry));
  1717. info->interface = le16_to_cpu(qry->interface_desc);
  1718. info->cfi_offset = flash_offset_cfi[cfi_offset];
  1719. debug ("device interface is %d\n",
  1720. info->interface);
  1721. debug ("found port %d chip %d ",
  1722. info->portwidth, info->chipwidth);
  1723. debug ("port %d bits chip %d bits\n",
  1724. info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1725. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1726. /* calculate command offsets as in the Linux driver */
  1727. info->addr_unlock1 = 0x555;
  1728. info->addr_unlock2 = 0x2aa;
  1729. /*
  1730. * modify the unlock address if we are
  1731. * in compatibility mode
  1732. */
  1733. if ( /* x8/x16 in x8 mode */
  1734. ((info->chipwidth == FLASH_CFI_BY8) &&
  1735. (info->interface == FLASH_CFI_X8X16)) ||
  1736. /* x16/x32 in x16 mode */
  1737. ((info->chipwidth == FLASH_CFI_BY16) &&
  1738. (info->interface == FLASH_CFI_X16X32)))
  1739. {
  1740. info->addr_unlock1 = 0xaaa;
  1741. info->addr_unlock2 = 0x555;
  1742. }
  1743. info->name = "CFI conformant";
  1744. return 1;
  1745. }
  1746. }
  1747. return 0;
  1748. }
  1749. static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1750. {
  1751. debug ("flash detect cfi\n");
  1752. for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
  1753. info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
  1754. for (info->chipwidth = FLASH_CFI_BY8;
  1755. info->chipwidth <= info->portwidth;
  1756. info->chipwidth <<= 1)
  1757. if (__flash_detect_cfi(info, qry))
  1758. return 1;
  1759. }
  1760. debug ("not found\n");
  1761. return 0;
  1762. }
  1763. /*
  1764. * Manufacturer-specific quirks. Add workarounds for geometry
  1765. * reversal, etc. here.
  1766. */
  1767. static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
  1768. {
  1769. /* check if flash geometry needs reversal */
  1770. if (qry->num_erase_regions > 1) {
  1771. /* reverse geometry if top boot part */
  1772. if (info->cfi_version < 0x3131) {
  1773. /* CFI < 1.1, try to guess from device id */
  1774. if ((info->device_id & 0x80) != 0)
  1775. cfi_reverse_geometry(qry);
  1776. } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
  1777. /* CFI >= 1.1, deduct from top/bottom flag */
  1778. /* note: ext_addr is valid since cfi_version > 0 */
  1779. cfi_reverse_geometry(qry);
  1780. }
  1781. }
  1782. }
  1783. static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
  1784. {
  1785. int reverse_geometry = 0;
  1786. /* Check the "top boot" bit in the PRI */
  1787. if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
  1788. reverse_geometry = 1;
  1789. /* AT49BV6416(T) list the erase regions in the wrong order.
  1790. * However, the device ID is identical with the non-broken
  1791. * AT49BV642D they differ in the high byte.
  1792. */
  1793. if (info->device_id == 0xd6 || info->device_id == 0xd2)
  1794. reverse_geometry = !reverse_geometry;
  1795. if (reverse_geometry)
  1796. cfi_reverse_geometry(qry);
  1797. }
  1798. static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
  1799. {
  1800. /* check if flash geometry needs reversal */
  1801. if (qry->num_erase_regions > 1) {
  1802. /* reverse geometry if top boot part */
  1803. if (info->cfi_version < 0x3131) {
  1804. /* CFI < 1.1, guess by device id */
  1805. if (info->device_id == 0x22CA || /* M29W320DT */
  1806. info->device_id == 0x2256 || /* M29W320ET */
  1807. info->device_id == 0x22D7) { /* M29W800DT */
  1808. cfi_reverse_geometry(qry);
  1809. }
  1810. } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
  1811. /* CFI >= 1.1, deduct from top/bottom flag */
  1812. /* note: ext_addr is valid since cfi_version > 0 */
  1813. cfi_reverse_geometry(qry);
  1814. }
  1815. }
  1816. }
  1817. static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)
  1818. {
  1819. /*
  1820. * SST, for many recent nor parallel flashes, says they are
  1821. * CFI-conformant. This is not true, since qry struct.
  1822. * reports a std. AMD command set (0x0002), while SST allows to
  1823. * erase two different sector sizes for the same memory.
  1824. * 64KB sector (SST call it block) needs 0x30 to be erased.
  1825. * 4KB sector (SST call it sector) needs 0x50 to be erased.
  1826. * Since CFI query detect the 4KB number of sectors, users expects
  1827. * a sector granularity of 4KB, and it is here set.
  1828. */
  1829. if (info->device_id == 0x5D23 || /* SST39VF3201B */
  1830. info->device_id == 0x5C23) { /* SST39VF3202B */
  1831. /* set sector granularity to 4KB */
  1832. info->cmd_erase_sector=0x50;
  1833. }
  1834. }
  1835. static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
  1836. {
  1837. /*
  1838. * The M29EW devices seem to report the CFI information wrong
  1839. * when it's in 8 bit mode.
  1840. * There's an app note from Numonyx on this issue.
  1841. * So adjust the buffer size for M29EW while operating in 8-bit mode
  1842. */
  1843. if (((qry->max_buf_write_size) > 0x8) &&
  1844. (info->device_id == 0x7E) &&
  1845. (info->device_id2 == 0x2201 ||
  1846. info->device_id2 == 0x2301 ||
  1847. info->device_id2 == 0x2801 ||
  1848. info->device_id2 == 0x4801)) {
  1849. debug("Adjusted buffer size on Numonyx flash"
  1850. " M29EW family in 8 bit mode\n");
  1851. qry->max_buf_write_size = 0x8;
  1852. }
  1853. }
  1854. /*
  1855. * The following code cannot be run from FLASH!
  1856. *
  1857. */
  1858. ulong flash_get_size (phys_addr_t base, int banknum)
  1859. {
  1860. flash_info_t *info = &flash_info[banknum];
  1861. int i, j;
  1862. flash_sect_t sect_cnt;
  1863. phys_addr_t sector;
  1864. unsigned long tmp;
  1865. int size_ratio;
  1866. uchar num_erase_regions;
  1867. int erase_region_size;
  1868. int erase_region_count;
  1869. struct cfi_qry qry;
  1870. unsigned long max_size;
  1871. memset(&qry, 0, sizeof(qry));
  1872. info->ext_addr = 0;
  1873. info->cfi_version = 0;
  1874. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1875. info->legacy_unlock = 0;
  1876. #endif
  1877. info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
  1878. if (flash_detect_cfi (info, &qry)) {
  1879. info->vendor = le16_to_cpu(get_unaligned(&(qry.p_id)));
  1880. info->ext_addr = le16_to_cpu(get_unaligned(&(qry.p_adr)));
  1881. num_erase_regions = qry.num_erase_regions;
  1882. if (info->ext_addr) {
  1883. info->cfi_version = (ushort) flash_read_uchar (info,
  1884. info->ext_addr + 3) << 8;
  1885. info->cfi_version |= (ushort) flash_read_uchar (info,
  1886. info->ext_addr + 4);
  1887. }
  1888. #ifdef DEBUG
  1889. flash_printqry (&qry);
  1890. #endif
  1891. switch (info->vendor) {
  1892. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1893. case CFI_CMDSET_INTEL_STANDARD:
  1894. case CFI_CMDSET_INTEL_EXTENDED:
  1895. cmdset_intel_init(info, &qry);
  1896. break;
  1897. case CFI_CMDSET_AMD_STANDARD:
  1898. case CFI_CMDSET_AMD_EXTENDED:
  1899. cmdset_amd_init(info, &qry);
  1900. break;
  1901. default:
  1902. printf("CFI: Unknown command set 0x%x\n",
  1903. info->vendor);
  1904. /*
  1905. * Unfortunately, this means we don't know how
  1906. * to get the chip back to Read mode. Might
  1907. * as well try an Intel-style reset...
  1908. */
  1909. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1910. return 0;
  1911. }
  1912. /* Do manufacturer-specific fixups */
  1913. switch (info->manufacturer_id) {
  1914. case 0x0001: /* AMD */
  1915. case 0x0037: /* AMIC */
  1916. flash_fixup_amd(info, &qry);
  1917. break;
  1918. case 0x001f:
  1919. flash_fixup_atmel(info, &qry);
  1920. break;
  1921. case 0x0020:
  1922. flash_fixup_stm(info, &qry);
  1923. break;
  1924. case 0x00bf: /* SST */
  1925. flash_fixup_sst(info, &qry);
  1926. break;
  1927. case 0x0089: /* Numonyx */
  1928. flash_fixup_num(info, &qry);
  1929. break;
  1930. }
  1931. debug ("manufacturer is %d\n", info->vendor);
  1932. debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
  1933. debug ("device id is 0x%x\n", info->device_id);
  1934. debug ("device id2 is 0x%x\n", info->device_id2);
  1935. debug ("cfi version is 0x%04x\n", info->cfi_version);
  1936. size_ratio = info->portwidth / info->chipwidth;
  1937. /* if the chip is x8/x16 reduce the ratio by half */
  1938. if ((info->interface == FLASH_CFI_X8X16)
  1939. && (info->chipwidth == FLASH_CFI_BY8)) {
  1940. size_ratio >>= 1;
  1941. }
  1942. debug ("size_ratio %d port %d bits chip %d bits\n",
  1943. size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1944. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1945. info->size = 1 << qry.dev_size;
  1946. /* multiply the size by the number of chips */
  1947. info->size *= size_ratio;
  1948. max_size = cfi_flash_bank_size(banknum);
  1949. if (max_size && (info->size > max_size)) {
  1950. debug("[truncated from %ldMiB]", info->size >> 20);
  1951. info->size = max_size;
  1952. }
  1953. debug ("found %d erase regions\n", num_erase_regions);
  1954. sect_cnt = 0;
  1955. sector = base;
  1956. for (i = 0; i < num_erase_regions; i++) {
  1957. if (i > NUM_ERASE_REGIONS) {
  1958. printf ("%d erase regions found, only %d used\n",
  1959. num_erase_regions, NUM_ERASE_REGIONS);
  1960. break;
  1961. }
  1962. tmp = le32_to_cpu(get_unaligned(
  1963. &(qry.erase_region_info[i])));
  1964. debug("erase region %u: 0x%08lx\n", i, tmp);
  1965. erase_region_count = (tmp & 0xffff) + 1;
  1966. tmp >>= 16;
  1967. erase_region_size =
  1968. (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
  1969. debug ("erase_region_count = %d erase_region_size = %d\n",
  1970. erase_region_count, erase_region_size);
  1971. for (j = 0; j < erase_region_count; j++) {
  1972. if (sector - base >= info->size)
  1973. break;
  1974. if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
  1975. printf("ERROR: too many flash sectors\n");
  1976. break;
  1977. }
  1978. info->start[sect_cnt] =
  1979. (ulong)map_physmem(sector,
  1980. info->portwidth,
  1981. MAP_NOCACHE);
  1982. sector += (erase_region_size * size_ratio);
  1983. /*
  1984. * Only read protection status from
  1985. * supported devices (intel...)
  1986. */
  1987. switch (info->vendor) {
  1988. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1989. case CFI_CMDSET_INTEL_EXTENDED:
  1990. case CFI_CMDSET_INTEL_STANDARD:
  1991. /*
  1992. * Set flash to read-id mode. Otherwise
  1993. * reading protected status is not
  1994. * guaranteed.
  1995. */
  1996. flash_write_cmd(info, sect_cnt, 0,
  1997. FLASH_CMD_READ_ID);
  1998. info->protect[sect_cnt] =
  1999. flash_isset (info, sect_cnt,
  2000. FLASH_OFFSET_PROTECT,
  2001. FLASH_STATUS_PROTECT);
  2002. break;
  2003. case CFI_CMDSET_AMD_EXTENDED:
  2004. case CFI_CMDSET_AMD_STANDARD:
  2005. if (!info->legacy_unlock) {
  2006. /* default: not protected */
  2007. info->protect[sect_cnt] = 0;
  2008. break;
  2009. }
  2010. /* Read protection (PPB) from sector */
  2011. flash_write_cmd(info, 0, 0,
  2012. info->cmd_reset);
  2013. flash_unlock_seq(info, 0);
  2014. flash_write_cmd(info, 0,
  2015. info->addr_unlock1,
  2016. FLASH_CMD_READ_ID);
  2017. info->protect[sect_cnt] =
  2018. flash_isset(
  2019. info, sect_cnt,
  2020. FLASH_OFFSET_PROTECT,
  2021. FLASH_STATUS_PROTECT);
  2022. break;
  2023. default:
  2024. /* default: not protected */
  2025. info->protect[sect_cnt] = 0;
  2026. }
  2027. sect_cnt++;
  2028. }
  2029. }
  2030. info->sector_count = sect_cnt;
  2031. info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
  2032. tmp = 1 << qry.block_erase_timeout_typ;
  2033. info->erase_blk_tout = tmp *
  2034. (1 << qry.block_erase_timeout_max);
  2035. tmp = (1 << qry.buf_write_timeout_typ) *
  2036. (1 << qry.buf_write_timeout_max);
  2037. /* round up when converting to ms */
  2038. info->buffer_write_tout = (tmp + 999) / 1000;
  2039. tmp = (1 << qry.word_write_timeout_typ) *
  2040. (1 << qry.word_write_timeout_max);
  2041. /* round up when converting to ms */
  2042. info->write_tout = (tmp + 999) / 1000;
  2043. info->flash_id = FLASH_MAN_CFI;
  2044. if ((info->interface == FLASH_CFI_X8X16) &&
  2045. (info->chipwidth == FLASH_CFI_BY8)) {
  2046. /* XXX - Need to test on x8/x16 in parallel. */
  2047. info->portwidth >>= 1;
  2048. }
  2049. flash_write_cmd (info, 0, 0, info->cmd_reset);
  2050. }
  2051. return (info->size);
  2052. }
  2053. #ifdef CONFIG_FLASH_CFI_MTD
  2054. void flash_set_verbose(uint v)
  2055. {
  2056. flash_verbose = v;
  2057. }
  2058. #endif
  2059. static void cfi_flash_set_config_reg(u32 base, u16 val)
  2060. {
  2061. #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  2062. /*
  2063. * Only set this config register if really defined
  2064. * to a valid value (0xffff is invalid)
  2065. */
  2066. if (val == 0xffff)
  2067. return;
  2068. /*
  2069. * Set configuration register. Data is "encrypted" in the 16 lower
  2070. * address bits.
  2071. */
  2072. flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
  2073. flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
  2074. /*
  2075. * Finally issue reset-command to bring device back to
  2076. * read-array mode
  2077. */
  2078. flash_write16(FLASH_CMD_RESET, (void *)base);
  2079. #endif
  2080. }
  2081. /*-----------------------------------------------------------------------
  2082. */
  2083. void flash_protect_default(void)
  2084. {
  2085. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  2086. int i;
  2087. struct apl_s {
  2088. ulong start;
  2089. ulong size;
  2090. } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
  2091. #endif
  2092. /* Monitor protection ON by default */
  2093. #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
  2094. (!defined(CONFIG_MONITOR_IS_IN_RAM))
  2095. flash_protect(FLAG_PROTECT_SET,
  2096. CONFIG_SYS_MONITOR_BASE,
  2097. CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
  2098. flash_get_info(CONFIG_SYS_MONITOR_BASE));
  2099. #endif
  2100. /* Environment protection ON by default */
  2101. #ifdef CONFIG_ENV_IS_IN_FLASH
  2102. flash_protect(FLAG_PROTECT_SET,
  2103. CONFIG_ENV_ADDR,
  2104. CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
  2105. flash_get_info(CONFIG_ENV_ADDR));
  2106. #endif
  2107. /* Redundant environment protection ON by default */
  2108. #ifdef CONFIG_ENV_ADDR_REDUND
  2109. flash_protect(FLAG_PROTECT_SET,
  2110. CONFIG_ENV_ADDR_REDUND,
  2111. CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
  2112. flash_get_info(CONFIG_ENV_ADDR_REDUND));
  2113. #endif
  2114. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  2115. for (i = 0; i < ARRAY_SIZE(apl); i++) {
  2116. debug("autoprotecting from %08lx to %08lx\n",
  2117. apl[i].start, apl[i].start + apl[i].size - 1);
  2118. flash_protect(FLAG_PROTECT_SET,
  2119. apl[i].start,
  2120. apl[i].start + apl[i].size - 1,
  2121. flash_get_info(apl[i].start));
  2122. }
  2123. #endif
  2124. }
  2125. unsigned long flash_init (void)
  2126. {
  2127. unsigned long size = 0;
  2128. int i;
  2129. #ifdef CONFIG_SYS_FLASH_PROTECTION
  2130. /* read environment from EEPROM */
  2131. char s[64];
  2132. getenv_f("unlock", s, sizeof(s));
  2133. #endif
  2134. /* Init: no FLASHes known */
  2135. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
  2136. flash_info[i].flash_id = FLASH_UNKNOWN;
  2137. /* Optionally write flash configuration register */
  2138. cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
  2139. cfi_flash_config_reg(i));
  2140. if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
  2141. flash_get_size(cfi_flash_bank_addr(i), i);
  2142. size += flash_info[i].size;
  2143. if (flash_info[i].flash_id == FLASH_UNKNOWN) {
  2144. #ifndef CONFIG_SYS_FLASH_QUIET_TEST
  2145. printf ("## Unknown flash on Bank %d "
  2146. "- Size = 0x%08lx = %ld MB\n",
  2147. i+1, flash_info[i].size,
  2148. flash_info[i].size >> 20);
  2149. #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
  2150. }
  2151. #ifdef CONFIG_SYS_FLASH_PROTECTION
  2152. else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
  2153. /*
  2154. * Only the U-Boot image and it's environment
  2155. * is protected, all other sectors are
  2156. * unprotected (unlocked) if flash hardware
  2157. * protection is used (CONFIG_SYS_FLASH_PROTECTION)
  2158. * and the environment variable "unlock" is
  2159. * set to "yes".
  2160. */
  2161. if (flash_info[i].legacy_unlock) {
  2162. int k;
  2163. /*
  2164. * Disable legacy_unlock temporarily,
  2165. * since flash_real_protect would
  2166. * relock all other sectors again
  2167. * otherwise.
  2168. */
  2169. flash_info[i].legacy_unlock = 0;
  2170. /*
  2171. * Legacy unlocking (e.g. Intel J3) ->
  2172. * unlock only one sector. This will
  2173. * unlock all sectors.
  2174. */
  2175. flash_real_protect (&flash_info[i], 0, 0);
  2176. flash_info[i].legacy_unlock = 1;
  2177. /*
  2178. * Manually mark other sectors as
  2179. * unlocked (unprotected)
  2180. */
  2181. for (k = 1; k < flash_info[i].sector_count; k++)
  2182. flash_info[i].protect[k] = 0;
  2183. } else {
  2184. /*
  2185. * No legancy unlocking -> unlock all sectors
  2186. */
  2187. flash_protect (FLAG_PROTECT_CLEAR,
  2188. flash_info[i].start[0],
  2189. flash_info[i].start[0]
  2190. + flash_info[i].size - 1,
  2191. &flash_info[i]);
  2192. }
  2193. }
  2194. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  2195. }
  2196. flash_protect_default();
  2197. #ifdef CONFIG_FLASH_CFI_MTD
  2198. cfi_mtd_init();
  2199. #endif
  2200. return (size);
  2201. }