cfi_flash.c 57 KB

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  1. /*
  2. * (C) Copyright 2002-2004
  3. * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
  4. *
  5. * Copyright (C) 2003 Arabella Software Ltd.
  6. * Yuli Barcohen <yuli@arabellasw.com>
  7. *
  8. * Copyright (C) 2004
  9. * Ed Okerson
  10. *
  11. * Copyright (C) 2006
  12. * Tolunay Orkun <listmember@orkun.us>
  13. *
  14. * See file CREDITS for list of people who contributed to this
  15. * project.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation; either version 2 of
  20. * the License, or (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30. * MA 02111-1307 USA
  31. *
  32. */
  33. /* The DEBUG define must be before common to enable debugging */
  34. /* #define DEBUG */
  35. #include <common.h>
  36. #include <asm/processor.h>
  37. #include <asm/io.h>
  38. #include <asm/byteorder.h>
  39. #include <environment.h>
  40. #include <mtd/cfi_flash.h>
  41. /*
  42. * This file implements a Common Flash Interface (CFI) driver for
  43. * U-Boot.
  44. *
  45. * The width of the port and the width of the chips are determined at
  46. * initialization. These widths are used to calculate the address for
  47. * access CFI data structures.
  48. *
  49. * References
  50. * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  51. * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  52. * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  53. * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  54. * AMD CFI Specification, Release 2.0 December 1, 2001
  55. * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  56. * Device IDs, Publication Number 25538 Revision A, November 8, 2001
  57. *
  58. * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  59. * reading and writing ... (yes there is such a Hardware).
  60. */
  61. static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  62. #ifdef CONFIG_FLASH_CFI_MTD
  63. static uint flash_verbose = 1;
  64. #else
  65. #define flash_verbose 1
  66. #endif
  67. flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
  68. /*
  69. * Check if chip width is defined. If not, start detecting with 8bit.
  70. */
  71. #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
  72. #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
  73. #endif
  74. /*
  75. * 0xffff is an undefined value for the configuration register. When
  76. * this value is returned, the configuration register shall not be
  77. * written at all (default mode).
  78. */
  79. static u16 cfi_flash_config_reg(int i)
  80. {
  81. #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  82. return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
  83. #else
  84. return 0xffff;
  85. #endif
  86. }
  87. #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
  88. int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
  89. #endif
  90. static phys_addr_t __cfi_flash_bank_addr(int i)
  91. {
  92. return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
  93. }
  94. phys_addr_t cfi_flash_bank_addr(int i)
  95. __attribute__((weak, alias("__cfi_flash_bank_addr")));
  96. static unsigned long __cfi_flash_bank_size(int i)
  97. {
  98. #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
  99. return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
  100. #else
  101. return 0;
  102. #endif
  103. }
  104. unsigned long cfi_flash_bank_size(int i)
  105. __attribute__((weak, alias("__cfi_flash_bank_size")));
  106. static void __flash_write8(u8 value, void *addr)
  107. {
  108. __raw_writeb(value, addr);
  109. }
  110. static void __flash_write16(u16 value, void *addr)
  111. {
  112. __raw_writew(value, addr);
  113. }
  114. static void __flash_write32(u32 value, void *addr)
  115. {
  116. __raw_writel(value, addr);
  117. }
  118. static void __flash_write64(u64 value, void *addr)
  119. {
  120. /* No architectures currently implement __raw_writeq() */
  121. *(volatile u64 *)addr = value;
  122. }
  123. static u8 __flash_read8(void *addr)
  124. {
  125. return __raw_readb(addr);
  126. }
  127. static u16 __flash_read16(void *addr)
  128. {
  129. return __raw_readw(addr);
  130. }
  131. static u32 __flash_read32(void *addr)
  132. {
  133. return __raw_readl(addr);
  134. }
  135. static u64 __flash_read64(void *addr)
  136. {
  137. /* No architectures currently implement __raw_readq() */
  138. return *(volatile u64 *)addr;
  139. }
  140. #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  141. void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
  142. void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
  143. void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
  144. void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
  145. u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
  146. u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
  147. u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
  148. u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
  149. #else
  150. #define flash_write8 __flash_write8
  151. #define flash_write16 __flash_write16
  152. #define flash_write32 __flash_write32
  153. #define flash_write64 __flash_write64
  154. #define flash_read8 __flash_read8
  155. #define flash_read16 __flash_read16
  156. #define flash_read32 __flash_read32
  157. #define flash_read64 __flash_read64
  158. #endif
  159. /*-----------------------------------------------------------------------
  160. */
  161. #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
  162. flash_info_t *flash_get_info(ulong base)
  163. {
  164. int i;
  165. flash_info_t *info = NULL;
  166. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
  167. info = & flash_info[i];
  168. if (info->size && info->start[0] <= base &&
  169. base <= info->start[0] + info->size - 1)
  170. break;
  171. }
  172. return info;
  173. }
  174. #endif
  175. unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
  176. {
  177. if (sect != (info->sector_count - 1))
  178. return info->start[sect + 1] - info->start[sect];
  179. else
  180. return info->start[0] + info->size - info->start[sect];
  181. }
  182. /*-----------------------------------------------------------------------
  183. * create an address based on the offset and the port width
  184. */
  185. static inline void *
  186. flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
  187. {
  188. unsigned int byte_offset = offset * info->portwidth;
  189. return (void *)(info->start[sect] + byte_offset);
  190. }
  191. static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
  192. unsigned int offset, void *addr)
  193. {
  194. }
  195. /*-----------------------------------------------------------------------
  196. * make a proper sized command based on the port and chip widths
  197. */
  198. static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
  199. {
  200. int i;
  201. int cword_offset;
  202. int cp_offset;
  203. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  204. u32 cmd_le = cpu_to_le32(cmd);
  205. #endif
  206. uchar val;
  207. uchar *cp = (uchar *) cmdbuf;
  208. for (i = info->portwidth; i > 0; i--){
  209. cword_offset = (info->portwidth-i)%info->chipwidth;
  210. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  211. cp_offset = info->portwidth - i;
  212. val = *((uchar*)&cmd_le + cword_offset);
  213. #else
  214. cp_offset = i - 1;
  215. val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
  216. #endif
  217. cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
  218. }
  219. }
  220. #ifdef DEBUG
  221. /*-----------------------------------------------------------------------
  222. * Debug support
  223. */
  224. static void print_longlong (char *str, unsigned long long data)
  225. {
  226. int i;
  227. char *cp;
  228. cp = (char *) &data;
  229. for (i = 0; i < 8; i++)
  230. sprintf (&str[i * 2], "%2.2x", *cp++);
  231. }
  232. static void flash_printqry (struct cfi_qry *qry)
  233. {
  234. u8 *p = (u8 *)qry;
  235. int x, y;
  236. for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
  237. debug("%02x : ", x);
  238. for (y = 0; y < 16; y++)
  239. debug("%2.2x ", p[x + y]);
  240. debug(" ");
  241. for (y = 0; y < 16; y++) {
  242. unsigned char c = p[x + y];
  243. if (c >= 0x20 && c <= 0x7e)
  244. debug("%c", c);
  245. else
  246. debug(".");
  247. }
  248. debug("\n");
  249. }
  250. }
  251. #endif
  252. /*-----------------------------------------------------------------------
  253. * read a character at a port width address
  254. */
  255. static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
  256. {
  257. uchar *cp;
  258. uchar retval;
  259. cp = flash_map (info, 0, offset);
  260. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  261. retval = flash_read8(cp);
  262. #else
  263. retval = flash_read8(cp + info->portwidth - 1);
  264. #endif
  265. flash_unmap (info, 0, offset, cp);
  266. return retval;
  267. }
  268. /*-----------------------------------------------------------------------
  269. * read a word at a port width address, assume 16bit bus
  270. */
  271. static inline ushort flash_read_word (flash_info_t * info, uint offset)
  272. {
  273. ushort *addr, retval;
  274. addr = flash_map (info, 0, offset);
  275. retval = flash_read16 (addr);
  276. flash_unmap (info, 0, offset, addr);
  277. return retval;
  278. }
  279. /*-----------------------------------------------------------------------
  280. * read a long word by picking the least significant byte of each maximum
  281. * port size word. Swap for ppc format.
  282. */
  283. static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
  284. uint offset)
  285. {
  286. uchar *addr;
  287. ulong retval;
  288. #ifdef DEBUG
  289. int x;
  290. #endif
  291. addr = flash_map (info, sect, offset);
  292. #ifdef DEBUG
  293. debug ("long addr is at %p info->portwidth = %d\n", addr,
  294. info->portwidth);
  295. for (x = 0; x < 4 * info->portwidth; x++) {
  296. debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
  297. }
  298. #endif
  299. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  300. retval = ((flash_read8(addr) << 16) |
  301. (flash_read8(addr + info->portwidth) << 24) |
  302. (flash_read8(addr + 2 * info->portwidth)) |
  303. (flash_read8(addr + 3 * info->portwidth) << 8));
  304. #else
  305. retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
  306. (flash_read8(addr + info->portwidth - 1) << 16) |
  307. (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
  308. (flash_read8(addr + 3 * info->portwidth - 1)));
  309. #endif
  310. flash_unmap(info, sect, offset, addr);
  311. return retval;
  312. }
  313. /*
  314. * Write a proper sized command to the correct address
  315. */
  316. void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
  317. uint offset, u32 cmd)
  318. {
  319. void *addr;
  320. cfiword_t cword;
  321. addr = flash_map (info, sect, offset);
  322. flash_make_cmd (info, cmd, &cword);
  323. switch (info->portwidth) {
  324. case FLASH_CFI_8BIT:
  325. debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
  326. cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  327. flash_write8(cword.c, addr);
  328. break;
  329. case FLASH_CFI_16BIT:
  330. debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
  331. cmd, cword.w,
  332. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  333. flash_write16(cword.w, addr);
  334. break;
  335. case FLASH_CFI_32BIT:
  336. debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
  337. cmd, cword.l,
  338. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  339. flash_write32(cword.l, addr);
  340. break;
  341. case FLASH_CFI_64BIT:
  342. #ifdef DEBUG
  343. {
  344. char str[20];
  345. print_longlong (str, cword.ll);
  346. debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
  347. addr, cmd, str,
  348. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  349. }
  350. #endif
  351. flash_write64(cword.ll, addr);
  352. break;
  353. }
  354. /* Ensure all the instructions are fully finished */
  355. sync();
  356. flash_unmap(info, sect, offset, addr);
  357. }
  358. static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
  359. {
  360. flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
  361. flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
  362. }
  363. /*-----------------------------------------------------------------------
  364. */
  365. static int flash_isequal (flash_info_t * info, flash_sect_t sect,
  366. uint offset, uchar cmd)
  367. {
  368. void *addr;
  369. cfiword_t cword;
  370. int retval;
  371. addr = flash_map (info, sect, offset);
  372. flash_make_cmd (info, cmd, &cword);
  373. debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
  374. switch (info->portwidth) {
  375. case FLASH_CFI_8BIT:
  376. debug ("is= %x %x\n", flash_read8(addr), cword.c);
  377. retval = (flash_read8(addr) == cword.c);
  378. break;
  379. case FLASH_CFI_16BIT:
  380. debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
  381. retval = (flash_read16(addr) == cword.w);
  382. break;
  383. case FLASH_CFI_32BIT:
  384. debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
  385. retval = (flash_read32(addr) == cword.l);
  386. break;
  387. case FLASH_CFI_64BIT:
  388. #ifdef DEBUG
  389. {
  390. char str1[20];
  391. char str2[20];
  392. print_longlong (str1, flash_read64(addr));
  393. print_longlong (str2, cword.ll);
  394. debug ("is= %s %s\n", str1, str2);
  395. }
  396. #endif
  397. retval = (flash_read64(addr) == cword.ll);
  398. break;
  399. default:
  400. retval = 0;
  401. break;
  402. }
  403. flash_unmap(info, sect, offset, addr);
  404. return retval;
  405. }
  406. /*-----------------------------------------------------------------------
  407. */
  408. static int flash_isset (flash_info_t * info, flash_sect_t sect,
  409. uint offset, uchar cmd)
  410. {
  411. void *addr;
  412. cfiword_t cword;
  413. int retval;
  414. addr = flash_map (info, sect, offset);
  415. flash_make_cmd (info, cmd, &cword);
  416. switch (info->portwidth) {
  417. case FLASH_CFI_8BIT:
  418. retval = ((flash_read8(addr) & cword.c) == cword.c);
  419. break;
  420. case FLASH_CFI_16BIT:
  421. retval = ((flash_read16(addr) & cword.w) == cword.w);
  422. break;
  423. case FLASH_CFI_32BIT:
  424. retval = ((flash_read32(addr) & cword.l) == cword.l);
  425. break;
  426. case FLASH_CFI_64BIT:
  427. retval = ((flash_read64(addr) & cword.ll) == cword.ll);
  428. break;
  429. default:
  430. retval = 0;
  431. break;
  432. }
  433. flash_unmap(info, sect, offset, addr);
  434. return retval;
  435. }
  436. /*-----------------------------------------------------------------------
  437. */
  438. static int flash_toggle (flash_info_t * info, flash_sect_t sect,
  439. uint offset, uchar cmd)
  440. {
  441. void *addr;
  442. cfiword_t cword;
  443. int retval;
  444. addr = flash_map (info, sect, offset);
  445. flash_make_cmd (info, cmd, &cword);
  446. switch (info->portwidth) {
  447. case FLASH_CFI_8BIT:
  448. retval = flash_read8(addr) != flash_read8(addr);
  449. break;
  450. case FLASH_CFI_16BIT:
  451. retval = flash_read16(addr) != flash_read16(addr);
  452. break;
  453. case FLASH_CFI_32BIT:
  454. retval = flash_read32(addr) != flash_read32(addr);
  455. break;
  456. case FLASH_CFI_64BIT:
  457. retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
  458. (flash_read32(addr+4) != flash_read32(addr+4)) );
  459. break;
  460. default:
  461. retval = 0;
  462. break;
  463. }
  464. flash_unmap(info, sect, offset, addr);
  465. return retval;
  466. }
  467. /*
  468. * flash_is_busy - check to see if the flash is busy
  469. *
  470. * This routine checks the status of the chip and returns true if the
  471. * chip is busy.
  472. */
  473. static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
  474. {
  475. int retval;
  476. switch (info->vendor) {
  477. case CFI_CMDSET_INTEL_PROG_REGIONS:
  478. case CFI_CMDSET_INTEL_STANDARD:
  479. case CFI_CMDSET_INTEL_EXTENDED:
  480. retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
  481. break;
  482. case CFI_CMDSET_AMD_STANDARD:
  483. case CFI_CMDSET_AMD_EXTENDED:
  484. #ifdef CONFIG_FLASH_CFI_LEGACY
  485. case CFI_CMDSET_AMD_LEGACY:
  486. #endif
  487. retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
  488. break;
  489. default:
  490. retval = 0;
  491. }
  492. debug ("flash_is_busy: %d\n", retval);
  493. return retval;
  494. }
  495. /*-----------------------------------------------------------------------
  496. * wait for XSR.7 to be set. Time out with an error if it does not.
  497. * This routine does not set the flash to read-array mode.
  498. */
  499. static int flash_status_check (flash_info_t * info, flash_sect_t sector,
  500. ulong tout, char *prompt)
  501. {
  502. ulong start;
  503. #if CONFIG_SYS_HZ != 1000
  504. if ((ulong)CONFIG_SYS_HZ > 100000)
  505. tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
  506. else
  507. tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
  508. #endif
  509. /* Wait for command completion */
  510. reset_timer();
  511. start = get_timer (0);
  512. while (flash_is_busy (info, sector)) {
  513. if (get_timer (start) > tout) {
  514. printf ("Flash %s timeout at address %lx data %lx\n",
  515. prompt, info->start[sector],
  516. flash_read_long (info, sector, 0));
  517. flash_write_cmd (info, sector, 0, info->cmd_reset);
  518. return ERR_TIMOUT;
  519. }
  520. udelay (1); /* also triggers watchdog */
  521. }
  522. return ERR_OK;
  523. }
  524. /*-----------------------------------------------------------------------
  525. * Wait for XSR.7 to be set, if it times out print an error, otherwise
  526. * do a full status check.
  527. *
  528. * This routine sets the flash to read-array mode.
  529. */
  530. static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
  531. ulong tout, char *prompt)
  532. {
  533. int retcode;
  534. retcode = flash_status_check (info, sector, tout, prompt);
  535. switch (info->vendor) {
  536. case CFI_CMDSET_INTEL_PROG_REGIONS:
  537. case CFI_CMDSET_INTEL_EXTENDED:
  538. case CFI_CMDSET_INTEL_STANDARD:
  539. if ((retcode != ERR_OK)
  540. && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
  541. retcode = ERR_INVAL;
  542. printf ("Flash %s error at address %lx\n", prompt,
  543. info->start[sector]);
  544. if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
  545. FLASH_STATUS_PSLBS)) {
  546. puts ("Command Sequence Error.\n");
  547. } else if (flash_isset (info, sector, 0,
  548. FLASH_STATUS_ECLBS)) {
  549. puts ("Block Erase Error.\n");
  550. retcode = ERR_NOT_ERASED;
  551. } else if (flash_isset (info, sector, 0,
  552. FLASH_STATUS_PSLBS)) {
  553. puts ("Locking Error\n");
  554. }
  555. if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
  556. puts ("Block locked.\n");
  557. retcode = ERR_PROTECTED;
  558. }
  559. if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
  560. puts ("Vpp Low Error.\n");
  561. }
  562. flash_write_cmd (info, sector, 0, info->cmd_reset);
  563. break;
  564. default:
  565. break;
  566. }
  567. return retcode;
  568. }
  569. static int use_flash_status_poll(flash_info_t *info)
  570. {
  571. #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
  572. if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
  573. info->vendor == CFI_CMDSET_AMD_STANDARD)
  574. return 1;
  575. #endif
  576. return 0;
  577. }
  578. static int flash_status_poll(flash_info_t *info, void *src, void *dst,
  579. ulong tout, char *prompt)
  580. {
  581. #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
  582. ulong start;
  583. int ready;
  584. #if CONFIG_SYS_HZ != 1000
  585. if ((ulong)CONFIG_SYS_HZ > 100000)
  586. tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
  587. else
  588. tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
  589. #endif
  590. /* Wait for command completion */
  591. reset_timer();
  592. start = get_timer(0);
  593. while (1) {
  594. switch (info->portwidth) {
  595. case FLASH_CFI_8BIT:
  596. ready = flash_read8(dst) == flash_read8(src);
  597. break;
  598. case FLASH_CFI_16BIT:
  599. ready = flash_read16(dst) == flash_read16(src);
  600. break;
  601. case FLASH_CFI_32BIT:
  602. ready = flash_read32(dst) == flash_read32(src);
  603. break;
  604. case FLASH_CFI_64BIT:
  605. ready = flash_read64(dst) == flash_read64(src);
  606. break;
  607. default:
  608. ready = 0;
  609. break;
  610. }
  611. if (ready)
  612. break;
  613. if (get_timer(start) > tout) {
  614. printf("Flash %s timeout at address %lx data %lx\n",
  615. prompt, (ulong)dst, (ulong)flash_read8(dst));
  616. return ERR_TIMOUT;
  617. }
  618. udelay(1); /* also triggers watchdog */
  619. }
  620. #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
  621. return ERR_OK;
  622. }
  623. /*-----------------------------------------------------------------------
  624. */
  625. static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
  626. {
  627. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  628. unsigned short w;
  629. unsigned int l;
  630. unsigned long long ll;
  631. #endif
  632. switch (info->portwidth) {
  633. case FLASH_CFI_8BIT:
  634. cword->c = c;
  635. break;
  636. case FLASH_CFI_16BIT:
  637. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  638. w = c;
  639. w <<= 8;
  640. cword->w = (cword->w >> 8) | w;
  641. #else
  642. cword->w = (cword->w << 8) | c;
  643. #endif
  644. break;
  645. case FLASH_CFI_32BIT:
  646. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  647. l = c;
  648. l <<= 24;
  649. cword->l = (cword->l >> 8) | l;
  650. #else
  651. cword->l = (cword->l << 8) | c;
  652. #endif
  653. break;
  654. case FLASH_CFI_64BIT:
  655. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  656. ll = c;
  657. ll <<= 56;
  658. cword->ll = (cword->ll >> 8) | ll;
  659. #else
  660. cword->ll = (cword->ll << 8) | c;
  661. #endif
  662. break;
  663. }
  664. }
  665. /*
  666. * Loop through the sector table starting from the previously found sector.
  667. * Searches forwards or backwards, dependent on the passed address.
  668. */
  669. static flash_sect_t find_sector (flash_info_t * info, ulong addr)
  670. {
  671. static flash_sect_t saved_sector = 0; /* previously found sector */
  672. static flash_info_t *saved_info = 0; /* previously used flash bank */
  673. flash_sect_t sector = saved_sector;
  674. if ((info != saved_info) || (sector >= info->sector_count))
  675. sector = 0;
  676. while ((info->start[sector] < addr)
  677. && (sector < info->sector_count - 1))
  678. sector++;
  679. while ((info->start[sector] > addr) && (sector > 0))
  680. /*
  681. * also decrements the sector in case of an overshot
  682. * in the first loop
  683. */
  684. sector--;
  685. saved_sector = sector;
  686. saved_info = info;
  687. return sector;
  688. }
  689. /*-----------------------------------------------------------------------
  690. */
  691. static int flash_write_cfiword (flash_info_t * info, ulong dest,
  692. cfiword_t cword)
  693. {
  694. void *dstaddr = (void *)dest;
  695. int flag;
  696. flash_sect_t sect = 0;
  697. char sect_found = 0;
  698. /* Check if Flash is (sufficiently) erased */
  699. switch (info->portwidth) {
  700. case FLASH_CFI_8BIT:
  701. flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
  702. break;
  703. case FLASH_CFI_16BIT:
  704. flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
  705. break;
  706. case FLASH_CFI_32BIT:
  707. flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
  708. break;
  709. case FLASH_CFI_64BIT:
  710. flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
  711. break;
  712. default:
  713. flag = 0;
  714. break;
  715. }
  716. if (!flag)
  717. return ERR_NOT_ERASED;
  718. /* Disable interrupts which might cause a timeout here */
  719. flag = disable_interrupts ();
  720. switch (info->vendor) {
  721. case CFI_CMDSET_INTEL_PROG_REGIONS:
  722. case CFI_CMDSET_INTEL_EXTENDED:
  723. case CFI_CMDSET_INTEL_STANDARD:
  724. flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
  725. flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
  726. break;
  727. case CFI_CMDSET_AMD_EXTENDED:
  728. case CFI_CMDSET_AMD_STANDARD:
  729. sect = find_sector(info, dest);
  730. flash_unlock_seq (info, sect);
  731. flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
  732. sect_found = 1;
  733. break;
  734. #ifdef CONFIG_FLASH_CFI_LEGACY
  735. case CFI_CMDSET_AMD_LEGACY:
  736. sect = find_sector(info, dest);
  737. flash_unlock_seq (info, 0);
  738. flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
  739. sect_found = 1;
  740. break;
  741. #endif
  742. }
  743. switch (info->portwidth) {
  744. case FLASH_CFI_8BIT:
  745. flash_write8(cword.c, dstaddr);
  746. break;
  747. case FLASH_CFI_16BIT:
  748. flash_write16(cword.w, dstaddr);
  749. break;
  750. case FLASH_CFI_32BIT:
  751. flash_write32(cword.l, dstaddr);
  752. break;
  753. case FLASH_CFI_64BIT:
  754. flash_write64(cword.ll, dstaddr);
  755. break;
  756. }
  757. /* re-enable interrupts if necessary */
  758. if (flag)
  759. enable_interrupts ();
  760. if (!sect_found)
  761. sect = find_sector (info, dest);
  762. if (use_flash_status_poll(info))
  763. return flash_status_poll(info, &cword, dstaddr,
  764. info->write_tout, "write");
  765. else
  766. return flash_full_status_check(info, sect,
  767. info->write_tout, "write");
  768. }
  769. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  770. static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
  771. int len)
  772. {
  773. flash_sect_t sector;
  774. int cnt;
  775. int retcode;
  776. void *src = cp;
  777. void *dst = (void *)dest;
  778. void *dst2 = dst;
  779. int flag = 0;
  780. uint offset = 0;
  781. unsigned int shift;
  782. uchar write_cmd;
  783. switch (info->portwidth) {
  784. case FLASH_CFI_8BIT:
  785. shift = 0;
  786. break;
  787. case FLASH_CFI_16BIT:
  788. shift = 1;
  789. break;
  790. case FLASH_CFI_32BIT:
  791. shift = 2;
  792. break;
  793. case FLASH_CFI_64BIT:
  794. shift = 3;
  795. break;
  796. default:
  797. retcode = ERR_INVAL;
  798. goto out_unmap;
  799. }
  800. cnt = len >> shift;
  801. while ((cnt-- > 0) && (flag == 0)) {
  802. switch (info->portwidth) {
  803. case FLASH_CFI_8BIT:
  804. flag = ((flash_read8(dst2) & flash_read8(src)) ==
  805. flash_read8(src));
  806. src += 1, dst2 += 1;
  807. break;
  808. case FLASH_CFI_16BIT:
  809. flag = ((flash_read16(dst2) & flash_read16(src)) ==
  810. flash_read16(src));
  811. src += 2, dst2 += 2;
  812. break;
  813. case FLASH_CFI_32BIT:
  814. flag = ((flash_read32(dst2) & flash_read32(src)) ==
  815. flash_read32(src));
  816. src += 4, dst2 += 4;
  817. break;
  818. case FLASH_CFI_64BIT:
  819. flag = ((flash_read64(dst2) & flash_read64(src)) ==
  820. flash_read64(src));
  821. src += 8, dst2 += 8;
  822. break;
  823. }
  824. }
  825. if (!flag) {
  826. retcode = ERR_NOT_ERASED;
  827. goto out_unmap;
  828. }
  829. src = cp;
  830. sector = find_sector (info, dest);
  831. switch (info->vendor) {
  832. case CFI_CMDSET_INTEL_PROG_REGIONS:
  833. case CFI_CMDSET_INTEL_STANDARD:
  834. case CFI_CMDSET_INTEL_EXTENDED:
  835. write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
  836. FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
  837. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  838. flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
  839. flash_write_cmd (info, sector, 0, write_cmd);
  840. retcode = flash_status_check (info, sector,
  841. info->buffer_write_tout,
  842. "write to buffer");
  843. if (retcode == ERR_OK) {
  844. /* reduce the number of loops by the width of
  845. * the port */
  846. cnt = len >> shift;
  847. flash_write_cmd (info, sector, 0, cnt - 1);
  848. while (cnt-- > 0) {
  849. switch (info->portwidth) {
  850. case FLASH_CFI_8BIT:
  851. flash_write8(flash_read8(src), dst);
  852. src += 1, dst += 1;
  853. break;
  854. case FLASH_CFI_16BIT:
  855. flash_write16(flash_read16(src), dst);
  856. src += 2, dst += 2;
  857. break;
  858. case FLASH_CFI_32BIT:
  859. flash_write32(flash_read32(src), dst);
  860. src += 4, dst += 4;
  861. break;
  862. case FLASH_CFI_64BIT:
  863. flash_write64(flash_read64(src), dst);
  864. src += 8, dst += 8;
  865. break;
  866. default:
  867. retcode = ERR_INVAL;
  868. goto out_unmap;
  869. }
  870. }
  871. flash_write_cmd (info, sector, 0,
  872. FLASH_CMD_WRITE_BUFFER_CONFIRM);
  873. retcode = flash_full_status_check (
  874. info, sector, info->buffer_write_tout,
  875. "buffer write");
  876. }
  877. break;
  878. case CFI_CMDSET_AMD_STANDARD:
  879. case CFI_CMDSET_AMD_EXTENDED:
  880. flash_unlock_seq(info,0);
  881. #ifdef CONFIG_FLASH_SPANSION_S29WS_N
  882. offset = ((unsigned long)dst - info->start[sector]) >> shift;
  883. #endif
  884. flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
  885. cnt = len >> shift;
  886. flash_write_cmd(info, sector, offset, cnt - 1);
  887. switch (info->portwidth) {
  888. case FLASH_CFI_8BIT:
  889. while (cnt-- > 0) {
  890. flash_write8(flash_read8(src), dst);
  891. src += 1, dst += 1;
  892. }
  893. break;
  894. case FLASH_CFI_16BIT:
  895. while (cnt-- > 0) {
  896. flash_write16(flash_read16(src), dst);
  897. src += 2, dst += 2;
  898. }
  899. break;
  900. case FLASH_CFI_32BIT:
  901. while (cnt-- > 0) {
  902. flash_write32(flash_read32(src), dst);
  903. src += 4, dst += 4;
  904. }
  905. break;
  906. case FLASH_CFI_64BIT:
  907. while (cnt-- > 0) {
  908. flash_write64(flash_read64(src), dst);
  909. src += 8, dst += 8;
  910. }
  911. break;
  912. default:
  913. retcode = ERR_INVAL;
  914. goto out_unmap;
  915. }
  916. flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
  917. if (use_flash_status_poll(info))
  918. retcode = flash_status_poll(info, src - (1 << shift),
  919. dst - (1 << shift),
  920. info->buffer_write_tout,
  921. "buffer write");
  922. else
  923. retcode = flash_full_status_check(info, sector,
  924. info->buffer_write_tout,
  925. "buffer write");
  926. break;
  927. default:
  928. debug ("Unknown Command Set\n");
  929. retcode = ERR_INVAL;
  930. break;
  931. }
  932. out_unmap:
  933. return retcode;
  934. }
  935. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  936. /*-----------------------------------------------------------------------
  937. */
  938. int flash_erase (flash_info_t * info, int s_first, int s_last)
  939. {
  940. int rcode = 0;
  941. int prot;
  942. flash_sect_t sect;
  943. int st;
  944. if (info->flash_id != FLASH_MAN_CFI) {
  945. puts ("Can't erase unknown flash type - aborted\n");
  946. return 1;
  947. }
  948. if ((s_first < 0) || (s_first > s_last)) {
  949. puts ("- no sectors to erase\n");
  950. return 1;
  951. }
  952. prot = 0;
  953. for (sect = s_first; sect <= s_last; ++sect) {
  954. if (info->protect[sect]) {
  955. prot++;
  956. }
  957. }
  958. if (prot) {
  959. printf ("- Warning: %d protected sectors will not be erased!\n",
  960. prot);
  961. } else if (flash_verbose) {
  962. putc ('\n');
  963. }
  964. for (sect = s_first; sect <= s_last; sect++) {
  965. if (info->protect[sect] == 0) { /* not protected */
  966. switch (info->vendor) {
  967. case CFI_CMDSET_INTEL_PROG_REGIONS:
  968. case CFI_CMDSET_INTEL_STANDARD:
  969. case CFI_CMDSET_INTEL_EXTENDED:
  970. flash_write_cmd (info, sect, 0,
  971. FLASH_CMD_CLEAR_STATUS);
  972. flash_write_cmd (info, sect, 0,
  973. FLASH_CMD_BLOCK_ERASE);
  974. flash_write_cmd (info, sect, 0,
  975. FLASH_CMD_ERASE_CONFIRM);
  976. break;
  977. case CFI_CMDSET_AMD_STANDARD:
  978. case CFI_CMDSET_AMD_EXTENDED:
  979. flash_unlock_seq (info, sect);
  980. flash_write_cmd (info, sect,
  981. info->addr_unlock1,
  982. AMD_CMD_ERASE_START);
  983. flash_unlock_seq (info, sect);
  984. flash_write_cmd (info, sect, 0,
  985. AMD_CMD_ERASE_SECTOR);
  986. break;
  987. #ifdef CONFIG_FLASH_CFI_LEGACY
  988. case CFI_CMDSET_AMD_LEGACY:
  989. flash_unlock_seq (info, 0);
  990. flash_write_cmd (info, 0, info->addr_unlock1,
  991. AMD_CMD_ERASE_START);
  992. flash_unlock_seq (info, 0);
  993. flash_write_cmd (info, sect, 0,
  994. AMD_CMD_ERASE_SECTOR);
  995. break;
  996. #endif
  997. default:
  998. debug ("Unkown flash vendor %d\n",
  999. info->vendor);
  1000. break;
  1001. }
  1002. if (use_flash_status_poll(info)) {
  1003. cfiword_t cword = (cfiword_t)0xffffffffffffffffULL;
  1004. void *dest;
  1005. dest = flash_map(info, sect, 0);
  1006. st = flash_status_poll(info, &cword, dest,
  1007. info->erase_blk_tout, "erase");
  1008. flash_unmap(info, sect, 0, dest);
  1009. } else
  1010. st = flash_full_status_check(info, sect,
  1011. info->erase_blk_tout,
  1012. "erase");
  1013. if (st)
  1014. rcode = 1;
  1015. else if (flash_verbose)
  1016. putc ('.');
  1017. }
  1018. }
  1019. if (flash_verbose)
  1020. puts (" done\n");
  1021. return rcode;
  1022. }
  1023. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  1024. static int sector_erased(flash_info_t *info, int i)
  1025. {
  1026. int k;
  1027. int size;
  1028. u32 *flash;
  1029. /*
  1030. * Check if whole sector is erased
  1031. */
  1032. size = flash_sector_size(info, i);
  1033. flash = (u32 *)info->start[i];
  1034. /* divide by 4 for longword access */
  1035. size = size >> 2;
  1036. for (k = 0; k < size; k++) {
  1037. if (flash_read32(flash++) != 0xffffffff)
  1038. return 0; /* not erased */
  1039. }
  1040. return 1; /* erased */
  1041. }
  1042. #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
  1043. void flash_print_info (flash_info_t * info)
  1044. {
  1045. int i;
  1046. if (info->flash_id != FLASH_MAN_CFI) {
  1047. puts ("missing or unknown FLASH type\n");
  1048. return;
  1049. }
  1050. printf ("%s flash (%d x %d)",
  1051. info->name,
  1052. (info->portwidth << 3), (info->chipwidth << 3));
  1053. if (info->size < 1024*1024)
  1054. printf (" Size: %ld kB in %d Sectors\n",
  1055. info->size >> 10, info->sector_count);
  1056. else
  1057. printf (" Size: %ld MB in %d Sectors\n",
  1058. info->size >> 20, info->sector_count);
  1059. printf (" ");
  1060. switch (info->vendor) {
  1061. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1062. printf ("Intel Prog Regions");
  1063. break;
  1064. case CFI_CMDSET_INTEL_STANDARD:
  1065. printf ("Intel Standard");
  1066. break;
  1067. case CFI_CMDSET_INTEL_EXTENDED:
  1068. printf ("Intel Extended");
  1069. break;
  1070. case CFI_CMDSET_AMD_STANDARD:
  1071. printf ("AMD Standard");
  1072. break;
  1073. case CFI_CMDSET_AMD_EXTENDED:
  1074. printf ("AMD Extended");
  1075. break;
  1076. #ifdef CONFIG_FLASH_CFI_LEGACY
  1077. case CFI_CMDSET_AMD_LEGACY:
  1078. printf ("AMD Legacy");
  1079. break;
  1080. #endif
  1081. default:
  1082. printf ("Unknown (%d)", info->vendor);
  1083. break;
  1084. }
  1085. printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
  1086. info->manufacturer_id);
  1087. printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
  1088. info->device_id);
  1089. if (info->device_id == 0x7E) {
  1090. printf("%04X", info->device_id2);
  1091. }
  1092. printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
  1093. info->erase_blk_tout,
  1094. info->write_tout);
  1095. if (info->buffer_size > 1) {
  1096. printf (" Buffer write timeout: %ld ms, "
  1097. "buffer size: %d bytes\n",
  1098. info->buffer_write_tout,
  1099. info->buffer_size);
  1100. }
  1101. puts ("\n Sector Start Addresses:");
  1102. for (i = 0; i < info->sector_count; ++i) {
  1103. if (ctrlc())
  1104. break;
  1105. if ((i % 5) == 0)
  1106. putc('\n');
  1107. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  1108. /* print empty and read-only info */
  1109. printf (" %08lX %c %s ",
  1110. info->start[i],
  1111. sector_erased(info, i) ? 'E' : ' ',
  1112. info->protect[i] ? "RO" : " ");
  1113. #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
  1114. printf (" %08lX %s ",
  1115. info->start[i],
  1116. info->protect[i] ? "RO" : " ");
  1117. #endif
  1118. }
  1119. putc ('\n');
  1120. return;
  1121. }
  1122. /*-----------------------------------------------------------------------
  1123. * This is used in a few places in write_buf() to show programming
  1124. * progress. Making it a function is nasty because it needs to do side
  1125. * effect updates to digit and dots. Repeated code is nasty too, so
  1126. * we define it once here.
  1127. */
  1128. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1129. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
  1130. if (flash_verbose) { \
  1131. dots -= dots_sub; \
  1132. if ((scale > 0) && (dots <= 0)) { \
  1133. if ((digit % 5) == 0) \
  1134. printf ("%d", digit / 5); \
  1135. else \
  1136. putc ('.'); \
  1137. digit--; \
  1138. dots += scale; \
  1139. } \
  1140. }
  1141. #else
  1142. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
  1143. #endif
  1144. /*-----------------------------------------------------------------------
  1145. * Copy memory to flash, returns:
  1146. * 0 - OK
  1147. * 1 - write timeout
  1148. * 2 - Flash not erased
  1149. */
  1150. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
  1151. {
  1152. ulong wp;
  1153. uchar *p;
  1154. int aln;
  1155. cfiword_t cword;
  1156. int i, rc;
  1157. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1158. int buffered_size;
  1159. #endif
  1160. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1161. int digit = CONFIG_FLASH_SHOW_PROGRESS;
  1162. int scale = 0;
  1163. int dots = 0;
  1164. /*
  1165. * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
  1166. */
  1167. if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
  1168. scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
  1169. CONFIG_FLASH_SHOW_PROGRESS);
  1170. }
  1171. #endif
  1172. /* get lower aligned address */
  1173. wp = (addr & ~(info->portwidth - 1));
  1174. /* handle unaligned start */
  1175. if ((aln = addr - wp) != 0) {
  1176. cword.l = 0;
  1177. p = (uchar *)wp;
  1178. for (i = 0; i < aln; ++i)
  1179. flash_add_byte (info, &cword, flash_read8(p + i));
  1180. for (; (i < info->portwidth) && (cnt > 0); i++) {
  1181. flash_add_byte (info, &cword, *src++);
  1182. cnt--;
  1183. }
  1184. for (; (cnt == 0) && (i < info->portwidth); ++i)
  1185. flash_add_byte (info, &cword, flash_read8(p + i));
  1186. rc = flash_write_cfiword (info, wp, cword);
  1187. if (rc != 0)
  1188. return rc;
  1189. wp += i;
  1190. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1191. }
  1192. /* handle the aligned part */
  1193. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1194. buffered_size = (info->portwidth / info->chipwidth);
  1195. buffered_size *= info->buffer_size;
  1196. while (cnt >= info->portwidth) {
  1197. /* prohibit buffer write when buffer_size is 1 */
  1198. if (info->buffer_size == 1) {
  1199. cword.l = 0;
  1200. for (i = 0; i < info->portwidth; i++)
  1201. flash_add_byte (info, &cword, *src++);
  1202. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1203. return rc;
  1204. wp += info->portwidth;
  1205. cnt -= info->portwidth;
  1206. continue;
  1207. }
  1208. /* write buffer until next buffered_size aligned boundary */
  1209. i = buffered_size - (wp % buffered_size);
  1210. if (i > cnt)
  1211. i = cnt;
  1212. if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
  1213. return rc;
  1214. i -= i & (info->portwidth - 1);
  1215. wp += i;
  1216. src += i;
  1217. cnt -= i;
  1218. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1219. }
  1220. #else
  1221. while (cnt >= info->portwidth) {
  1222. cword.l = 0;
  1223. for (i = 0; i < info->portwidth; i++) {
  1224. flash_add_byte (info, &cword, *src++);
  1225. }
  1226. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1227. return rc;
  1228. wp += info->portwidth;
  1229. cnt -= info->portwidth;
  1230. FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
  1231. }
  1232. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  1233. if (cnt == 0) {
  1234. return (0);
  1235. }
  1236. /*
  1237. * handle unaligned tail bytes
  1238. */
  1239. cword.l = 0;
  1240. p = (uchar *)wp;
  1241. for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
  1242. flash_add_byte (info, &cword, *src++);
  1243. --cnt;
  1244. }
  1245. for (; i < info->portwidth; ++i)
  1246. flash_add_byte (info, &cword, flash_read8(p + i));
  1247. return flash_write_cfiword (info, wp, cword);
  1248. }
  1249. /*-----------------------------------------------------------------------
  1250. */
  1251. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1252. int flash_real_protect (flash_info_t * info, long sector, int prot)
  1253. {
  1254. int retcode = 0;
  1255. switch (info->vendor) {
  1256. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1257. case CFI_CMDSET_INTEL_STANDARD:
  1258. case CFI_CMDSET_INTEL_EXTENDED:
  1259. /*
  1260. * see errata called
  1261. * "Numonyx Axcell P33/P30 Specification Update" :)
  1262. */
  1263. flash_write_cmd (info, sector, 0, FLASH_CMD_READ_ID);
  1264. if (!flash_isequal (info, sector, FLASH_OFFSET_PROTECT,
  1265. prot)) {
  1266. /*
  1267. * cmd must come before FLASH_CMD_PROTECT + 20us
  1268. * Disable interrupts which might cause a timeout here.
  1269. */
  1270. int flag = disable_interrupts ();
  1271. unsigned short cmd;
  1272. if (prot)
  1273. cmd = FLASH_CMD_PROTECT_SET;
  1274. else
  1275. cmd = FLASH_CMD_PROTECT_CLEAR;
  1276. flash_write_cmd (info, sector, 0,
  1277. FLASH_CMD_PROTECT);
  1278. flash_write_cmd (info, sector, 0, cmd);
  1279. /* re-enable interrupts if necessary */
  1280. if (flag)
  1281. enable_interrupts ();
  1282. }
  1283. break;
  1284. case CFI_CMDSET_AMD_EXTENDED:
  1285. case CFI_CMDSET_AMD_STANDARD:
  1286. /* U-Boot only checks the first byte */
  1287. if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
  1288. if (prot) {
  1289. flash_unlock_seq (info, 0);
  1290. flash_write_cmd (info, 0,
  1291. info->addr_unlock1,
  1292. ATM_CMD_SOFTLOCK_START);
  1293. flash_unlock_seq (info, 0);
  1294. flash_write_cmd (info, sector, 0,
  1295. ATM_CMD_LOCK_SECT);
  1296. } else {
  1297. flash_write_cmd (info, 0,
  1298. info->addr_unlock1,
  1299. AMD_CMD_UNLOCK_START);
  1300. if (info->device_id == ATM_ID_BV6416)
  1301. flash_write_cmd (info, sector,
  1302. 0, ATM_CMD_UNLOCK_SECT);
  1303. }
  1304. }
  1305. break;
  1306. #ifdef CONFIG_FLASH_CFI_LEGACY
  1307. case CFI_CMDSET_AMD_LEGACY:
  1308. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  1309. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
  1310. if (prot)
  1311. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
  1312. else
  1313. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
  1314. #endif
  1315. };
  1316. /*
  1317. * Flash needs to be in status register read mode for
  1318. * flash_full_status_check() to work correctly
  1319. */
  1320. flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
  1321. if ((retcode =
  1322. flash_full_status_check (info, sector, info->erase_blk_tout,
  1323. prot ? "protect" : "unprotect")) == 0) {
  1324. info->protect[sector] = prot;
  1325. /*
  1326. * On some of Intel's flash chips (marked via legacy_unlock)
  1327. * unprotect unprotects all locking.
  1328. */
  1329. if ((prot == 0) && (info->legacy_unlock)) {
  1330. flash_sect_t i;
  1331. for (i = 0; i < info->sector_count; i++) {
  1332. if (info->protect[i])
  1333. flash_real_protect (info, i, 1);
  1334. }
  1335. }
  1336. }
  1337. return retcode;
  1338. }
  1339. /*-----------------------------------------------------------------------
  1340. * flash_read_user_serial - read the OneTimeProgramming cells
  1341. */
  1342. void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
  1343. int len)
  1344. {
  1345. uchar *src;
  1346. uchar *dst;
  1347. dst = buffer;
  1348. src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
  1349. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1350. memcpy (dst, src + offset, len);
  1351. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1352. flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
  1353. }
  1354. /*
  1355. * flash_read_factory_serial - read the device Id from the protection area
  1356. */
  1357. void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
  1358. int len)
  1359. {
  1360. uchar *src;
  1361. src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
  1362. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1363. memcpy (buffer, src + offset, len);
  1364. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1365. flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
  1366. }
  1367. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  1368. /*-----------------------------------------------------------------------
  1369. * Reverse the order of the erase regions in the CFI QRY structure.
  1370. * This is needed for chips that are either a) correctly detected as
  1371. * top-boot, or b) buggy.
  1372. */
  1373. static void cfi_reverse_geometry(struct cfi_qry *qry)
  1374. {
  1375. unsigned int i, j;
  1376. u32 tmp;
  1377. for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
  1378. tmp = qry->erase_region_info[i];
  1379. qry->erase_region_info[i] = qry->erase_region_info[j];
  1380. qry->erase_region_info[j] = tmp;
  1381. }
  1382. }
  1383. /*-----------------------------------------------------------------------
  1384. * read jedec ids from device and set corresponding fields in info struct
  1385. *
  1386. * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
  1387. *
  1388. */
  1389. static void cmdset_intel_read_jedec_ids(flash_info_t *info)
  1390. {
  1391. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1392. flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
  1393. udelay(1000); /* some flash are slow to respond */
  1394. info->manufacturer_id = flash_read_uchar (info,
  1395. FLASH_OFFSET_MANUFACTURER_ID);
  1396. info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
  1397. flash_read_word (info, FLASH_OFFSET_DEVICE_ID) :
  1398. flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID);
  1399. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1400. }
  1401. static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
  1402. {
  1403. info->cmd_reset = FLASH_CMD_RESET;
  1404. cmdset_intel_read_jedec_ids(info);
  1405. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1406. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1407. /* read legacy lock/unlock bit from intel flash */
  1408. if (info->ext_addr) {
  1409. info->legacy_unlock = flash_read_uchar (info,
  1410. info->ext_addr + 5) & 0x08;
  1411. }
  1412. #endif
  1413. return 0;
  1414. }
  1415. static void cmdset_amd_read_jedec_ids(flash_info_t *info)
  1416. {
  1417. ushort bankId = 0;
  1418. uchar manuId;
  1419. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1420. flash_unlock_seq(info, 0);
  1421. flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
  1422. udelay(1000); /* some flash are slow to respond */
  1423. manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
  1424. /* JEDEC JEP106Z specifies ID codes up to bank 7 */
  1425. while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
  1426. bankId += 0x100;
  1427. manuId = flash_read_uchar (info,
  1428. bankId | FLASH_OFFSET_MANUFACTURER_ID);
  1429. }
  1430. info->manufacturer_id = manuId;
  1431. switch (info->chipwidth){
  1432. case FLASH_CFI_8BIT:
  1433. info->device_id = flash_read_uchar (info,
  1434. FLASH_OFFSET_DEVICE_ID);
  1435. if (info->device_id == 0x7E) {
  1436. /* AMD 3-byte (expanded) device ids */
  1437. info->device_id2 = flash_read_uchar (info,
  1438. FLASH_OFFSET_DEVICE_ID2);
  1439. info->device_id2 <<= 8;
  1440. info->device_id2 |= flash_read_uchar (info,
  1441. FLASH_OFFSET_DEVICE_ID3);
  1442. }
  1443. break;
  1444. case FLASH_CFI_16BIT:
  1445. info->device_id = flash_read_word (info,
  1446. FLASH_OFFSET_DEVICE_ID);
  1447. break;
  1448. default:
  1449. break;
  1450. }
  1451. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1452. }
  1453. static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
  1454. {
  1455. info->cmd_reset = AMD_CMD_RESET;
  1456. cmdset_amd_read_jedec_ids(info);
  1457. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1458. return 0;
  1459. }
  1460. #ifdef CONFIG_FLASH_CFI_LEGACY
  1461. static void flash_read_jedec_ids (flash_info_t * info)
  1462. {
  1463. info->manufacturer_id = 0;
  1464. info->device_id = 0;
  1465. info->device_id2 = 0;
  1466. switch (info->vendor) {
  1467. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1468. case CFI_CMDSET_INTEL_STANDARD:
  1469. case CFI_CMDSET_INTEL_EXTENDED:
  1470. cmdset_intel_read_jedec_ids(info);
  1471. break;
  1472. case CFI_CMDSET_AMD_STANDARD:
  1473. case CFI_CMDSET_AMD_EXTENDED:
  1474. cmdset_amd_read_jedec_ids(info);
  1475. break;
  1476. default:
  1477. break;
  1478. }
  1479. }
  1480. /*-----------------------------------------------------------------------
  1481. * Call board code to request info about non-CFI flash.
  1482. * board_flash_get_legacy needs to fill in at least:
  1483. * info->portwidth, info->chipwidth and info->interface for Jedec probing.
  1484. */
  1485. static int flash_detect_legacy(phys_addr_t base, int banknum)
  1486. {
  1487. flash_info_t *info = &flash_info[banknum];
  1488. if (board_flash_get_legacy(base, banknum, info)) {
  1489. /* board code may have filled info completely. If not, we
  1490. use JEDEC ID probing. */
  1491. if (!info->vendor) {
  1492. int modes[] = {
  1493. CFI_CMDSET_AMD_STANDARD,
  1494. CFI_CMDSET_INTEL_STANDARD
  1495. };
  1496. int i;
  1497. for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
  1498. info->vendor = modes[i];
  1499. info->start[0] =
  1500. (ulong)map_physmem(base,
  1501. info->portwidth,
  1502. MAP_NOCACHE);
  1503. if (info->portwidth == FLASH_CFI_8BIT
  1504. && info->interface == FLASH_CFI_X8X16) {
  1505. info->addr_unlock1 = 0x2AAA;
  1506. info->addr_unlock2 = 0x5555;
  1507. } else {
  1508. info->addr_unlock1 = 0x5555;
  1509. info->addr_unlock2 = 0x2AAA;
  1510. }
  1511. flash_read_jedec_ids(info);
  1512. debug("JEDEC PROBE: ID %x %x %x\n",
  1513. info->manufacturer_id,
  1514. info->device_id,
  1515. info->device_id2);
  1516. if (jedec_flash_match(info, info->start[0]))
  1517. break;
  1518. else
  1519. unmap_physmem((void *)info->start[0],
  1520. MAP_NOCACHE);
  1521. }
  1522. }
  1523. switch(info->vendor) {
  1524. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1525. case CFI_CMDSET_INTEL_STANDARD:
  1526. case CFI_CMDSET_INTEL_EXTENDED:
  1527. info->cmd_reset = FLASH_CMD_RESET;
  1528. break;
  1529. case CFI_CMDSET_AMD_STANDARD:
  1530. case CFI_CMDSET_AMD_EXTENDED:
  1531. case CFI_CMDSET_AMD_LEGACY:
  1532. info->cmd_reset = AMD_CMD_RESET;
  1533. break;
  1534. }
  1535. info->flash_id = FLASH_MAN_CFI;
  1536. return 1;
  1537. }
  1538. return 0; /* use CFI */
  1539. }
  1540. #else
  1541. static inline int flash_detect_legacy(phys_addr_t base, int banknum)
  1542. {
  1543. return 0; /* use CFI */
  1544. }
  1545. #endif
  1546. /*-----------------------------------------------------------------------
  1547. * detect if flash is compatible with the Common Flash Interface (CFI)
  1548. * http://www.jedec.org/download/search/jesd68.pdf
  1549. */
  1550. static void flash_read_cfi (flash_info_t *info, void *buf,
  1551. unsigned int start, size_t len)
  1552. {
  1553. u8 *p = buf;
  1554. unsigned int i;
  1555. for (i = 0; i < len; i++)
  1556. p[i] = flash_read_uchar(info, start + i);
  1557. }
  1558. void __flash_cmd_reset(flash_info_t *info)
  1559. {
  1560. /*
  1561. * We do not yet know what kind of commandset to use, so we issue
  1562. * the reset command in both Intel and AMD variants, in the hope
  1563. * that AMD flash roms ignore the Intel command.
  1564. */
  1565. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1566. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1567. }
  1568. void flash_cmd_reset(flash_info_t *info)
  1569. __attribute__((weak,alias("__flash_cmd_reset")));
  1570. static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1571. {
  1572. int cfi_offset;
  1573. /* Issue FLASH reset command */
  1574. flash_cmd_reset(info);
  1575. for (cfi_offset=0;
  1576. cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
  1577. cfi_offset++) {
  1578. flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
  1579. FLASH_CMD_CFI);
  1580. if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
  1581. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
  1582. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
  1583. flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
  1584. sizeof(struct cfi_qry));
  1585. info->interface = le16_to_cpu(qry->interface_desc);
  1586. info->cfi_offset = flash_offset_cfi[cfi_offset];
  1587. debug ("device interface is %d\n",
  1588. info->interface);
  1589. debug ("found port %d chip %d ",
  1590. info->portwidth, info->chipwidth);
  1591. debug ("port %d bits chip %d bits\n",
  1592. info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1593. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1594. /* calculate command offsets as in the Linux driver */
  1595. info->addr_unlock1 = 0x555;
  1596. info->addr_unlock2 = 0x2aa;
  1597. /*
  1598. * modify the unlock address if we are
  1599. * in compatibility mode
  1600. */
  1601. if ( /* x8/x16 in x8 mode */
  1602. ((info->chipwidth == FLASH_CFI_BY8) &&
  1603. (info->interface == FLASH_CFI_X8X16)) ||
  1604. /* x16/x32 in x16 mode */
  1605. ((info->chipwidth == FLASH_CFI_BY16) &&
  1606. (info->interface == FLASH_CFI_X16X32)))
  1607. {
  1608. info->addr_unlock1 = 0xaaa;
  1609. info->addr_unlock2 = 0x555;
  1610. }
  1611. info->name = "CFI conformant";
  1612. return 1;
  1613. }
  1614. }
  1615. return 0;
  1616. }
  1617. static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1618. {
  1619. debug ("flash detect cfi\n");
  1620. for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
  1621. info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
  1622. for (info->chipwidth = FLASH_CFI_BY8;
  1623. info->chipwidth <= info->portwidth;
  1624. info->chipwidth <<= 1)
  1625. if (__flash_detect_cfi(info, qry))
  1626. return 1;
  1627. }
  1628. debug ("not found\n");
  1629. return 0;
  1630. }
  1631. /*
  1632. * Manufacturer-specific quirks. Add workarounds for geometry
  1633. * reversal, etc. here.
  1634. */
  1635. static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
  1636. {
  1637. /* check if flash geometry needs reversal */
  1638. if (qry->num_erase_regions > 1) {
  1639. /* reverse geometry if top boot part */
  1640. if (info->cfi_version < 0x3131) {
  1641. /* CFI < 1.1, try to guess from device id */
  1642. if ((info->device_id & 0x80) != 0)
  1643. cfi_reverse_geometry(qry);
  1644. } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
  1645. /* CFI >= 1.1, deduct from top/bottom flag */
  1646. /* note: ext_addr is valid since cfi_version > 0 */
  1647. cfi_reverse_geometry(qry);
  1648. }
  1649. }
  1650. }
  1651. static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
  1652. {
  1653. int reverse_geometry = 0;
  1654. /* Check the "top boot" bit in the PRI */
  1655. if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
  1656. reverse_geometry = 1;
  1657. /* AT49BV6416(T) list the erase regions in the wrong order.
  1658. * However, the device ID is identical with the non-broken
  1659. * AT49BV642D they differ in the high byte.
  1660. */
  1661. if (info->device_id == 0xd6 || info->device_id == 0xd2)
  1662. reverse_geometry = !reverse_geometry;
  1663. if (reverse_geometry)
  1664. cfi_reverse_geometry(qry);
  1665. }
  1666. static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
  1667. {
  1668. /* check if flash geometry needs reversal */
  1669. if (qry->num_erase_regions > 1) {
  1670. /* reverse geometry if top boot part */
  1671. if (info->cfi_version < 0x3131) {
  1672. /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */
  1673. if (info->device_id == 0x22CA ||
  1674. info->device_id == 0x2256) {
  1675. cfi_reverse_geometry(qry);
  1676. }
  1677. }
  1678. }
  1679. }
  1680. /*
  1681. * The following code cannot be run from FLASH!
  1682. *
  1683. */
  1684. ulong flash_get_size (phys_addr_t base, int banknum)
  1685. {
  1686. flash_info_t *info = &flash_info[banknum];
  1687. int i, j;
  1688. flash_sect_t sect_cnt;
  1689. phys_addr_t sector;
  1690. unsigned long tmp;
  1691. int size_ratio;
  1692. uchar num_erase_regions;
  1693. int erase_region_size;
  1694. int erase_region_count;
  1695. struct cfi_qry qry;
  1696. unsigned long max_size;
  1697. memset(&qry, 0, sizeof(qry));
  1698. info->ext_addr = 0;
  1699. info->cfi_version = 0;
  1700. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1701. info->legacy_unlock = 0;
  1702. #endif
  1703. info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
  1704. if (flash_detect_cfi (info, &qry)) {
  1705. info->vendor = le16_to_cpu(qry.p_id);
  1706. info->ext_addr = le16_to_cpu(qry.p_adr);
  1707. num_erase_regions = qry.num_erase_regions;
  1708. if (info->ext_addr) {
  1709. info->cfi_version = (ushort) flash_read_uchar (info,
  1710. info->ext_addr + 3) << 8;
  1711. info->cfi_version |= (ushort) flash_read_uchar (info,
  1712. info->ext_addr + 4);
  1713. }
  1714. #ifdef DEBUG
  1715. flash_printqry (&qry);
  1716. #endif
  1717. switch (info->vendor) {
  1718. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1719. case CFI_CMDSET_INTEL_STANDARD:
  1720. case CFI_CMDSET_INTEL_EXTENDED:
  1721. cmdset_intel_init(info, &qry);
  1722. break;
  1723. case CFI_CMDSET_AMD_STANDARD:
  1724. case CFI_CMDSET_AMD_EXTENDED:
  1725. cmdset_amd_init(info, &qry);
  1726. break;
  1727. default:
  1728. printf("CFI: Unknown command set 0x%x\n",
  1729. info->vendor);
  1730. /*
  1731. * Unfortunately, this means we don't know how
  1732. * to get the chip back to Read mode. Might
  1733. * as well try an Intel-style reset...
  1734. */
  1735. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1736. return 0;
  1737. }
  1738. /* Do manufacturer-specific fixups */
  1739. switch (info->manufacturer_id) {
  1740. case 0x0001: /* AMD */
  1741. case 0x0037: /* AMIC */
  1742. flash_fixup_amd(info, &qry);
  1743. break;
  1744. case 0x001f:
  1745. flash_fixup_atmel(info, &qry);
  1746. break;
  1747. case 0x0020:
  1748. flash_fixup_stm(info, &qry);
  1749. break;
  1750. }
  1751. debug ("manufacturer is %d\n", info->vendor);
  1752. debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
  1753. debug ("device id is 0x%x\n", info->device_id);
  1754. debug ("device id2 is 0x%x\n", info->device_id2);
  1755. debug ("cfi version is 0x%04x\n", info->cfi_version);
  1756. size_ratio = info->portwidth / info->chipwidth;
  1757. /* if the chip is x8/x16 reduce the ratio by half */
  1758. if ((info->interface == FLASH_CFI_X8X16)
  1759. && (info->chipwidth == FLASH_CFI_BY8)) {
  1760. size_ratio >>= 1;
  1761. }
  1762. debug ("size_ratio %d port %d bits chip %d bits\n",
  1763. size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1764. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1765. info->size = 1 << qry.dev_size;
  1766. /* multiply the size by the number of chips */
  1767. info->size *= size_ratio;
  1768. max_size = cfi_flash_bank_size(banknum);
  1769. if (max_size && (info->size > max_size)) {
  1770. debug("[truncated from %ldMiB]", info->size >> 20);
  1771. info->size = max_size;
  1772. }
  1773. debug ("found %d erase regions\n", num_erase_regions);
  1774. sect_cnt = 0;
  1775. sector = base;
  1776. for (i = 0; i < num_erase_regions; i++) {
  1777. if (i > NUM_ERASE_REGIONS) {
  1778. printf ("%d erase regions found, only %d used\n",
  1779. num_erase_regions, NUM_ERASE_REGIONS);
  1780. break;
  1781. }
  1782. tmp = le32_to_cpu(qry.erase_region_info[i]);
  1783. debug("erase region %u: 0x%08lx\n", i, tmp);
  1784. erase_region_count = (tmp & 0xffff) + 1;
  1785. tmp >>= 16;
  1786. erase_region_size =
  1787. (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
  1788. debug ("erase_region_count = %d erase_region_size = %d\n",
  1789. erase_region_count, erase_region_size);
  1790. for (j = 0; j < erase_region_count; j++) {
  1791. if (sector - base >= info->size)
  1792. break;
  1793. if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
  1794. printf("ERROR: too many flash sectors\n");
  1795. break;
  1796. }
  1797. info->start[sect_cnt] =
  1798. (ulong)map_physmem(sector,
  1799. info->portwidth,
  1800. MAP_NOCACHE);
  1801. sector += (erase_region_size * size_ratio);
  1802. /*
  1803. * Only read protection status from
  1804. * supported devices (intel...)
  1805. */
  1806. switch (info->vendor) {
  1807. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1808. case CFI_CMDSET_INTEL_EXTENDED:
  1809. case CFI_CMDSET_INTEL_STANDARD:
  1810. /*
  1811. * Set flash to read-id mode. Otherwise
  1812. * reading protected status is not
  1813. * guaranteed.
  1814. */
  1815. flash_write_cmd(info, sect_cnt, 0,
  1816. FLASH_CMD_READ_ID);
  1817. info->protect[sect_cnt] =
  1818. flash_isset (info, sect_cnt,
  1819. FLASH_OFFSET_PROTECT,
  1820. FLASH_STATUS_PROTECT);
  1821. break;
  1822. default:
  1823. /* default: not protected */
  1824. info->protect[sect_cnt] = 0;
  1825. }
  1826. sect_cnt++;
  1827. }
  1828. }
  1829. info->sector_count = sect_cnt;
  1830. info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
  1831. tmp = 1 << qry.block_erase_timeout_typ;
  1832. info->erase_blk_tout = tmp *
  1833. (1 << qry.block_erase_timeout_max);
  1834. tmp = (1 << qry.buf_write_timeout_typ) *
  1835. (1 << qry.buf_write_timeout_max);
  1836. /* round up when converting to ms */
  1837. info->buffer_write_tout = (tmp + 999) / 1000;
  1838. tmp = (1 << qry.word_write_timeout_typ) *
  1839. (1 << qry.word_write_timeout_max);
  1840. /* round up when converting to ms */
  1841. info->write_tout = (tmp + 999) / 1000;
  1842. info->flash_id = FLASH_MAN_CFI;
  1843. if ((info->interface == FLASH_CFI_X8X16) &&
  1844. (info->chipwidth == FLASH_CFI_BY8)) {
  1845. /* XXX - Need to test on x8/x16 in parallel. */
  1846. info->portwidth >>= 1;
  1847. }
  1848. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1849. }
  1850. return (info->size);
  1851. }
  1852. #ifdef CONFIG_FLASH_CFI_MTD
  1853. void flash_set_verbose(uint v)
  1854. {
  1855. flash_verbose = v;
  1856. }
  1857. #endif
  1858. static void cfi_flash_set_config_reg(u32 base, u16 val)
  1859. {
  1860. #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  1861. /*
  1862. * Only set this config register if really defined
  1863. * to a valid value (0xffff is invalid)
  1864. */
  1865. if (val == 0xffff)
  1866. return;
  1867. /*
  1868. * Set configuration register. Data is "encrypted" in the 16 lower
  1869. * address bits.
  1870. */
  1871. flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
  1872. flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
  1873. /*
  1874. * Finally issue reset-command to bring device back to
  1875. * read-array mode
  1876. */
  1877. flash_write16(FLASH_CMD_RESET, (void *)base);
  1878. #endif
  1879. }
  1880. /*-----------------------------------------------------------------------
  1881. */
  1882. void flash_protect_default(void)
  1883. {
  1884. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  1885. int i;
  1886. struct apl_s {
  1887. ulong start;
  1888. ulong size;
  1889. } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
  1890. #endif
  1891. /* Monitor protection ON by default */
  1892. #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
  1893. (!defined(CONFIG_MONITOR_IS_IN_RAM))
  1894. flash_protect(FLAG_PROTECT_SET,
  1895. CONFIG_SYS_MONITOR_BASE,
  1896. CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
  1897. flash_get_info(CONFIG_SYS_MONITOR_BASE));
  1898. #endif
  1899. /* Environment protection ON by default */
  1900. #ifdef CONFIG_ENV_IS_IN_FLASH
  1901. flash_protect(FLAG_PROTECT_SET,
  1902. CONFIG_ENV_ADDR,
  1903. CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
  1904. flash_get_info(CONFIG_ENV_ADDR));
  1905. #endif
  1906. /* Redundant environment protection ON by default */
  1907. #ifdef CONFIG_ENV_ADDR_REDUND
  1908. flash_protect(FLAG_PROTECT_SET,
  1909. CONFIG_ENV_ADDR_REDUND,
  1910. CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
  1911. flash_get_info(CONFIG_ENV_ADDR_REDUND));
  1912. #endif
  1913. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  1914. for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
  1915. debug("autoprotecting from %08x to %08x\n",
  1916. apl[i].start, apl[i].start + apl[i].size - 1);
  1917. flash_protect(FLAG_PROTECT_SET,
  1918. apl[i].start,
  1919. apl[i].start + apl[i].size - 1,
  1920. flash_get_info(apl[i].start));
  1921. }
  1922. #endif
  1923. }
  1924. unsigned long flash_init (void)
  1925. {
  1926. unsigned long size = 0;
  1927. int i;
  1928. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1929. /* read environment from EEPROM */
  1930. char s[64];
  1931. getenv_f("unlock", s, sizeof(s));
  1932. #endif
  1933. /* Init: no FLASHes known */
  1934. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
  1935. flash_info[i].flash_id = FLASH_UNKNOWN;
  1936. /* Optionally write flash configuration register */
  1937. cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
  1938. cfi_flash_config_reg(i));
  1939. if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
  1940. flash_get_size(cfi_flash_bank_addr(i), i);
  1941. size += flash_info[i].size;
  1942. if (flash_info[i].flash_id == FLASH_UNKNOWN) {
  1943. #ifndef CONFIG_SYS_FLASH_QUIET_TEST
  1944. printf ("## Unknown flash on Bank %d "
  1945. "- Size = 0x%08lx = %ld MB\n",
  1946. i+1, flash_info[i].size,
  1947. flash_info[i].size >> 20);
  1948. #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
  1949. }
  1950. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1951. else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
  1952. /*
  1953. * Only the U-Boot image and it's environment
  1954. * is protected, all other sectors are
  1955. * unprotected (unlocked) if flash hardware
  1956. * protection is used (CONFIG_SYS_FLASH_PROTECTION)
  1957. * and the environment variable "unlock" is
  1958. * set to "yes".
  1959. */
  1960. if (flash_info[i].legacy_unlock) {
  1961. int k;
  1962. /*
  1963. * Disable legacy_unlock temporarily,
  1964. * since flash_real_protect would
  1965. * relock all other sectors again
  1966. * otherwise.
  1967. */
  1968. flash_info[i].legacy_unlock = 0;
  1969. /*
  1970. * Legacy unlocking (e.g. Intel J3) ->
  1971. * unlock only one sector. This will
  1972. * unlock all sectors.
  1973. */
  1974. flash_real_protect (&flash_info[i], 0, 0);
  1975. flash_info[i].legacy_unlock = 1;
  1976. /*
  1977. * Manually mark other sectors as
  1978. * unlocked (unprotected)
  1979. */
  1980. for (k = 1; k < flash_info[i].sector_count; k++)
  1981. flash_info[i].protect[k] = 0;
  1982. } else {
  1983. /*
  1984. * No legancy unlocking -> unlock all sectors
  1985. */
  1986. flash_protect (FLAG_PROTECT_CLEAR,
  1987. flash_info[i].start[0],
  1988. flash_info[i].start[0]
  1989. + flash_info[i].size - 1,
  1990. &flash_info[i]);
  1991. }
  1992. }
  1993. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  1994. }
  1995. flash_protect_default();
  1996. #ifdef CONFIG_FLASH_CFI_MTD
  1997. cfi_mtd_init();
  1998. #endif
  1999. return (size);
  2000. }