ehci-hcd.c 21 KB

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  1. /*-
  2. * Copyright (c) 2007-2008, Juniper Networks, Inc.
  3. * Copyright (c) 2008, Excito Elektronik i Skåne AB
  4. * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
  5. *
  6. * All rights reserved.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation version 2 of
  11. * the License.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <asm/byteorder.h>
  25. #include <usb.h>
  26. #include <asm/io.h>
  27. #include <malloc.h>
  28. #include <watchdog.h>
  29. #include "ehci.h"
  30. int rootdev;
  31. struct ehci_hccr *hccr; /* R/O registers, not need for volatile */
  32. volatile struct ehci_hcor *hcor;
  33. static uint16_t portreset;
  34. static struct QH qh_list __attribute__((aligned(32)));
  35. static struct descriptor {
  36. struct usb_hub_descriptor hub;
  37. struct usb_device_descriptor device;
  38. struct usb_linux_config_descriptor config;
  39. struct usb_linux_interface_descriptor interface;
  40. struct usb_endpoint_descriptor endpoint;
  41. } __attribute__ ((packed)) descriptor = {
  42. {
  43. 0x8, /* bDescLength */
  44. 0x29, /* bDescriptorType: hub descriptor */
  45. 2, /* bNrPorts -- runtime modified */
  46. 0, /* wHubCharacteristics */
  47. 10, /* bPwrOn2PwrGood */
  48. 0, /* bHubCntrCurrent */
  49. {}, /* Device removable */
  50. {} /* at most 7 ports! XXX */
  51. },
  52. {
  53. 0x12, /* bLength */
  54. 1, /* bDescriptorType: UDESC_DEVICE */
  55. cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
  56. 9, /* bDeviceClass: UDCLASS_HUB */
  57. 0, /* bDeviceSubClass: UDSUBCLASS_HUB */
  58. 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */
  59. 64, /* bMaxPacketSize: 64 bytes */
  60. 0x0000, /* idVendor */
  61. 0x0000, /* idProduct */
  62. cpu_to_le16(0x0100), /* bcdDevice */
  63. 1, /* iManufacturer */
  64. 2, /* iProduct */
  65. 0, /* iSerialNumber */
  66. 1 /* bNumConfigurations: 1 */
  67. },
  68. {
  69. 0x9,
  70. 2, /* bDescriptorType: UDESC_CONFIG */
  71. cpu_to_le16(0x19),
  72. 1, /* bNumInterface */
  73. 1, /* bConfigurationValue */
  74. 0, /* iConfiguration */
  75. 0x40, /* bmAttributes: UC_SELF_POWER */
  76. 0 /* bMaxPower */
  77. },
  78. {
  79. 0x9, /* bLength */
  80. 4, /* bDescriptorType: UDESC_INTERFACE */
  81. 0, /* bInterfaceNumber */
  82. 0, /* bAlternateSetting */
  83. 1, /* bNumEndpoints */
  84. 9, /* bInterfaceClass: UICLASS_HUB */
  85. 0, /* bInterfaceSubClass: UISUBCLASS_HUB */
  86. 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
  87. 0 /* iInterface */
  88. },
  89. {
  90. 0x7, /* bLength */
  91. 5, /* bDescriptorType: UDESC_ENDPOINT */
  92. 0x81, /* bEndpointAddress:
  93. * UE_DIR_IN | EHCI_INTR_ENDPT
  94. */
  95. 3, /* bmAttributes: UE_INTERRUPT */
  96. 8, /* wMaxPacketSize */
  97. 255 /* bInterval */
  98. },
  99. };
  100. #if defined(CONFIG_EHCI_IS_TDI)
  101. #define ehci_is_TDI() (1)
  102. #else
  103. #define ehci_is_TDI() (0)
  104. #endif
  105. void __ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg)
  106. {
  107. mdelay(50);
  108. }
  109. void ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg)
  110. __attribute__((weak, alias("__ehci_powerup_fixup")));
  111. static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
  112. {
  113. uint32_t result;
  114. do {
  115. result = ehci_readl(ptr);
  116. udelay(5);
  117. if (result == ~(uint32_t)0)
  118. return -1;
  119. result &= mask;
  120. if (result == done)
  121. return 0;
  122. usec--;
  123. } while (usec > 0);
  124. return -1;
  125. }
  126. static int ehci_reset(void)
  127. {
  128. uint32_t cmd;
  129. uint32_t tmp;
  130. uint32_t *reg_ptr;
  131. int ret = 0;
  132. cmd = ehci_readl(&hcor->or_usbcmd);
  133. cmd = (cmd & ~CMD_RUN) | CMD_RESET;
  134. ehci_writel(&hcor->or_usbcmd, cmd);
  135. ret = handshake((uint32_t *)&hcor->or_usbcmd, CMD_RESET, 0, 250 * 1000);
  136. if (ret < 0) {
  137. printf("EHCI fail to reset\n");
  138. goto out;
  139. }
  140. if (ehci_is_TDI()) {
  141. reg_ptr = (uint32_t *)((u8 *)hcor + USBMODE);
  142. tmp = ehci_readl(reg_ptr);
  143. tmp |= USBMODE_CM_HC;
  144. #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
  145. tmp |= USBMODE_BE;
  146. #endif
  147. ehci_writel(reg_ptr, tmp);
  148. }
  149. #ifdef CONFIG_USB_EHCI_TXFIFO_THRESH
  150. cmd = ehci_readl(&hcor->or_txfilltuning);
  151. cmd &= ~TXFIFO_THRESH(0x3f);
  152. cmd |= TXFIFO_THRESH(CONFIG_USB_EHCI_TXFIFO_THRESH);
  153. ehci_writel(&hcor->or_txfilltuning, cmd);
  154. #endif
  155. out:
  156. return ret;
  157. }
  158. static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
  159. {
  160. uint32_t delta, next;
  161. uint32_t addr = (uint32_t)buf;
  162. size_t rsz = roundup(sz, 32);
  163. int idx;
  164. if (sz != rsz)
  165. debug("EHCI-HCD: Misaligned buffer size (%08x)\n", sz);
  166. if (addr & 31)
  167. debug("EHCI-HCD: Misaligned buffer address (%p)\n", buf);
  168. idx = 0;
  169. while (idx < 5) {
  170. flush_dcache_range(addr, addr + rsz);
  171. td->qt_buffer[idx] = cpu_to_hc32(addr);
  172. td->qt_buffer_hi[idx] = 0;
  173. next = (addr + 4096) & ~4095;
  174. delta = next - addr;
  175. if (delta >= sz)
  176. break;
  177. sz -= delta;
  178. addr = next;
  179. idx++;
  180. }
  181. if (idx == 5) {
  182. debug("out of buffer pointers (%u bytes left)\n", sz);
  183. return -1;
  184. }
  185. return 0;
  186. }
  187. static int
  188. ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
  189. int length, struct devrequest *req)
  190. {
  191. static struct QH qh __attribute__((aligned(32)));
  192. static struct qTD qtd[3] __attribute__((aligned (32)));
  193. int qtd_counter = 0;
  194. volatile struct qTD *vtd;
  195. unsigned long ts;
  196. uint32_t *tdp;
  197. uint32_t endpt, token, usbsts;
  198. uint32_t c, toggle;
  199. uint32_t cmd;
  200. int timeout;
  201. int ret = 0;
  202. debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
  203. buffer, length, req);
  204. if (req != NULL)
  205. debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
  206. req->request, req->request,
  207. req->requesttype, req->requesttype,
  208. le16_to_cpu(req->value), le16_to_cpu(req->value),
  209. le16_to_cpu(req->index));
  210. memset(&qh, 0, sizeof(struct QH));
  211. memset(qtd, 0, sizeof(qtd));
  212. toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
  213. /*
  214. * Setup QH (3.6 in ehci-r10.pdf)
  215. *
  216. * qh_link ................. 03-00 H
  217. * qh_endpt1 ............... 07-04 H
  218. * qh_endpt2 ............... 0B-08 H
  219. * - qh_curtd
  220. * qh_overlay.qt_next ...... 13-10 H
  221. * - qh_overlay.qt_altnext
  222. */
  223. qh.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
  224. c = (usb_pipespeed(pipe) != USB_SPEED_HIGH &&
  225. usb_pipeendpoint(pipe) == 0) ? 1 : 0;
  226. endpt = (8 << 28) |
  227. (c << 27) |
  228. (usb_maxpacket(dev, pipe) << 16) |
  229. (0 << 15) |
  230. (1 << 14) |
  231. (usb_pipespeed(pipe) << 12) |
  232. (usb_pipeendpoint(pipe) << 8) |
  233. (0 << 7) | (usb_pipedevice(pipe) << 0);
  234. qh.qh_endpt1 = cpu_to_hc32(endpt);
  235. endpt = (1 << 30) |
  236. (dev->portnr << 23) |
  237. (dev->parent->devnum << 16) | (0 << 8) | (0 << 0);
  238. qh.qh_endpt2 = cpu_to_hc32(endpt);
  239. qh.qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
  240. tdp = &qh.qh_overlay.qt_next;
  241. if (req != NULL) {
  242. /*
  243. * Setup request qTD (3.5 in ehci-r10.pdf)
  244. *
  245. * qt_next ................ 03-00 H
  246. * qt_altnext ............. 07-04 H
  247. * qt_token ............... 0B-08 H
  248. *
  249. * [ buffer, buffer_hi ] loaded with "req".
  250. */
  251. qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
  252. qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
  253. token = (0 << 31) |
  254. (sizeof(*req) << 16) |
  255. (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0);
  256. qtd[qtd_counter].qt_token = cpu_to_hc32(token);
  257. if (ehci_td_buffer(&qtd[qtd_counter], req, sizeof(*req)) != 0) {
  258. debug("unable construct SETUP td\n");
  259. goto fail;
  260. }
  261. /* Update previous qTD! */
  262. *tdp = cpu_to_hc32((uint32_t)&qtd[qtd_counter]);
  263. tdp = &qtd[qtd_counter++].qt_next;
  264. toggle = 1;
  265. }
  266. if (length > 0 || req == NULL) {
  267. /*
  268. * Setup request qTD (3.5 in ehci-r10.pdf)
  269. *
  270. * qt_next ................ 03-00 H
  271. * qt_altnext ............. 07-04 H
  272. * qt_token ............... 0B-08 H
  273. *
  274. * [ buffer, buffer_hi ] loaded with "buffer".
  275. */
  276. qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
  277. qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
  278. token = (toggle << 31) |
  279. (length << 16) |
  280. ((req == NULL ? 1 : 0) << 15) |
  281. (0 << 12) |
  282. (3 << 10) |
  283. ((usb_pipein(pipe) ? 1 : 0) << 8) | (0x80 << 0);
  284. qtd[qtd_counter].qt_token = cpu_to_hc32(token);
  285. if (ehci_td_buffer(&qtd[qtd_counter], buffer, length) != 0) {
  286. debug("unable construct DATA td\n");
  287. goto fail;
  288. }
  289. /* Update previous qTD! */
  290. *tdp = cpu_to_hc32((uint32_t)&qtd[qtd_counter]);
  291. tdp = &qtd[qtd_counter++].qt_next;
  292. }
  293. if (req != NULL) {
  294. /*
  295. * Setup request qTD (3.5 in ehci-r10.pdf)
  296. *
  297. * qt_next ................ 03-00 H
  298. * qt_altnext ............. 07-04 H
  299. * qt_token ............... 0B-08 H
  300. */
  301. qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
  302. qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
  303. token = (toggle << 31) |
  304. (0 << 16) |
  305. (1 << 15) |
  306. (0 << 12) |
  307. (3 << 10) |
  308. ((usb_pipein(pipe) ? 0 : 1) << 8) | (0x80 << 0);
  309. qtd[qtd_counter].qt_token = cpu_to_hc32(token);
  310. /* Update previous qTD! */
  311. *tdp = cpu_to_hc32((uint32_t)&qtd[qtd_counter]);
  312. tdp = &qtd[qtd_counter++].qt_next;
  313. }
  314. qh_list.qh_link = cpu_to_hc32((uint32_t)&qh | QH_LINK_TYPE_QH);
  315. /* Flush dcache */
  316. flush_dcache_range((uint32_t)&qh_list,
  317. (uint32_t)&qh_list + sizeof(struct QH));
  318. flush_dcache_range((uint32_t)&qh, (uint32_t)&qh + sizeof(struct QH));
  319. flush_dcache_range((uint32_t)qtd, (uint32_t)qtd + sizeof(qtd));
  320. usbsts = ehci_readl(&hcor->or_usbsts);
  321. ehci_writel(&hcor->or_usbsts, (usbsts & 0x3f));
  322. /* Enable async. schedule. */
  323. cmd = ehci_readl(&hcor->or_usbcmd);
  324. cmd |= CMD_ASE;
  325. ehci_writel(&hcor->or_usbcmd, cmd);
  326. ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, STD_ASS,
  327. 100 * 1000);
  328. if (ret < 0) {
  329. printf("EHCI fail timeout STD_ASS set\n");
  330. goto fail;
  331. }
  332. /* Wait for TDs to be processed. */
  333. ts = get_timer(0);
  334. vtd = &qtd[qtd_counter - 1];
  335. timeout = USB_TIMEOUT_MS(pipe);
  336. do {
  337. /* Invalidate dcache */
  338. invalidate_dcache_range((uint32_t)&qh_list,
  339. (uint32_t)&qh_list + sizeof(struct QH));
  340. invalidate_dcache_range((uint32_t)&qh,
  341. (uint32_t)&qh + sizeof(struct QH));
  342. invalidate_dcache_range((uint32_t)qtd,
  343. (uint32_t)qtd + sizeof(qtd));
  344. token = hc32_to_cpu(vtd->qt_token);
  345. if (!(token & 0x80))
  346. break;
  347. WATCHDOG_RESET();
  348. } while (get_timer(ts) < timeout);
  349. /* Invalidate the memory area occupied by buffer */
  350. invalidate_dcache_range(((uint32_t)buffer & ~31),
  351. ((uint32_t)buffer & ~31) + roundup(length, 32));
  352. /* Check that the TD processing happened */
  353. if (token & 0x80) {
  354. printf("EHCI timed out on TD - token=%#x\n", token);
  355. }
  356. /* Disable async schedule. */
  357. cmd = ehci_readl(&hcor->or_usbcmd);
  358. cmd &= ~CMD_ASE;
  359. ehci_writel(&hcor->or_usbcmd, cmd);
  360. ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, 0,
  361. 100 * 1000);
  362. if (ret < 0) {
  363. printf("EHCI fail timeout STD_ASS reset\n");
  364. goto fail;
  365. }
  366. qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
  367. token = hc32_to_cpu(qh.qh_overlay.qt_token);
  368. if (!(token & 0x80)) {
  369. debug("TOKEN=%#x\n", token);
  370. switch (token & 0xfc) {
  371. case 0:
  372. toggle = token >> 31;
  373. usb_settoggle(dev, usb_pipeendpoint(pipe),
  374. usb_pipeout(pipe), toggle);
  375. dev->status = 0;
  376. break;
  377. case 0x40:
  378. dev->status = USB_ST_STALLED;
  379. break;
  380. case 0xa0:
  381. case 0x20:
  382. dev->status = USB_ST_BUF_ERR;
  383. break;
  384. case 0x50:
  385. case 0x10:
  386. dev->status = USB_ST_BABBLE_DET;
  387. break;
  388. default:
  389. dev->status = USB_ST_CRC_ERR;
  390. if ((token & 0x40) == 0x40)
  391. dev->status |= USB_ST_STALLED;
  392. break;
  393. }
  394. dev->act_len = length - ((token >> 16) & 0x7fff);
  395. } else {
  396. dev->act_len = 0;
  397. debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
  398. dev->devnum, ehci_readl(&hcor->or_usbsts),
  399. ehci_readl(&hcor->or_portsc[0]),
  400. ehci_readl(&hcor->or_portsc[1]));
  401. }
  402. return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
  403. fail:
  404. return -1;
  405. }
  406. static inline int min3(int a, int b, int c)
  407. {
  408. if (b < a)
  409. a = b;
  410. if (c < a)
  411. a = c;
  412. return a;
  413. }
  414. int
  415. ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
  416. int length, struct devrequest *req)
  417. {
  418. uint8_t tmpbuf[4];
  419. u16 typeReq;
  420. void *srcptr = NULL;
  421. int len, srclen;
  422. uint32_t reg;
  423. uint32_t *status_reg;
  424. if (le16_to_cpu(req->index) > CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
  425. printf("The request port(%d) is not configured\n",
  426. le16_to_cpu(req->index) - 1);
  427. return -1;
  428. }
  429. status_reg = (uint32_t *)&hcor->or_portsc[
  430. le16_to_cpu(req->index) - 1];
  431. srclen = 0;
  432. debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
  433. req->request, req->request,
  434. req->requesttype, req->requesttype,
  435. le16_to_cpu(req->value), le16_to_cpu(req->index));
  436. typeReq = req->request | req->requesttype << 8;
  437. switch (typeReq) {
  438. case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
  439. switch (le16_to_cpu(req->value) >> 8) {
  440. case USB_DT_DEVICE:
  441. debug("USB_DT_DEVICE request\n");
  442. srcptr = &descriptor.device;
  443. srclen = 0x12;
  444. break;
  445. case USB_DT_CONFIG:
  446. debug("USB_DT_CONFIG config\n");
  447. srcptr = &descriptor.config;
  448. srclen = 0x19;
  449. break;
  450. case USB_DT_STRING:
  451. debug("USB_DT_STRING config\n");
  452. switch (le16_to_cpu(req->value) & 0xff) {
  453. case 0: /* Language */
  454. srcptr = "\4\3\1\0";
  455. srclen = 4;
  456. break;
  457. case 1: /* Vendor */
  458. srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
  459. srclen = 14;
  460. break;
  461. case 2: /* Product */
  462. srcptr = "\52\3E\0H\0C\0I\0 "
  463. "\0H\0o\0s\0t\0 "
  464. "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
  465. srclen = 42;
  466. break;
  467. default:
  468. debug("unknown value DT_STRING %x\n",
  469. le16_to_cpu(req->value));
  470. goto unknown;
  471. }
  472. break;
  473. default:
  474. debug("unknown value %x\n", le16_to_cpu(req->value));
  475. goto unknown;
  476. }
  477. break;
  478. case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
  479. switch (le16_to_cpu(req->value) >> 8) {
  480. case USB_DT_HUB:
  481. debug("USB_DT_HUB config\n");
  482. srcptr = &descriptor.hub;
  483. srclen = 0x8;
  484. break;
  485. default:
  486. debug("unknown value %x\n", le16_to_cpu(req->value));
  487. goto unknown;
  488. }
  489. break;
  490. case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
  491. debug("USB_REQ_SET_ADDRESS\n");
  492. rootdev = le16_to_cpu(req->value);
  493. break;
  494. case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
  495. debug("USB_REQ_SET_CONFIGURATION\n");
  496. /* Nothing to do */
  497. break;
  498. case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
  499. tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */
  500. tmpbuf[1] = 0;
  501. srcptr = tmpbuf;
  502. srclen = 2;
  503. break;
  504. case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
  505. memset(tmpbuf, 0, 4);
  506. reg = ehci_readl(status_reg);
  507. if (reg & EHCI_PS_CS)
  508. tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
  509. if (reg & EHCI_PS_PE)
  510. tmpbuf[0] |= USB_PORT_STAT_ENABLE;
  511. if (reg & EHCI_PS_SUSP)
  512. tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
  513. if (reg & EHCI_PS_OCA)
  514. tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
  515. if (reg & EHCI_PS_PR)
  516. tmpbuf[0] |= USB_PORT_STAT_RESET;
  517. if (reg & EHCI_PS_PP)
  518. tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
  519. if (ehci_is_TDI()) {
  520. switch ((reg >> 26) & 3) {
  521. case 0:
  522. break;
  523. case 1:
  524. tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
  525. break;
  526. case 2:
  527. default:
  528. tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
  529. break;
  530. }
  531. } else {
  532. tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
  533. }
  534. if (reg & EHCI_PS_CSC)
  535. tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
  536. if (reg & EHCI_PS_PEC)
  537. tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
  538. if (reg & EHCI_PS_OCC)
  539. tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
  540. if (portreset & (1 << le16_to_cpu(req->index)))
  541. tmpbuf[2] |= USB_PORT_STAT_C_RESET;
  542. srcptr = tmpbuf;
  543. srclen = 4;
  544. break;
  545. case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
  546. reg = ehci_readl(status_reg);
  547. reg &= ~EHCI_PS_CLEAR;
  548. switch (le16_to_cpu(req->value)) {
  549. case USB_PORT_FEAT_ENABLE:
  550. reg |= EHCI_PS_PE;
  551. ehci_writel(status_reg, reg);
  552. break;
  553. case USB_PORT_FEAT_POWER:
  554. if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) {
  555. reg |= EHCI_PS_PP;
  556. ehci_writel(status_reg, reg);
  557. }
  558. break;
  559. case USB_PORT_FEAT_RESET:
  560. if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
  561. !ehci_is_TDI() &&
  562. EHCI_PS_IS_LOWSPEED(reg)) {
  563. /* Low speed device, give up ownership. */
  564. debug("port %d low speed --> companion\n",
  565. req->index - 1);
  566. reg |= EHCI_PS_PO;
  567. ehci_writel(status_reg, reg);
  568. break;
  569. } else {
  570. int ret;
  571. reg |= EHCI_PS_PR;
  572. reg &= ~EHCI_PS_PE;
  573. ehci_writel(status_reg, reg);
  574. /*
  575. * caller must wait, then call GetPortStatus
  576. * usb 2.0 specification say 50 ms resets on
  577. * root
  578. */
  579. ehci_powerup_fixup(status_reg, &reg);
  580. ehci_writel(status_reg, reg & ~EHCI_PS_PR);
  581. /*
  582. * A host controller must terminate the reset
  583. * and stabilize the state of the port within
  584. * 2 milliseconds
  585. */
  586. ret = handshake(status_reg, EHCI_PS_PR, 0,
  587. 2 * 1000);
  588. if (!ret)
  589. portreset |=
  590. 1 << le16_to_cpu(req->index);
  591. else
  592. printf("port(%d) reset error\n",
  593. le16_to_cpu(req->index) - 1);
  594. }
  595. break;
  596. default:
  597. debug("unknown feature %x\n", le16_to_cpu(req->value));
  598. goto unknown;
  599. }
  600. /* unblock posted writes */
  601. (void) ehci_readl(&hcor->or_usbcmd);
  602. break;
  603. case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
  604. reg = ehci_readl(status_reg);
  605. switch (le16_to_cpu(req->value)) {
  606. case USB_PORT_FEAT_ENABLE:
  607. reg &= ~EHCI_PS_PE;
  608. break;
  609. case USB_PORT_FEAT_C_ENABLE:
  610. reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_PE;
  611. break;
  612. case USB_PORT_FEAT_POWER:
  613. if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams)))
  614. reg = reg & ~(EHCI_PS_CLEAR | EHCI_PS_PP);
  615. case USB_PORT_FEAT_C_CONNECTION:
  616. reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_CSC;
  617. break;
  618. case USB_PORT_FEAT_OVER_CURRENT:
  619. reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC;
  620. break;
  621. case USB_PORT_FEAT_C_RESET:
  622. portreset &= ~(1 << le16_to_cpu(req->index));
  623. break;
  624. default:
  625. debug("unknown feature %x\n", le16_to_cpu(req->value));
  626. goto unknown;
  627. }
  628. ehci_writel(status_reg, reg);
  629. /* unblock posted write */
  630. (void) ehci_readl(&hcor->or_usbcmd);
  631. break;
  632. default:
  633. debug("Unknown request\n");
  634. goto unknown;
  635. }
  636. mdelay(1);
  637. len = min3(srclen, le16_to_cpu(req->length), length);
  638. if (srcptr != NULL && len > 0)
  639. memcpy(buffer, srcptr, len);
  640. else
  641. debug("Len is 0\n");
  642. dev->act_len = len;
  643. dev->status = 0;
  644. return 0;
  645. unknown:
  646. debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
  647. req->requesttype, req->request, le16_to_cpu(req->value),
  648. le16_to_cpu(req->index), le16_to_cpu(req->length));
  649. dev->act_len = 0;
  650. dev->status = USB_ST_STALLED;
  651. return -1;
  652. }
  653. int usb_lowlevel_stop(void)
  654. {
  655. return ehci_hcd_stop();
  656. }
  657. int usb_lowlevel_init(void)
  658. {
  659. uint32_t reg;
  660. uint32_t cmd;
  661. if (ehci_hcd_init() != 0)
  662. return -1;
  663. /* EHCI spec section 4.1 */
  664. if (ehci_reset() != 0)
  665. return -1;
  666. #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
  667. if (ehci_hcd_init() != 0)
  668. return -1;
  669. #endif
  670. /* Set head of reclaim list */
  671. memset(&qh_list, 0, sizeof(qh_list));
  672. qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
  673. qh_list.qh_endpt1 = cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH << 12));
  674. qh_list.qh_curtd = cpu_to_hc32(QT_NEXT_TERMINATE);
  675. qh_list.qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
  676. qh_list.qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
  677. qh_list.qh_overlay.qt_token = cpu_to_hc32(0x40);
  678. /* Set async. queue head pointer. */
  679. ehci_writel(&hcor->or_asynclistaddr, (uint32_t)&qh_list);
  680. reg = ehci_readl(&hccr->cr_hcsparams);
  681. descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
  682. printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
  683. /* Port Indicators */
  684. if (HCS_INDICATOR(reg))
  685. descriptor.hub.wHubCharacteristics |= 0x80;
  686. /* Port Power Control */
  687. if (HCS_PPC(reg))
  688. descriptor.hub.wHubCharacteristics |= 0x01;
  689. /* Start the host controller. */
  690. cmd = ehci_readl(&hcor->or_usbcmd);
  691. /*
  692. * Philips, Intel, and maybe others need CMD_RUN before the
  693. * root hub will detect new devices (why?); NEC doesn't
  694. */
  695. cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
  696. cmd |= CMD_RUN;
  697. ehci_writel(&hcor->or_usbcmd, cmd);
  698. /* take control over the ports */
  699. cmd = ehci_readl(&hcor->or_configflag);
  700. cmd |= FLAG_CF;
  701. ehci_writel(&hcor->or_configflag, cmd);
  702. /* unblock posted write */
  703. cmd = ehci_readl(&hcor->or_usbcmd);
  704. mdelay(5);
  705. reg = HC_VERSION(ehci_readl(&hccr->cr_capbase));
  706. printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
  707. rootdev = 0;
  708. return 0;
  709. }
  710. int
  711. submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  712. int length)
  713. {
  714. if (usb_pipetype(pipe) != PIPE_BULK) {
  715. debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
  716. return -1;
  717. }
  718. return ehci_submit_async(dev, pipe, buffer, length, NULL);
  719. }
  720. int
  721. submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  722. int length, struct devrequest *setup)
  723. {
  724. if (usb_pipetype(pipe) != PIPE_CONTROL) {
  725. debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
  726. return -1;
  727. }
  728. if (usb_pipedevice(pipe) == rootdev) {
  729. if (rootdev == 0)
  730. dev->speed = USB_SPEED_HIGH;
  731. return ehci_submit_root(dev, pipe, buffer, length, setup);
  732. }
  733. return ehci_submit_async(dev, pipe, buffer, length, setup);
  734. }
  735. int
  736. submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  737. int length, int interval)
  738. {
  739. debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
  740. dev, pipe, buffer, length, interval);
  741. return ehci_submit_async(dev, pipe, buffer, length, NULL);
  742. }