s3c_udc_otg.c 21 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900
  1. /*
  2. * drivers/usb/gadget/s3c_udc_otg.c
  3. * Samsung S3C on-chip full/high speed USB OTG 2.0 device controllers
  4. *
  5. * Copyright (C) 2008 for Samsung Electronics
  6. *
  7. * BSP Support for Samsung's UDC driver
  8. * available at:
  9. * git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git
  10. *
  11. * State machine bugfixes:
  12. * Marek Szyprowski <m.szyprowski@samsung.com>
  13. *
  14. * Ported to u-boot:
  15. * Marek Szyprowski <m.szyprowski@samsung.com>
  16. * Lukasz Majewski <l.majewski@samsumg.com>
  17. *
  18. * This program is free software; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License as published by
  20. * the Free Software Foundation; either version 2 of the License, or
  21. * (at your option) any later version.
  22. *
  23. * This program is distributed in the hope that it will be useful,
  24. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  26. * GNU General Public License for more details.
  27. *
  28. * You should have received a copy of the GNU General Public License
  29. * along with this program; if not, write to the Free Software
  30. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  31. *
  32. */
  33. #undef DEBUG
  34. #include <common.h>
  35. #include <asm/errno.h>
  36. #include <linux/list.h>
  37. #include <malloc.h>
  38. #include <linux/usb/ch9.h>
  39. #include <usbdescriptors.h>
  40. #include <linux/usb/gadget.h>
  41. #include <asm/byteorder.h>
  42. #include <asm/unaligned.h>
  43. #include <asm/io.h>
  44. #include <asm/mach-types.h>
  45. #include <asm/arch/gpio.h>
  46. #include "regs-otg.h"
  47. #include <usb/lin_gadget_compat.h>
  48. /***********************************************************/
  49. #define OTG_DMA_MODE 1
  50. #define DEBUG_SETUP 0
  51. #define DEBUG_EP0 0
  52. #define DEBUG_ISR 0
  53. #define DEBUG_OUT_EP 0
  54. #define DEBUG_IN_EP 0
  55. #include <usb/s3c_udc.h>
  56. #define EP0_CON 0
  57. #define EP_MASK 0xF
  58. static char *state_names[] = {
  59. "WAIT_FOR_SETUP",
  60. "DATA_STATE_XMIT",
  61. "DATA_STATE_NEED_ZLP",
  62. "WAIT_FOR_OUT_STATUS",
  63. "DATA_STATE_RECV",
  64. "WAIT_FOR_COMPLETE",
  65. "WAIT_FOR_OUT_COMPLETE",
  66. "WAIT_FOR_IN_COMPLETE",
  67. "WAIT_FOR_NULL_COMPLETE",
  68. };
  69. #define DRIVER_DESC "S3C HS USB OTG Device Driver, (c) Samsung Electronics"
  70. #define DRIVER_VERSION "15 March 2009"
  71. struct s3c_udc *the_controller;
  72. static const char driver_name[] = "s3c-udc";
  73. static const char driver_desc[] = DRIVER_DESC;
  74. static const char ep0name[] = "ep0-control";
  75. /* Max packet size*/
  76. static unsigned int ep0_fifo_size = 64;
  77. static unsigned int ep_fifo_size = 512;
  78. static unsigned int ep_fifo_size2 = 1024;
  79. static int reset_available = 1;
  80. static struct usb_ctrlrequest *usb_ctrl;
  81. static dma_addr_t usb_ctrl_dma_addr;
  82. /*
  83. Local declarations.
  84. */
  85. static int s3c_ep_enable(struct usb_ep *ep,
  86. const struct usb_endpoint_descriptor *);
  87. static int s3c_ep_disable(struct usb_ep *ep);
  88. static struct usb_request *s3c_alloc_request(struct usb_ep *ep,
  89. gfp_t gfp_flags);
  90. static void s3c_free_request(struct usb_ep *ep, struct usb_request *);
  91. static int s3c_queue(struct usb_ep *ep, struct usb_request *, gfp_t gfp_flags);
  92. static int s3c_dequeue(struct usb_ep *ep, struct usb_request *);
  93. static int s3c_fifo_status(struct usb_ep *ep);
  94. static void s3c_fifo_flush(struct usb_ep *ep);
  95. static void s3c_ep0_read(struct s3c_udc *dev);
  96. static void s3c_ep0_kick(struct s3c_udc *dev, struct s3c_ep *ep);
  97. static void s3c_handle_ep0(struct s3c_udc *dev);
  98. static int s3c_ep0_write(struct s3c_udc *dev);
  99. static int write_fifo_ep0(struct s3c_ep *ep, struct s3c_request *req);
  100. static void done(struct s3c_ep *ep, struct s3c_request *req, int status);
  101. static void stop_activity(struct s3c_udc *dev,
  102. struct usb_gadget_driver *driver);
  103. static int udc_enable(struct s3c_udc *dev);
  104. static void udc_set_address(struct s3c_udc *dev, unsigned char address);
  105. static void reconfig_usbd(void);
  106. static void set_max_pktsize(struct s3c_udc *dev, enum usb_device_speed speed);
  107. static void nuke(struct s3c_ep *ep, int status);
  108. static int s3c_udc_set_halt(struct usb_ep *_ep, int value);
  109. static void s3c_udc_set_nak(struct s3c_ep *ep);
  110. void set_udc_gadget_private_data(void *p)
  111. {
  112. debug_cond(DEBUG_SETUP != 0,
  113. "%s: the_controller: 0x%p, p: 0x%p\n", __func__,
  114. the_controller, p);
  115. the_controller->gadget.dev.device_data = p;
  116. }
  117. void *get_udc_gadget_private_data(struct usb_gadget *gadget)
  118. {
  119. return gadget->dev.device_data;
  120. }
  121. static struct usb_ep_ops s3c_ep_ops = {
  122. .enable = s3c_ep_enable,
  123. .disable = s3c_ep_disable,
  124. .alloc_request = s3c_alloc_request,
  125. .free_request = s3c_free_request,
  126. .queue = s3c_queue,
  127. .dequeue = s3c_dequeue,
  128. .set_halt = s3c_udc_set_halt,
  129. .fifo_status = s3c_fifo_status,
  130. .fifo_flush = s3c_fifo_flush,
  131. };
  132. #define create_proc_files() do {} while (0)
  133. #define remove_proc_files() do {} while (0)
  134. /***********************************************************/
  135. void __iomem *regs_otg;
  136. struct s3c_usbotg_reg *reg;
  137. struct s3c_usbotg_phy *phy;
  138. static unsigned int usb_phy_ctrl;
  139. void otg_phy_init(struct s3c_udc *dev)
  140. {
  141. dev->pdata->phy_control(1);
  142. /*USB PHY0 Enable */
  143. printf("USB PHY0 Enable\n");
  144. /* Enable PHY */
  145. writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0, usb_phy_ctrl);
  146. if (dev->pdata->usb_flags == PHY0_SLEEP) /* C210 Universal */
  147. writel((readl(&phy->phypwr)
  148. &~(PHY_0_SLEEP | OTG_DISABLE_0 | ANALOG_PWRDOWN)
  149. &~FORCE_SUSPEND_0), &phy->phypwr);
  150. else /* C110 GONI */
  151. writel((readl(&phy->phypwr) &~(OTG_DISABLE_0 | ANALOG_PWRDOWN)
  152. &~FORCE_SUSPEND_0), &phy->phypwr);
  153. writel((readl(&phy->phyclk) &~(ID_PULLUP0 | COMMON_ON_N0)) |
  154. CLK_SEL_24MHZ, &phy->phyclk); /* PLL 24Mhz */
  155. writel((readl(&phy->rstcon) &~(LINK_SW_RST | PHYLNK_SW_RST))
  156. | PHY_SW_RST0, &phy->rstcon);
  157. udelay(10);
  158. writel(readl(&phy->rstcon)
  159. &~(PHY_SW_RST0 | LINK_SW_RST | PHYLNK_SW_RST), &phy->rstcon);
  160. udelay(10);
  161. }
  162. void otg_phy_off(struct s3c_udc *dev)
  163. {
  164. /* reset controller just in case */
  165. writel(PHY_SW_RST0, &phy->rstcon);
  166. udelay(20);
  167. writel(readl(&phy->phypwr) &~PHY_SW_RST0, &phy->rstcon);
  168. udelay(20);
  169. writel(readl(&phy->phypwr) | OTG_DISABLE_0 | ANALOG_PWRDOWN
  170. | FORCE_SUSPEND_0, &phy->phypwr);
  171. writel(readl(usb_phy_ctrl) &~USB_PHY_CTRL_EN0, usb_phy_ctrl);
  172. writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)),
  173. &phy->phyclk);
  174. udelay(10000);
  175. dev->pdata->phy_control(0);
  176. }
  177. /***********************************************************/
  178. #include "s3c_udc_otg_xfer_dma.c"
  179. /*
  180. * udc_disable - disable USB device controller
  181. */
  182. static void udc_disable(struct s3c_udc *dev)
  183. {
  184. debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
  185. udc_set_address(dev, 0);
  186. dev->ep0state = WAIT_FOR_SETUP;
  187. dev->gadget.speed = USB_SPEED_UNKNOWN;
  188. dev->usb_address = 0;
  189. otg_phy_off(dev);
  190. }
  191. /*
  192. * udc_reinit - initialize software state
  193. */
  194. static void udc_reinit(struct s3c_udc *dev)
  195. {
  196. unsigned int i;
  197. debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
  198. /* device/ep0 records init */
  199. INIT_LIST_HEAD(&dev->gadget.ep_list);
  200. INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
  201. dev->ep0state = WAIT_FOR_SETUP;
  202. /* basic endpoint records init */
  203. for (i = 0; i < S3C_MAX_ENDPOINTS; i++) {
  204. struct s3c_ep *ep = &dev->ep[i];
  205. if (i != 0)
  206. list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
  207. ep->desc = 0;
  208. ep->stopped = 0;
  209. INIT_LIST_HEAD(&ep->queue);
  210. ep->pio_irqs = 0;
  211. }
  212. /* the rest was statically initialized, and is read-only */
  213. }
  214. #define BYTES2MAXP(x) (x / 8)
  215. #define MAXP2BYTES(x) (x * 8)
  216. /* until it's enabled, this UDC should be completely invisible
  217. * to any USB host.
  218. */
  219. static int udc_enable(struct s3c_udc *dev)
  220. {
  221. debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
  222. otg_phy_init(dev);
  223. reconfig_usbd();
  224. debug_cond(DEBUG_SETUP != 0,
  225. "S3C USB 2.0 OTG Controller Core Initialized : 0x%x\n",
  226. readl(&reg->gintmsk));
  227. dev->gadget.speed = USB_SPEED_UNKNOWN;
  228. return 0;
  229. }
  230. /*
  231. Register entry point for the peripheral controller driver.
  232. */
  233. int usb_gadget_register_driver(struct usb_gadget_driver *driver)
  234. {
  235. struct s3c_udc *dev = the_controller;
  236. int retval = 0;
  237. unsigned long flags;
  238. debug_cond(DEBUG_SETUP != 0, "%s: %s\n", __func__, "no name");
  239. if (!driver
  240. || (driver->speed != USB_SPEED_FULL
  241. && driver->speed != USB_SPEED_HIGH)
  242. || !driver->bind || !driver->disconnect || !driver->setup)
  243. return -EINVAL;
  244. if (!dev)
  245. return -ENODEV;
  246. if (dev->driver)
  247. return -EBUSY;
  248. spin_lock_irqsave(&dev->lock, flags);
  249. /* first hook up the driver ... */
  250. dev->driver = driver;
  251. spin_unlock_irqrestore(&dev->lock, flags);
  252. if (retval) { /* TODO */
  253. printf("target device_add failed, error %d\n", retval);
  254. return retval;
  255. }
  256. retval = driver->bind(&dev->gadget);
  257. if (retval) {
  258. debug_cond(DEBUG_SETUP != 0,
  259. "%s: bind to driver --> error %d\n",
  260. dev->gadget.name, retval);
  261. dev->driver = 0;
  262. return retval;
  263. }
  264. enable_irq(IRQ_OTG);
  265. debug_cond(DEBUG_SETUP != 0,
  266. "Registered gadget driver %s\n", dev->gadget.name);
  267. udc_enable(dev);
  268. return 0;
  269. }
  270. /*
  271. * Unregister entry point for the peripheral controller driver.
  272. */
  273. int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
  274. {
  275. struct s3c_udc *dev = the_controller;
  276. unsigned long flags;
  277. if (!dev)
  278. return -ENODEV;
  279. if (!driver || driver != dev->driver)
  280. return -EINVAL;
  281. spin_lock_irqsave(&dev->lock, flags);
  282. dev->driver = 0;
  283. stop_activity(dev, driver);
  284. spin_unlock_irqrestore(&dev->lock, flags);
  285. driver->unbind(&dev->gadget);
  286. disable_irq(IRQ_OTG);
  287. udc_disable(dev);
  288. return 0;
  289. }
  290. /*
  291. * done - retire a request; caller blocked irqs
  292. */
  293. static void done(struct s3c_ep *ep, struct s3c_request *req, int status)
  294. {
  295. unsigned int stopped = ep->stopped;
  296. debug("%s: %s %p, req = %p, stopped = %d\n",
  297. __func__, ep->ep.name, ep, &req->req, stopped);
  298. list_del_init(&req->queue);
  299. if (likely(req->req.status == -EINPROGRESS))
  300. req->req.status = status;
  301. else
  302. status = req->req.status;
  303. if (status && status != -ESHUTDOWN) {
  304. debug("complete %s req %p stat %d len %u/%u\n",
  305. ep->ep.name, &req->req, status,
  306. req->req.actual, req->req.length);
  307. }
  308. /* don't modify queue heads during completion callback */
  309. ep->stopped = 1;
  310. #ifdef DEBUG
  311. printf("calling complete callback\n");
  312. {
  313. int i, len = req->req.length;
  314. printf("pkt[%d] = ", req->req.length);
  315. if (len > 64)
  316. len = 64;
  317. for (i = 0; i < len; i++) {
  318. printf("%02x", ((u8 *)req->req.buf)[i]);
  319. if ((i & 7) == 7)
  320. printf(" ");
  321. }
  322. printf("\n");
  323. }
  324. #endif
  325. spin_unlock(&ep->dev->lock);
  326. req->req.complete(&ep->ep, &req->req);
  327. spin_lock(&ep->dev->lock);
  328. debug("callback completed\n");
  329. ep->stopped = stopped;
  330. }
  331. /*
  332. * nuke - dequeue ALL requests
  333. */
  334. static void nuke(struct s3c_ep *ep, int status)
  335. {
  336. struct s3c_request *req;
  337. debug("%s: %s %p\n", __func__, ep->ep.name, ep);
  338. /* called with irqs blocked */
  339. while (!list_empty(&ep->queue)) {
  340. req = list_entry(ep->queue.next, struct s3c_request, queue);
  341. done(ep, req, status);
  342. }
  343. }
  344. static void stop_activity(struct s3c_udc *dev,
  345. struct usb_gadget_driver *driver)
  346. {
  347. int i;
  348. /* don't disconnect drivers more than once */
  349. if (dev->gadget.speed == USB_SPEED_UNKNOWN)
  350. driver = 0;
  351. dev->gadget.speed = USB_SPEED_UNKNOWN;
  352. /* prevent new request submissions, kill any outstanding requests */
  353. for (i = 0; i < S3C_MAX_ENDPOINTS; i++) {
  354. struct s3c_ep *ep = &dev->ep[i];
  355. ep->stopped = 1;
  356. nuke(ep, -ESHUTDOWN);
  357. }
  358. /* report disconnect; the driver is already quiesced */
  359. if (driver) {
  360. spin_unlock(&dev->lock);
  361. driver->disconnect(&dev->gadget);
  362. spin_lock(&dev->lock);
  363. }
  364. /* re-init driver-visible data structures */
  365. udc_reinit(dev);
  366. }
  367. static void reconfig_usbd(void)
  368. {
  369. /* 2. Soft-reset OTG Core and then unreset again. */
  370. int i;
  371. unsigned int uTemp = writel(CORE_SOFT_RESET, &reg->grstctl);
  372. debug("Reseting OTG controller\n");
  373. writel(0<<15 /* PHY Low Power Clock sel*/
  374. |1<<14 /* Non-Periodic TxFIFO Rewind Enable*/
  375. |0x5<<10 /* Turnaround time*/
  376. |0<<9 | 0<<8 /* [0:HNP disable,1:HNP enable][ 0:SRP disable*/
  377. /* 1:SRP enable] H1= 1,1*/
  378. |0<<7 /* Ulpi DDR sel*/
  379. |0<<6 /* 0: high speed utmi+, 1: full speed serial*/
  380. |0<<4 /* 0: utmi+, 1:ulpi*/
  381. |1<<3 /* phy i/f 0:8bit, 1:16bit*/
  382. |0x7<<0, /* HS/FS Timeout**/
  383. &reg->gusbcfg);
  384. /* 3. Put the OTG device core in the disconnected state.*/
  385. uTemp = readl(&reg->dctl);
  386. uTemp |= SOFT_DISCONNECT;
  387. writel(uTemp, &reg->dctl);
  388. udelay(20);
  389. /* 4. Make the OTG device core exit from the disconnected state.*/
  390. uTemp = readl(&reg->dctl);
  391. uTemp = uTemp & ~SOFT_DISCONNECT;
  392. writel(uTemp, &reg->dctl);
  393. /* 5. Configure OTG Core to initial settings of device mode.*/
  394. /* [][1: full speed(30Mhz) 0:high speed]*/
  395. writel(EP_MISS_CNT(1) | DEV_SPEED_HIGH_SPEED_20, &reg->dcfg);
  396. mdelay(1);
  397. /* 6. Unmask the core interrupts*/
  398. writel(GINTMSK_INIT, &reg->gintmsk);
  399. /* 7. Set NAK bit of EP0, EP1, EP2*/
  400. writel(DEPCTL_EPDIS|DEPCTL_SNAK, &reg->out_endp[EP0_CON].doepctl);
  401. writel(DEPCTL_EPDIS|DEPCTL_SNAK, &reg->in_endp[EP0_CON].diepctl);
  402. for (i = 1; i < S3C_MAX_ENDPOINTS; i++) {
  403. writel(DEPCTL_EPDIS|DEPCTL_SNAK, &reg->out_endp[i].doepctl);
  404. writel(DEPCTL_EPDIS|DEPCTL_SNAK, &reg->in_endp[i].diepctl);
  405. }
  406. /* 8. Unmask EPO interrupts*/
  407. writel(((1 << EP0_CON) << DAINT_OUT_BIT)
  408. | (1 << EP0_CON), &reg->daintmsk);
  409. /* 9. Unmask device OUT EP common interrupts*/
  410. writel(DOEPMSK_INIT, &reg->doepmsk);
  411. /* 10. Unmask device IN EP common interrupts*/
  412. writel(DIEPMSK_INIT, &reg->diepmsk);
  413. /* 11. Set Rx FIFO Size (in 32-bit words) */
  414. writel(RX_FIFO_SIZE >> 2, &reg->grxfsiz);
  415. /* 12. Set Non Periodic Tx FIFO Size */
  416. writel((NPTX_FIFO_SIZE >> 2) << 16 | ((RX_FIFO_SIZE >> 2)) << 0,
  417. &reg->gnptxfsiz);
  418. for (i = 1; i < S3C_MAX_HW_ENDPOINTS; i++)
  419. writel((PTX_FIFO_SIZE >> 2) << 16 |
  420. ((RX_FIFO_SIZE + NPTX_FIFO_SIZE +
  421. PTX_FIFO_SIZE*(i-1)) >> 2) << 0,
  422. &reg->dieptxf[i-1]);
  423. /* Flush the RX FIFO */
  424. writel(RX_FIFO_FLUSH, &reg->grstctl);
  425. while (readl(&reg->grstctl) & RX_FIFO_FLUSH)
  426. debug("%s: waiting for S3C_UDC_OTG_GRSTCTL\n", __func__);
  427. /* Flush all the Tx FIFO's */
  428. writel(TX_FIFO_FLUSH_ALL, &reg->grstctl);
  429. writel(TX_FIFO_FLUSH_ALL | TX_FIFO_FLUSH, &reg->grstctl);
  430. while (readl(&reg->grstctl) & TX_FIFO_FLUSH)
  431. debug("%s: waiting for S3C_UDC_OTG_GRSTCTL\n", __func__);
  432. /* 13. Clear NAK bit of EP0, EP1, EP2*/
  433. /* For Slave mode*/
  434. /* EP0: Control OUT */
  435. writel(DEPCTL_EPDIS | DEPCTL_CNAK,
  436. &reg->out_endp[EP0_CON].doepctl);
  437. /* 14. Initialize OTG Link Core.*/
  438. writel(GAHBCFG_INIT, &reg->gahbcfg);
  439. }
  440. static void set_max_pktsize(struct s3c_udc *dev, enum usb_device_speed speed)
  441. {
  442. unsigned int ep_ctrl;
  443. int i;
  444. if (speed == USB_SPEED_HIGH) {
  445. ep0_fifo_size = 64;
  446. ep_fifo_size = 512;
  447. ep_fifo_size2 = 1024;
  448. dev->gadget.speed = USB_SPEED_HIGH;
  449. } else {
  450. ep0_fifo_size = 64;
  451. ep_fifo_size = 64;
  452. ep_fifo_size2 = 64;
  453. dev->gadget.speed = USB_SPEED_FULL;
  454. }
  455. dev->ep[0].ep.maxpacket = ep0_fifo_size;
  456. for (i = 1; i < S3C_MAX_ENDPOINTS; i++)
  457. dev->ep[i].ep.maxpacket = ep_fifo_size;
  458. /* EP0 - Control IN (64 bytes)*/
  459. ep_ctrl = readl(&reg->in_endp[EP0_CON].diepctl);
  460. writel(ep_ctrl|(0<<0), &reg->in_endp[EP0_CON].diepctl);
  461. /* EP0 - Control OUT (64 bytes)*/
  462. ep_ctrl = readl(&reg->out_endp[EP0_CON].doepctl);
  463. writel(ep_ctrl|(0<<0), &reg->out_endp[EP0_CON].doepctl);
  464. }
  465. static int s3c_ep_enable(struct usb_ep *_ep,
  466. const struct usb_endpoint_descriptor *desc)
  467. {
  468. struct s3c_ep *ep;
  469. struct s3c_udc *dev;
  470. unsigned long flags;
  471. debug("%s: %p\n", __func__, _ep);
  472. ep = container_of(_ep, struct s3c_ep, ep);
  473. if (!_ep || !desc || ep->desc || _ep->name == ep0name
  474. || desc->bDescriptorType != USB_DT_ENDPOINT
  475. || ep->bEndpointAddress != desc->bEndpointAddress
  476. || ep_maxpacket(ep) <
  477. le16_to_cpu(get_unaligned(&desc->wMaxPacketSize))) {
  478. debug("%s: bad ep or descriptor\n", __func__);
  479. return -EINVAL;
  480. }
  481. /* xfer types must match, except that interrupt ~= bulk */
  482. if (ep->bmAttributes != desc->bmAttributes
  483. && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
  484. && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
  485. debug("%s: %s type mismatch\n", __func__, _ep->name);
  486. return -EINVAL;
  487. }
  488. /* hardware _could_ do smaller, but driver doesn't */
  489. if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
  490. && le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)) !=
  491. ep_maxpacket(ep)) || !get_unaligned(&desc->wMaxPacketSize)) {
  492. debug("%s: bad %s maxpacket\n", __func__, _ep->name);
  493. return -ERANGE;
  494. }
  495. dev = ep->dev;
  496. if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
  497. debug("%s: bogus device state\n", __func__);
  498. return -ESHUTDOWN;
  499. }
  500. ep->stopped = 0;
  501. ep->desc = desc;
  502. ep->pio_irqs = 0;
  503. ep->ep.maxpacket = le16_to_cpu(get_unaligned(&desc->wMaxPacketSize));
  504. /* Reset halt state */
  505. s3c_udc_set_nak(ep);
  506. s3c_udc_set_halt(_ep, 0);
  507. spin_lock_irqsave(&ep->dev->lock, flags);
  508. s3c_udc_ep_activate(ep);
  509. spin_unlock_irqrestore(&ep->dev->lock, flags);
  510. debug("%s: enabled %s, stopped = %d, maxpacket = %d\n",
  511. __func__, _ep->name, ep->stopped, ep->ep.maxpacket);
  512. return 0;
  513. }
  514. /*
  515. * Disable EP
  516. */
  517. static int s3c_ep_disable(struct usb_ep *_ep)
  518. {
  519. struct s3c_ep *ep;
  520. unsigned long flags;
  521. debug("%s: %p\n", __func__, _ep);
  522. ep = container_of(_ep, struct s3c_ep, ep);
  523. if (!_ep || !ep->desc) {
  524. debug("%s: %s not enabled\n", __func__,
  525. _ep ? ep->ep.name : NULL);
  526. return -EINVAL;
  527. }
  528. spin_lock_irqsave(&ep->dev->lock, flags);
  529. /* Nuke all pending requests */
  530. nuke(ep, -ESHUTDOWN);
  531. ep->desc = 0;
  532. ep->stopped = 1;
  533. spin_unlock_irqrestore(&ep->dev->lock, flags);
  534. debug("%s: disabled %s\n", __func__, _ep->name);
  535. return 0;
  536. }
  537. static struct usb_request *s3c_alloc_request(struct usb_ep *ep,
  538. gfp_t gfp_flags)
  539. {
  540. struct s3c_request *req;
  541. debug("%s: %s %p\n", __func__, ep->name, ep);
  542. req = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*req));
  543. if (!req)
  544. return 0;
  545. memset(req, 0, sizeof *req);
  546. INIT_LIST_HEAD(&req->queue);
  547. return &req->req;
  548. }
  549. static void s3c_free_request(struct usb_ep *ep, struct usb_request *_req)
  550. {
  551. struct s3c_request *req;
  552. debug("%s: %p\n", __func__, ep);
  553. req = container_of(_req, struct s3c_request, req);
  554. WARN_ON(!list_empty(&req->queue));
  555. kfree(req);
  556. }
  557. /* dequeue JUST ONE request */
  558. static int s3c_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  559. {
  560. struct s3c_ep *ep;
  561. struct s3c_request *req;
  562. unsigned long flags;
  563. debug("%s: %p\n", __func__, _ep);
  564. ep = container_of(_ep, struct s3c_ep, ep);
  565. if (!_ep || ep->ep.name == ep0name)
  566. return -EINVAL;
  567. spin_lock_irqsave(&ep->dev->lock, flags);
  568. /* make sure it's actually queued on this endpoint */
  569. list_for_each_entry(req, &ep->queue, queue) {
  570. if (&req->req == _req)
  571. break;
  572. }
  573. if (&req->req != _req) {
  574. spin_unlock_irqrestore(&ep->dev->lock, flags);
  575. return -EINVAL;
  576. }
  577. done(ep, req, -ECONNRESET);
  578. spin_unlock_irqrestore(&ep->dev->lock, flags);
  579. return 0;
  580. }
  581. /*
  582. * Return bytes in EP FIFO
  583. */
  584. static int s3c_fifo_status(struct usb_ep *_ep)
  585. {
  586. int count = 0;
  587. struct s3c_ep *ep;
  588. ep = container_of(_ep, struct s3c_ep, ep);
  589. if (!_ep) {
  590. debug("%s: bad ep\n", __func__);
  591. return -ENODEV;
  592. }
  593. debug("%s: %d\n", __func__, ep_index(ep));
  594. /* LPD can't report unclaimed bytes from IN fifos */
  595. if (ep_is_in(ep))
  596. return -EOPNOTSUPP;
  597. return count;
  598. }
  599. /*
  600. * Flush EP FIFO
  601. */
  602. static void s3c_fifo_flush(struct usb_ep *_ep)
  603. {
  604. struct s3c_ep *ep;
  605. ep = container_of(_ep, struct s3c_ep, ep);
  606. if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
  607. debug("%s: bad ep\n", __func__);
  608. return;
  609. }
  610. debug("%s: %d\n", __func__, ep_index(ep));
  611. }
  612. static const struct usb_gadget_ops s3c_udc_ops = {
  613. /* current versions must always be self-powered */
  614. };
  615. static struct s3c_udc memory = {
  616. .usb_address = 0,
  617. .gadget = {
  618. .ops = &s3c_udc_ops,
  619. .ep0 = &memory.ep[0].ep,
  620. .name = driver_name,
  621. },
  622. /* control endpoint */
  623. .ep[0] = {
  624. .ep = {
  625. .name = ep0name,
  626. .ops = &s3c_ep_ops,
  627. .maxpacket = EP0_FIFO_SIZE,
  628. },
  629. .dev = &memory,
  630. .bEndpointAddress = 0,
  631. .bmAttributes = 0,
  632. .ep_type = ep_control,
  633. },
  634. /* first group of endpoints */
  635. .ep[1] = {
  636. .ep = {
  637. .name = "ep1in-bulk",
  638. .ops = &s3c_ep_ops,
  639. .maxpacket = EP_FIFO_SIZE,
  640. },
  641. .dev = &memory,
  642. .bEndpointAddress = USB_DIR_IN | 1,
  643. .bmAttributes = USB_ENDPOINT_XFER_BULK,
  644. .ep_type = ep_bulk_out,
  645. .fifo_num = 1,
  646. },
  647. .ep[2] = {
  648. .ep = {
  649. .name = "ep2out-bulk",
  650. .ops = &s3c_ep_ops,
  651. .maxpacket = EP_FIFO_SIZE,
  652. },
  653. .dev = &memory,
  654. .bEndpointAddress = USB_DIR_OUT | 2,
  655. .bmAttributes = USB_ENDPOINT_XFER_BULK,
  656. .ep_type = ep_bulk_in,
  657. .fifo_num = 2,
  658. },
  659. .ep[3] = {
  660. .ep = {
  661. .name = "ep3in-int",
  662. .ops = &s3c_ep_ops,
  663. .maxpacket = EP_FIFO_SIZE,
  664. },
  665. .dev = &memory,
  666. .bEndpointAddress = USB_DIR_IN | 3,
  667. .bmAttributes = USB_ENDPOINT_XFER_INT,
  668. .ep_type = ep_interrupt,
  669. .fifo_num = 3,
  670. },
  671. };
  672. /*
  673. * probe - binds to the platform device
  674. */
  675. int s3c_udc_probe(struct s3c_plat_otg_data *pdata)
  676. {
  677. struct s3c_udc *dev = &memory;
  678. int retval = 0, i;
  679. debug("%s: %p\n", __func__, pdata);
  680. dev->pdata = pdata;
  681. phy = (struct s3c_usbotg_phy *)pdata->regs_phy;
  682. reg = (struct s3c_usbotg_reg *)pdata->regs_otg;
  683. usb_phy_ctrl = pdata->usb_phy_ctrl;
  684. /* regs_otg = (void *)pdata->regs_otg; */
  685. dev->gadget.is_dualspeed = 1; /* Hack only*/
  686. dev->gadget.is_otg = 0;
  687. dev->gadget.is_a_peripheral = 0;
  688. dev->gadget.b_hnp_enable = 0;
  689. dev->gadget.a_hnp_support = 0;
  690. dev->gadget.a_alt_hnp_support = 0;
  691. the_controller = dev;
  692. for (i = 0; i < S3C_MAX_ENDPOINTS+1; i++) {
  693. dev->dma_buf[i] = memalign(CONFIG_SYS_CACHELINE_SIZE,
  694. DMA_BUFFER_SIZE);
  695. dev->dma_addr[i] = (dma_addr_t) dev->dma_buf[i];
  696. invalidate_dcache_range((unsigned long) dev->dma_buf[i],
  697. (unsigned long) (dev->dma_buf[i]
  698. + DMA_BUFFER_SIZE));
  699. }
  700. usb_ctrl = dev->dma_buf[0];
  701. usb_ctrl_dma_addr = dev->dma_addr[0];
  702. udc_reinit(dev);
  703. return retval;
  704. }
  705. int usb_gadget_handle_interrupts()
  706. {
  707. u32 intr_status = readl(&reg->gintsts);
  708. u32 gintmsk = readl(&reg->gintmsk);
  709. if (intr_status & gintmsk)
  710. return s3c_udc_irq(1, (void *)the_controller);
  711. return 0;
  712. }