usb_ohci.c 43 KB

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  1. /*
  2. * URB OHCI HCD (Host Controller Driver) for USB on the MPC5200.
  3. *
  4. * (C) Copyright 2003-2004
  5. * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
  6. *
  7. * (C) Copyright 2004
  8. * Pierre Aubert, Staubli Faverges <p.aubert@staubli.com>
  9. *
  10. * Note: Much of this code has been derived from Linux 2.4
  11. * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  12. * (C) Copyright 2000-2002 David Brownell
  13. *
  14. * SPDX-License-Identifier: GPL-2.0+
  15. */
  16. /*
  17. * IMPORTANT NOTES
  18. * 1 - this driver is intended for use with USB Mass Storage Devices
  19. * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
  20. */
  21. #include <common.h>
  22. #ifdef CONFIG_USB_OHCI
  23. #include <malloc.h>
  24. #include <usb.h>
  25. #include "usb_ohci.h"
  26. #include <mpc5xxx.h>
  27. #define OHCI_USE_NPS /* force NoPowerSwitching mode */
  28. #undef OHCI_VERBOSE_DEBUG /* not always helpful */
  29. #undef DEBUG
  30. #undef SHOW_INFO
  31. #undef OHCI_FILL_TRACE
  32. /* For initializing controller (mask in an HCFS mode too) */
  33. #define OHCI_CONTROL_INIT \
  34. (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  35. #define readl(a) (*((volatile u32 *)(a)))
  36. #define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
  37. #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
  38. #ifdef DEBUG
  39. #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
  40. #else
  41. #define dbg(format, arg...) do {} while(0)
  42. #endif /* DEBUG */
  43. #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
  44. #ifdef SHOW_INFO
  45. #define info(format, arg...) printf("INFO: " format "\n", ## arg)
  46. #else
  47. #define info(format, arg...) do {} while(0)
  48. #endif
  49. #define m16_swap(x) swap_16(x)
  50. #define m32_swap(x) swap_32(x)
  51. #define ohci_cpu_to_le16(x) (x)
  52. #define ohci_cpu_to_le32(x) (x)
  53. /* global ohci_t */
  54. static ohci_t gohci;
  55. /* this must be aligned to a 256 byte boundary */
  56. struct ohci_hcca ghcca[1];
  57. /* a pointer to the aligned storage */
  58. struct ohci_hcca *phcca;
  59. /* this allocates EDs for all possible endpoints */
  60. struct ohci_device ohci_dev;
  61. /* urb_priv */
  62. urb_priv_t urb_priv;
  63. /* RHSC flag */
  64. int got_rhsc;
  65. /* device which was disconnected */
  66. struct usb_device *devgone;
  67. /* flag guarding URB transation */
  68. int urb_finished = 0;
  69. /*-------------------------------------------------------------------------*/
  70. /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
  71. * The erratum (#4) description is incorrect. AMD's workaround waits
  72. * till some bits (mostly reserved) are clear; ok for all revs.
  73. */
  74. #define OHCI_QUIRK_AMD756 0xabcd
  75. #define read_roothub(hc, register, mask) ({ \
  76. u32 temp = readl (&hc->regs->roothub.register); \
  77. if (hc->flags & OHCI_QUIRK_AMD756) \
  78. while (temp & mask) \
  79. temp = readl (&hc->regs->roothub.register); \
  80. temp; })
  81. static u32 roothub_a (struct ohci *hc)
  82. { return read_roothub (hc, a, 0xfc0fe000); }
  83. static inline u32 roothub_b (struct ohci *hc)
  84. { return readl (&hc->regs->roothub.b); }
  85. static inline u32 roothub_status (struct ohci *hc)
  86. { return readl (&hc->regs->roothub.status); }
  87. static u32 roothub_portstatus (struct ohci *hc, int i)
  88. { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
  89. /* forward declaration */
  90. static int hc_interrupt (void);
  91. static void
  92. td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
  93. int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
  94. /*-------------------------------------------------------------------------*
  95. * URB support functions
  96. *-------------------------------------------------------------------------*/
  97. /* free HCD-private data associated with this URB */
  98. static void urb_free_priv (urb_priv_t * urb)
  99. {
  100. int i;
  101. int last;
  102. struct td * td;
  103. last = urb->length - 1;
  104. if (last >= 0) {
  105. for (i = 0; i <= last; i++) {
  106. td = urb->td[i];
  107. if (td) {
  108. td->usb_dev = NULL;
  109. urb->td[i] = NULL;
  110. }
  111. }
  112. }
  113. }
  114. /*-------------------------------------------------------------------------*/
  115. #ifdef DEBUG
  116. static int sohci_get_current_frame_number (struct usb_device * dev);
  117. /* debug| print the main components of an URB
  118. * small: 0) header + data packets 1) just header */
  119. static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
  120. int transfer_len, struct devrequest * setup, char * str, int small)
  121. {
  122. urb_priv_t * purb = &urb_priv;
  123. dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
  124. str,
  125. sohci_get_current_frame_number (dev),
  126. usb_pipedevice (pipe),
  127. usb_pipeendpoint (pipe),
  128. usb_pipeout (pipe)? 'O': 'I',
  129. usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
  130. (usb_pipecontrol (pipe)? "CTRL": "BULK"),
  131. purb->actual_length,
  132. transfer_len, dev->status);
  133. #ifdef OHCI_VERBOSE_DEBUG
  134. if (!small) {
  135. int i, len;
  136. if (usb_pipecontrol (pipe)) {
  137. printf (__FILE__ ": cmd(8):");
  138. for (i = 0; i < 8 ; i++)
  139. printf (" %02x", ((__u8 *) setup) [i]);
  140. printf ("\n");
  141. }
  142. if (transfer_len > 0 && buffer) {
  143. printf (__FILE__ ": data(%d/%d):",
  144. purb->actual_length,
  145. transfer_len);
  146. len = usb_pipeout (pipe)?
  147. transfer_len: purb->actual_length;
  148. for (i = 0; i < 16 && i < len; i++)
  149. printf (" %02x", ((__u8 *) buffer) [i]);
  150. printf ("%s\n", i < len? "...": "");
  151. }
  152. }
  153. #endif
  154. }
  155. /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
  156. void ep_print_int_eds (ohci_t *ohci, char * str) {
  157. int i, j;
  158. __u32 * ed_p;
  159. for (i= 0; i < 32; i++) {
  160. j = 5;
  161. ed_p = &(ohci->hcca->int_table [i]);
  162. if (*ed_p == 0)
  163. continue;
  164. printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
  165. while (*ed_p != 0 && j--) {
  166. ed_t *ed = (ed_t *)ohci_cpu_to_le32(ed_p);
  167. printf (" ed: %4x;", ed->hwINFO);
  168. ed_p = &ed->hwNextED;
  169. }
  170. printf ("\n");
  171. }
  172. }
  173. static void ohci_dump_intr_mask (char *label, __u32 mask)
  174. {
  175. dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
  176. label,
  177. mask,
  178. (mask & OHCI_INTR_MIE) ? " MIE" : "",
  179. (mask & OHCI_INTR_OC) ? " OC" : "",
  180. (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
  181. (mask & OHCI_INTR_FNO) ? " FNO" : "",
  182. (mask & OHCI_INTR_UE) ? " UE" : "",
  183. (mask & OHCI_INTR_RD) ? " RD" : "",
  184. (mask & OHCI_INTR_SF) ? " SF" : "",
  185. (mask & OHCI_INTR_WDH) ? " WDH" : "",
  186. (mask & OHCI_INTR_SO) ? " SO" : ""
  187. );
  188. }
  189. static void maybe_print_eds (char *label, __u32 value)
  190. {
  191. ed_t *edp = (ed_t *)value;
  192. if (value) {
  193. dbg ("%s %08x", label, value);
  194. dbg ("%08x", edp->hwINFO);
  195. dbg ("%08x", edp->hwTailP);
  196. dbg ("%08x", edp->hwHeadP);
  197. dbg ("%08x", edp->hwNextED);
  198. }
  199. }
  200. static char * hcfs2string (int state)
  201. {
  202. switch (state) {
  203. case OHCI_USB_RESET: return "reset";
  204. case OHCI_USB_RESUME: return "resume";
  205. case OHCI_USB_OPER: return "operational";
  206. case OHCI_USB_SUSPEND: return "suspend";
  207. }
  208. return "?";
  209. }
  210. /* dump control and status registers */
  211. static void ohci_dump_status (ohci_t *controller)
  212. {
  213. struct ohci_regs *regs = controller->regs;
  214. __u32 temp;
  215. temp = readl (&regs->revision) & 0xff;
  216. if (temp != 0x10)
  217. dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
  218. temp = readl (&regs->control);
  219. dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
  220. (temp & OHCI_CTRL_RWE) ? " RWE" : "",
  221. (temp & OHCI_CTRL_RWC) ? " RWC" : "",
  222. (temp & OHCI_CTRL_IR) ? " IR" : "",
  223. hcfs2string (temp & OHCI_CTRL_HCFS),
  224. (temp & OHCI_CTRL_BLE) ? " BLE" : "",
  225. (temp & OHCI_CTRL_CLE) ? " CLE" : "",
  226. (temp & OHCI_CTRL_IE) ? " IE" : "",
  227. (temp & OHCI_CTRL_PLE) ? " PLE" : "",
  228. temp & OHCI_CTRL_CBSR
  229. );
  230. temp = readl (&regs->cmdstatus);
  231. dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
  232. (temp & OHCI_SOC) >> 16,
  233. (temp & OHCI_OCR) ? " OCR" : "",
  234. (temp & OHCI_BLF) ? " BLF" : "",
  235. (temp & OHCI_CLF) ? " CLF" : "",
  236. (temp & OHCI_HCR) ? " HCR" : ""
  237. );
  238. ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
  239. ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
  240. maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
  241. maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
  242. maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
  243. maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
  244. maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
  245. maybe_print_eds ("donehead", readl (&regs->donehead));
  246. }
  247. static void ohci_dump_roothub (ohci_t *controller, int verbose)
  248. {
  249. __u32 temp, ndp, i;
  250. temp = roothub_a (controller);
  251. ndp = (temp & RH_A_NDP);
  252. if (verbose) {
  253. dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
  254. ((temp & RH_A_POTPGT) >> 24) & 0xff,
  255. (temp & RH_A_NOCP) ? " NOCP" : "",
  256. (temp & RH_A_OCPM) ? " OCPM" : "",
  257. (temp & RH_A_DT) ? " DT" : "",
  258. (temp & RH_A_NPS) ? " NPS" : "",
  259. (temp & RH_A_PSM) ? " PSM" : "",
  260. ndp
  261. );
  262. temp = roothub_b (controller);
  263. dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
  264. temp,
  265. (temp & RH_B_PPCM) >> 16,
  266. (temp & RH_B_DR)
  267. );
  268. temp = roothub_status (controller);
  269. dbg ("roothub.status: %08x%s%s%s%s%s%s",
  270. temp,
  271. (temp & RH_HS_CRWE) ? " CRWE" : "",
  272. (temp & RH_HS_OCIC) ? " OCIC" : "",
  273. (temp & RH_HS_LPSC) ? " LPSC" : "",
  274. (temp & RH_HS_DRWE) ? " DRWE" : "",
  275. (temp & RH_HS_OCI) ? " OCI" : "",
  276. (temp & RH_HS_LPS) ? " LPS" : ""
  277. );
  278. }
  279. for (i = 0; i < ndp; i++) {
  280. temp = roothub_portstatus (controller, i);
  281. dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
  282. i,
  283. temp,
  284. (temp & RH_PS_PRSC) ? " PRSC" : "",
  285. (temp & RH_PS_OCIC) ? " OCIC" : "",
  286. (temp & RH_PS_PSSC) ? " PSSC" : "",
  287. (temp & RH_PS_PESC) ? " PESC" : "",
  288. (temp & RH_PS_CSC) ? " CSC" : "",
  289. (temp & RH_PS_LSDA) ? " LSDA" : "",
  290. (temp & RH_PS_PPS) ? " PPS" : "",
  291. (temp & RH_PS_PRS) ? " PRS" : "",
  292. (temp & RH_PS_POCI) ? " POCI" : "",
  293. (temp & RH_PS_PSS) ? " PSS" : "",
  294. (temp & RH_PS_PES) ? " PES" : "",
  295. (temp & RH_PS_CCS) ? " CCS" : ""
  296. );
  297. }
  298. }
  299. static void ohci_dump (ohci_t *controller, int verbose)
  300. {
  301. dbg ("OHCI controller usb-%s state", controller->slot_name);
  302. /* dumps some of the state we know about */
  303. ohci_dump_status (controller);
  304. if (verbose)
  305. ep_print_int_eds (controller, "hcca");
  306. dbg ("hcca frame #%04x", controller->hcca->frame_no);
  307. ohci_dump_roothub (controller, 1);
  308. }
  309. #endif /* DEBUG */
  310. /*-------------------------------------------------------------------------*
  311. * Interface functions (URB)
  312. *-------------------------------------------------------------------------*/
  313. /* get a transfer request */
  314. int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
  315. int transfer_len, struct devrequest *setup, int interval)
  316. {
  317. ohci_t *ohci;
  318. ed_t * ed;
  319. urb_priv_t *purb_priv;
  320. int i, size = 0;
  321. ohci = &gohci;
  322. /* when controller's hung, permit only roothub cleanup attempts
  323. * such as powering down ports */
  324. if (ohci->disabled) {
  325. err("sohci_submit_job: EPIPE");
  326. return -1;
  327. }
  328. /* if we have an unfinished URB from previous transaction let's
  329. * fail and scream as quickly as possible so as not to corrupt
  330. * further communication */
  331. if (!urb_finished) {
  332. err("sohci_submit_job: URB NOT FINISHED");
  333. return -1;
  334. }
  335. /* we're about to begin a new transaction here so mark the URB unfinished */
  336. urb_finished = 0;
  337. /* every endpoint has a ed, locate and fill it */
  338. if (!(ed = ep_add_ed (dev, pipe))) {
  339. err("sohci_submit_job: ENOMEM");
  340. return -1;
  341. }
  342. /* for the private part of the URB we need the number of TDs (size) */
  343. switch (usb_pipetype (pipe)) {
  344. case PIPE_BULK: /* one TD for every 4096 Byte */
  345. size = (transfer_len - 1) / 4096 + 1;
  346. break;
  347. case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
  348. size = (transfer_len == 0)? 2:
  349. (transfer_len - 1) / 4096 + 3;
  350. break;
  351. }
  352. if (size >= (N_URB_TD - 1)) {
  353. err("need %d TDs, only have %d", size, N_URB_TD);
  354. return -1;
  355. }
  356. purb_priv = &urb_priv;
  357. purb_priv->pipe = pipe;
  358. /* fill the private part of the URB */
  359. purb_priv->length = size;
  360. purb_priv->ed = ed;
  361. purb_priv->actual_length = 0;
  362. /* allocate the TDs */
  363. /* note that td[0] was allocated in ep_add_ed */
  364. for (i = 0; i < size; i++) {
  365. purb_priv->td[i] = td_alloc (dev);
  366. if (!purb_priv->td[i]) {
  367. purb_priv->length = i;
  368. urb_free_priv (purb_priv);
  369. err("sohci_submit_job: ENOMEM");
  370. return -1;
  371. }
  372. }
  373. if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
  374. urb_free_priv (purb_priv);
  375. err("sohci_submit_job: EINVAL");
  376. return -1;
  377. }
  378. /* link the ed into a chain if is not already */
  379. if (ed->state != ED_OPER)
  380. ep_link (ohci, ed);
  381. /* fill the TDs and link it to the ed */
  382. td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
  383. return 0;
  384. }
  385. /*-------------------------------------------------------------------------*/
  386. #ifdef DEBUG
  387. /* tell us the current USB frame number */
  388. static int sohci_get_current_frame_number (struct usb_device *usb_dev)
  389. {
  390. ohci_t *ohci = &gohci;
  391. return ohci_cpu_to_le16 (ohci->hcca->frame_no);
  392. }
  393. #endif
  394. /*-------------------------------------------------------------------------*
  395. * ED handling functions
  396. *-------------------------------------------------------------------------*/
  397. /* link an ed into one of the HC chains */
  398. static int ep_link (ohci_t *ohci, ed_t *edi)
  399. {
  400. volatile ed_t *ed = edi;
  401. ed->state = ED_OPER;
  402. switch (ed->type) {
  403. case PIPE_CONTROL:
  404. ed->hwNextED = 0;
  405. if (ohci->ed_controltail == NULL) {
  406. writel (ed, &ohci->regs->ed_controlhead);
  407. } else {
  408. ohci->ed_controltail->hwNextED = ohci_cpu_to_le32 ((unsigned long)ed);
  409. }
  410. ed->ed_prev = ohci->ed_controltail;
  411. if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
  412. !ohci->ed_rm_list[1] && !ohci->sleeping) {
  413. ohci->hc_control |= OHCI_CTRL_CLE;
  414. writel (ohci->hc_control, &ohci->regs->control);
  415. }
  416. ohci->ed_controltail = edi;
  417. break;
  418. case PIPE_BULK:
  419. ed->hwNextED = 0;
  420. if (ohci->ed_bulktail == NULL) {
  421. writel (ed, &ohci->regs->ed_bulkhead);
  422. } else {
  423. ohci->ed_bulktail->hwNextED = ohci_cpu_to_le32 ((unsigned long)ed);
  424. }
  425. ed->ed_prev = ohci->ed_bulktail;
  426. if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
  427. !ohci->ed_rm_list[1] && !ohci->sleeping) {
  428. ohci->hc_control |= OHCI_CTRL_BLE;
  429. writel (ohci->hc_control, &ohci->regs->control);
  430. }
  431. ohci->ed_bulktail = edi;
  432. break;
  433. }
  434. return 0;
  435. }
  436. /*-------------------------------------------------------------------------*/
  437. /* unlink an ed from one of the HC chains.
  438. * just the link to the ed is unlinked.
  439. * the link from the ed still points to another operational ed or 0
  440. * so the HC can eventually finish the processing of the unlinked ed */
  441. static int ep_unlink (ohci_t *ohci, ed_t *edi)
  442. {
  443. volatile ed_t *ed = edi;
  444. ed->hwINFO |= ohci_cpu_to_le32 (OHCI_ED_SKIP);
  445. switch (ed->type) {
  446. case PIPE_CONTROL:
  447. if (ed->ed_prev == NULL) {
  448. if (!ed->hwNextED) {
  449. ohci->hc_control &= ~OHCI_CTRL_CLE;
  450. writel (ohci->hc_control, &ohci->regs->control);
  451. }
  452. writel (ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
  453. } else {
  454. ed->ed_prev->hwNextED = ed->hwNextED;
  455. }
  456. if (ohci->ed_controltail == ed) {
  457. ohci->ed_controltail = ed->ed_prev;
  458. } else {
  459. ((ed_t *)ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
  460. }
  461. break;
  462. case PIPE_BULK:
  463. if (ed->ed_prev == NULL) {
  464. if (!ed->hwNextED) {
  465. ohci->hc_control &= ~OHCI_CTRL_BLE;
  466. writel (ohci->hc_control, &ohci->regs->control);
  467. }
  468. writel (ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
  469. } else {
  470. ed->ed_prev->hwNextED = ed->hwNextED;
  471. }
  472. if (ohci->ed_bulktail == ed) {
  473. ohci->ed_bulktail = ed->ed_prev;
  474. } else {
  475. ((ed_t *)ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
  476. }
  477. break;
  478. }
  479. ed->state = ED_UNLINK;
  480. return 0;
  481. }
  482. /*-------------------------------------------------------------------------*/
  483. /* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
  484. * but the USB stack is a little bit stateless so we do it at every transaction
  485. * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
  486. * in all other cases the state is left unchanged
  487. * the ed info fields are setted anyway even though most of them should not change */
  488. static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
  489. {
  490. td_t *td;
  491. ed_t *ed_ret;
  492. volatile ed_t *ed;
  493. ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
  494. (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
  495. if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
  496. err("ep_add_ed: pending delete");
  497. /* pending delete request */
  498. return NULL;
  499. }
  500. if (ed->state == ED_NEW) {
  501. ed->hwINFO = ohci_cpu_to_le32 (OHCI_ED_SKIP); /* skip ed */
  502. /* dummy td; end of td list for ed */
  503. td = td_alloc (usb_dev);
  504. ed->hwTailP = ohci_cpu_to_le32 ((unsigned long)td);
  505. ed->hwHeadP = ed->hwTailP;
  506. ed->state = ED_UNLINK;
  507. ed->type = usb_pipetype (pipe);
  508. ohci_dev.ed_cnt++;
  509. }
  510. ed->hwINFO = ohci_cpu_to_le32 (usb_pipedevice (pipe)
  511. | usb_pipeendpoint (pipe) << 7
  512. | (usb_pipeisoc (pipe)? 0x8000: 0)
  513. | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
  514. | (usb_dev->speed == USB_SPEED_LOW) << 13
  515. | usb_maxpacket (usb_dev, pipe) << 16);
  516. return ed_ret;
  517. }
  518. /*-------------------------------------------------------------------------*
  519. * TD handling functions
  520. *-------------------------------------------------------------------------*/
  521. /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
  522. static void td_fill (ohci_t *ohci, unsigned int info,
  523. void *data, int len,
  524. struct usb_device *dev, int index, urb_priv_t *urb_priv)
  525. {
  526. volatile td_t *td, *td_pt;
  527. #ifdef OHCI_FILL_TRACE
  528. int i;
  529. #endif
  530. if (index > urb_priv->length) {
  531. err("index > length");
  532. return;
  533. }
  534. /* use this td as the next dummy */
  535. td_pt = urb_priv->td [index];
  536. td_pt->hwNextTD = 0;
  537. /* fill the old dummy TD */
  538. td = urb_priv->td [index] = (td_t *)(ohci_cpu_to_le32 (urb_priv->ed->hwTailP) & ~0xf);
  539. td->ed = urb_priv->ed;
  540. td->next_dl_td = NULL;
  541. td->index = index;
  542. td->data = (__u32)data;
  543. #ifdef OHCI_FILL_TRACE
  544. if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
  545. for (i = 0; i < len; i++)
  546. printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
  547. printf("\n");
  548. }
  549. #endif
  550. if (!len)
  551. data = 0;
  552. td->hwINFO = ohci_cpu_to_le32 (info);
  553. td->hwCBP = ohci_cpu_to_le32 ((unsigned long)data);
  554. if (data)
  555. td->hwBE = ohci_cpu_to_le32 ((unsigned long)(data + len - 1));
  556. else
  557. td->hwBE = 0;
  558. td->hwNextTD = ohci_cpu_to_le32 ((unsigned long)td_pt);
  559. /* append to queue */
  560. td->ed->hwTailP = td->hwNextTD;
  561. }
  562. /*-------------------------------------------------------------------------*/
  563. /* prepare all TDs of a transfer */
  564. static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
  565. int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
  566. {
  567. ohci_t *ohci = &gohci;
  568. int data_len = transfer_len;
  569. void *data;
  570. int cnt = 0;
  571. __u32 info = 0;
  572. unsigned int toggle = 0;
  573. /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
  574. if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
  575. toggle = TD_T_TOGGLE;
  576. } else {
  577. toggle = TD_T_DATA0;
  578. usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
  579. }
  580. urb->td_cnt = 0;
  581. if (data_len)
  582. data = buffer;
  583. else
  584. data = 0;
  585. switch (usb_pipetype (pipe)) {
  586. case PIPE_BULK:
  587. info = usb_pipeout (pipe)?
  588. TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
  589. while(data_len > 4096) {
  590. td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
  591. data += 4096; data_len -= 4096; cnt++;
  592. }
  593. info = usb_pipeout (pipe)?
  594. TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
  595. td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
  596. cnt++;
  597. if (!ohci->sleeping)
  598. writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
  599. break;
  600. case PIPE_CONTROL:
  601. info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
  602. td_fill (ohci, info, setup, 8, dev, cnt++, urb);
  603. if (data_len > 0) {
  604. info = usb_pipeout (pipe)?
  605. TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
  606. /* NOTE: mishandles transfers >8K, some >4K */
  607. td_fill (ohci, info, data, data_len, dev, cnt++, urb);
  608. }
  609. info = usb_pipeout (pipe)?
  610. TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
  611. td_fill (ohci, info, data, 0, dev, cnt++, urb);
  612. if (!ohci->sleeping)
  613. writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
  614. break;
  615. }
  616. if (urb->length != cnt)
  617. dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
  618. }
  619. /*-------------------------------------------------------------------------*
  620. * Done List handling functions
  621. *-------------------------------------------------------------------------*/
  622. /* calculate the transfer length and update the urb */
  623. static void dl_transfer_length(td_t * td)
  624. {
  625. __u32 tdBE, tdCBP;
  626. urb_priv_t *lurb_priv = &urb_priv;
  627. tdBE = ohci_cpu_to_le32 (td->hwBE);
  628. tdCBP = ohci_cpu_to_le32 (td->hwCBP);
  629. if (!(usb_pipecontrol(lurb_priv->pipe) &&
  630. ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
  631. if (tdBE != 0) {
  632. if (td->hwCBP == 0)
  633. lurb_priv->actual_length += tdBE - td->data + 1;
  634. else
  635. lurb_priv->actual_length += tdCBP - td->data;
  636. }
  637. }
  638. }
  639. /*-------------------------------------------------------------------------*/
  640. /* replies to the request have to be on a FIFO basis so
  641. * we reverse the reversed done-list */
  642. static td_t * dl_reverse_done_list (ohci_t *ohci)
  643. {
  644. __u32 td_list_hc;
  645. td_t *td_rev = NULL;
  646. td_t *td_list = NULL;
  647. urb_priv_t *lurb_priv = NULL;
  648. td_list_hc = ohci_cpu_to_le32 (ohci->hcca->done_head) & 0xfffffff0;
  649. ohci->hcca->done_head = 0;
  650. while (td_list_hc) {
  651. td_list = (td_t *)td_list_hc;
  652. if (TD_CC_GET (ohci_cpu_to_le32 (td_list->hwINFO))) {
  653. lurb_priv = &urb_priv;
  654. dbg(" USB-error/status: %x : %p",
  655. TD_CC_GET (ohci_cpu_to_le32 (td_list->hwINFO)), td_list);
  656. if (td_list->ed->hwHeadP & ohci_cpu_to_le32 (0x1)) {
  657. if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
  658. td_list->ed->hwHeadP =
  659. (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & ohci_cpu_to_le32 (0xfffffff0)) |
  660. (td_list->ed->hwHeadP & ohci_cpu_to_le32 (0x2));
  661. lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
  662. } else
  663. td_list->ed->hwHeadP &= ohci_cpu_to_le32 (0xfffffff2);
  664. }
  665. td_list->hwNextTD = 0;
  666. }
  667. td_list->next_dl_td = td_rev;
  668. td_rev = td_list;
  669. td_list_hc = ohci_cpu_to_le32 (td_list->hwNextTD) & 0xfffffff0;
  670. }
  671. return td_list;
  672. }
  673. /*-------------------------------------------------------------------------*/
  674. /* td done list */
  675. static int dl_done_list (ohci_t *ohci, td_t *td_list)
  676. {
  677. td_t *td_list_next = NULL;
  678. ed_t *ed;
  679. int cc = 0;
  680. int stat = 0;
  681. /* urb_t *urb; */
  682. urb_priv_t *lurb_priv;
  683. __u32 tdINFO, edHeadP, edTailP;
  684. while (td_list) {
  685. td_list_next = td_list->next_dl_td;
  686. lurb_priv = &urb_priv;
  687. tdINFO = ohci_cpu_to_le32 (td_list->hwINFO);
  688. ed = td_list->ed;
  689. dl_transfer_length(td_list);
  690. /* error code of transfer */
  691. cc = TD_CC_GET (tdINFO);
  692. if (++(lurb_priv->td_cnt) == lurb_priv->length) {
  693. if ((ed->state & (ED_OPER | ED_UNLINK))
  694. && (lurb_priv->state != URB_DEL)) {
  695. dbg("ConditionCode %#x", cc);
  696. stat = cc_to_error[cc];
  697. urb_finished = 1;
  698. }
  699. }
  700. if (ed->state != ED_NEW) {
  701. edHeadP = ohci_cpu_to_le32 (ed->hwHeadP) & 0xfffffff0;
  702. edTailP = ohci_cpu_to_le32 (ed->hwTailP);
  703. /* unlink eds if they are not busy */
  704. if ((edHeadP == edTailP) && (ed->state == ED_OPER))
  705. ep_unlink (ohci, ed);
  706. }
  707. td_list = td_list_next;
  708. }
  709. return stat;
  710. }
  711. /*-------------------------------------------------------------------------*
  712. * Virtual Root Hub
  713. *-------------------------------------------------------------------------*/
  714. /* Device descriptor */
  715. static __u8 root_hub_dev_des[] =
  716. {
  717. 0x12, /* __u8 bLength; */
  718. 0x01, /* __u8 bDescriptorType; Device */
  719. 0x10, /* __u16 bcdUSB; v1.1 */
  720. 0x01,
  721. 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
  722. 0x00, /* __u8 bDeviceSubClass; */
  723. 0x00, /* __u8 bDeviceProtocol; */
  724. 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
  725. 0x00, /* __u16 idVendor; */
  726. 0x00,
  727. 0x00, /* __u16 idProduct; */
  728. 0x00,
  729. 0x00, /* __u16 bcdDevice; */
  730. 0x00,
  731. 0x00, /* __u8 iManufacturer; */
  732. 0x01, /* __u8 iProduct; */
  733. 0x00, /* __u8 iSerialNumber; */
  734. 0x01 /* __u8 bNumConfigurations; */
  735. };
  736. /* Configuration descriptor */
  737. static __u8 root_hub_config_des[] =
  738. {
  739. 0x09, /* __u8 bLength; */
  740. 0x02, /* __u8 bDescriptorType; Configuration */
  741. 0x19, /* __u16 wTotalLength; */
  742. 0x00,
  743. 0x01, /* __u8 bNumInterfaces; */
  744. 0x01, /* __u8 bConfigurationValue; */
  745. 0x00, /* __u8 iConfiguration; */
  746. 0x40, /* __u8 bmAttributes;
  747. Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
  748. 0x00, /* __u8 MaxPower; */
  749. /* interface */
  750. 0x09, /* __u8 if_bLength; */
  751. 0x04, /* __u8 if_bDescriptorType; Interface */
  752. 0x00, /* __u8 if_bInterfaceNumber; */
  753. 0x00, /* __u8 if_bAlternateSetting; */
  754. 0x01, /* __u8 if_bNumEndpoints; */
  755. 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
  756. 0x00, /* __u8 if_bInterfaceSubClass; */
  757. 0x00, /* __u8 if_bInterfaceProtocol; */
  758. 0x00, /* __u8 if_iInterface; */
  759. /* endpoint */
  760. 0x07, /* __u8 ep_bLength; */
  761. 0x05, /* __u8 ep_bDescriptorType; Endpoint */
  762. 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
  763. 0x03, /* __u8 ep_bmAttributes; Interrupt */
  764. 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
  765. 0x00,
  766. 0xff /* __u8 ep_bInterval; 255 ms */
  767. };
  768. static unsigned char root_hub_str_index0[] =
  769. {
  770. 0x04, /* __u8 bLength; */
  771. 0x03, /* __u8 bDescriptorType; String-descriptor */
  772. 0x09, /* __u8 lang ID */
  773. 0x04, /* __u8 lang ID */
  774. };
  775. static unsigned char root_hub_str_index1[] =
  776. {
  777. 28, /* __u8 bLength; */
  778. 0x03, /* __u8 bDescriptorType; String-descriptor */
  779. 'O', /* __u8 Unicode */
  780. 0, /* __u8 Unicode */
  781. 'H', /* __u8 Unicode */
  782. 0, /* __u8 Unicode */
  783. 'C', /* __u8 Unicode */
  784. 0, /* __u8 Unicode */
  785. 'I', /* __u8 Unicode */
  786. 0, /* __u8 Unicode */
  787. ' ', /* __u8 Unicode */
  788. 0, /* __u8 Unicode */
  789. 'R', /* __u8 Unicode */
  790. 0, /* __u8 Unicode */
  791. 'o', /* __u8 Unicode */
  792. 0, /* __u8 Unicode */
  793. 'o', /* __u8 Unicode */
  794. 0, /* __u8 Unicode */
  795. 't', /* __u8 Unicode */
  796. 0, /* __u8 Unicode */
  797. ' ', /* __u8 Unicode */
  798. 0, /* __u8 Unicode */
  799. 'H', /* __u8 Unicode */
  800. 0, /* __u8 Unicode */
  801. 'u', /* __u8 Unicode */
  802. 0, /* __u8 Unicode */
  803. 'b', /* __u8 Unicode */
  804. 0, /* __u8 Unicode */
  805. };
  806. /* Hub class-specific descriptor is constructed dynamically */
  807. /*-------------------------------------------------------------------------*/
  808. #define OK(x) len = (x); break
  809. #ifdef DEBUG
  810. #define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
  811. #define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
  812. #else
  813. #define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
  814. #define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
  815. #endif
  816. #define RD_RH_STAT roothub_status(&gohci)
  817. #define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
  818. /* request to virtual root hub */
  819. int rh_check_port_status(ohci_t *controller)
  820. {
  821. __u32 temp, ndp, i;
  822. int res;
  823. res = -1;
  824. temp = roothub_a (controller);
  825. ndp = (temp & RH_A_NDP);
  826. for (i = 0; i < ndp; i++) {
  827. temp = roothub_portstatus (controller, i);
  828. /* check for a device disconnect */
  829. if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
  830. (RH_PS_PESC | RH_PS_CSC)) &&
  831. ((temp & RH_PS_CCS) == 0)) {
  832. res = i;
  833. break;
  834. }
  835. }
  836. return res;
  837. }
  838. static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
  839. void *buffer, int transfer_len, struct devrequest *cmd)
  840. {
  841. void * data = buffer;
  842. int leni = transfer_len;
  843. int len = 0;
  844. int stat = 0;
  845. __u32 datab[4];
  846. __u8 *data_buf = (__u8 *)datab;
  847. __u16 bmRType_bReq;
  848. __u16 wValue;
  849. __u16 wIndex;
  850. __u16 wLength;
  851. #ifdef DEBUG
  852. urb_priv.actual_length = 0;
  853. pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
  854. #endif
  855. if (usb_pipeint(pipe)) {
  856. info("Root-Hub submit IRQ: NOT implemented");
  857. return 0;
  858. }
  859. bmRType_bReq = cmd->requesttype | (cmd->request << 8);
  860. wValue = m16_swap (cmd->value);
  861. wIndex = m16_swap (cmd->index);
  862. wLength = m16_swap (cmd->length);
  863. info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
  864. dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
  865. switch (bmRType_bReq) {
  866. /* Request Destination:
  867. without flags: Device,
  868. RH_INTERFACE: interface,
  869. RH_ENDPOINT: endpoint,
  870. RH_CLASS means HUB here,
  871. RH_OTHER | RH_CLASS almost ever means HUB_PORT here
  872. */
  873. case RH_GET_STATUS:
  874. *(__u16 *) data_buf = m16_swap (1); OK (2);
  875. case RH_GET_STATUS | RH_INTERFACE:
  876. *(__u16 *) data_buf = m16_swap (0); OK (2);
  877. case RH_GET_STATUS | RH_ENDPOINT:
  878. *(__u16 *) data_buf = m16_swap (0); OK (2);
  879. case RH_GET_STATUS | RH_CLASS:
  880. *(__u32 *) data_buf = m32_swap (
  881. RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
  882. OK (4);
  883. case RH_GET_STATUS | RH_OTHER | RH_CLASS:
  884. *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
  885. case RH_CLEAR_FEATURE | RH_ENDPOINT:
  886. switch (wValue) {
  887. case (RH_ENDPOINT_STALL): OK (0);
  888. }
  889. break;
  890. case RH_CLEAR_FEATURE | RH_CLASS:
  891. switch (wValue) {
  892. case RH_C_HUB_LOCAL_POWER:
  893. OK(0);
  894. case (RH_C_HUB_OVER_CURRENT):
  895. WR_RH_STAT(RH_HS_OCIC); OK (0);
  896. }
  897. break;
  898. case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
  899. switch (wValue) {
  900. case (RH_PORT_ENABLE):
  901. WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
  902. case (RH_PORT_SUSPEND):
  903. WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
  904. case (RH_PORT_POWER):
  905. WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
  906. case (RH_C_PORT_CONNECTION):
  907. WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
  908. case (RH_C_PORT_ENABLE):
  909. WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
  910. case (RH_C_PORT_SUSPEND):
  911. WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
  912. case (RH_C_PORT_OVER_CURRENT):
  913. WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
  914. case (RH_C_PORT_RESET):
  915. WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
  916. }
  917. break;
  918. case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
  919. switch (wValue) {
  920. case (RH_PORT_SUSPEND):
  921. WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
  922. case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
  923. if (RD_RH_PORTSTAT & RH_PS_CCS)
  924. WR_RH_PORTSTAT (RH_PS_PRS);
  925. OK (0);
  926. case (RH_PORT_POWER):
  927. WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
  928. case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
  929. if (RD_RH_PORTSTAT & RH_PS_CCS)
  930. WR_RH_PORTSTAT (RH_PS_PES );
  931. OK (0);
  932. }
  933. break;
  934. case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
  935. case RH_GET_DESCRIPTOR:
  936. switch ((wValue & 0xff00) >> 8) {
  937. case (0x01): /* device descriptor */
  938. len = min_t(unsigned int,
  939. leni,
  940. min_t(unsigned int,
  941. sizeof (root_hub_dev_des),
  942. wLength));
  943. data_buf = root_hub_dev_des; OK(len);
  944. case (0x02): /* configuration descriptor */
  945. len = min_t(unsigned int,
  946. leni,
  947. min_t(unsigned int,
  948. sizeof (root_hub_config_des),
  949. wLength));
  950. data_buf = root_hub_config_des; OK(len);
  951. case (0x03): /* string descriptors */
  952. if(wValue==0x0300) {
  953. len = min_t(unsigned int,
  954. leni,
  955. min_t(unsigned int,
  956. sizeof (root_hub_str_index0),
  957. wLength));
  958. data_buf = root_hub_str_index0;
  959. OK(len);
  960. }
  961. if(wValue==0x0301) {
  962. len = min_t(unsigned int,
  963. leni,
  964. min_t(unsigned int,
  965. sizeof (root_hub_str_index1),
  966. wLength));
  967. data_buf = root_hub_str_index1;
  968. OK(len);
  969. }
  970. default:
  971. stat = USB_ST_STALLED;
  972. }
  973. break;
  974. case RH_GET_DESCRIPTOR | RH_CLASS:
  975. {
  976. __u32 temp = roothub_a (&gohci);
  977. data_buf [0] = 9; /* min length; */
  978. data_buf [1] = 0x29;
  979. data_buf [2] = temp & RH_A_NDP;
  980. data_buf [3] = 0;
  981. if (temp & RH_A_PSM) /* per-port power switching? */
  982. data_buf [3] |= 0x1;
  983. if (temp & RH_A_NOCP) /* no overcurrent reporting? */
  984. data_buf [3] |= 0x10;
  985. else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
  986. data_buf [3] |= 0x8;
  987. /* corresponds to data_buf[4-7] */
  988. datab [1] = 0;
  989. data_buf [5] = (temp & RH_A_POTPGT) >> 24;
  990. temp = roothub_b (&gohci);
  991. data_buf [7] = temp & RH_B_DR;
  992. if (data_buf [2] < 7) {
  993. data_buf [8] = 0xff;
  994. } else {
  995. data_buf [0] += 2;
  996. data_buf [8] = (temp & RH_B_DR) >> 8;
  997. data_buf [10] = data_buf [9] = 0xff;
  998. }
  999. len = min_t(unsigned int, leni,
  1000. min_t(unsigned int, data_buf [0], wLength));
  1001. OK (len);
  1002. }
  1003. case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
  1004. case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
  1005. default:
  1006. dbg ("unsupported root hub command");
  1007. stat = USB_ST_STALLED;
  1008. }
  1009. #ifdef DEBUG
  1010. ohci_dump_roothub (&gohci, 1);
  1011. #endif
  1012. len = min_t(int, len, leni);
  1013. if (data != data_buf)
  1014. memcpy (data, data_buf, len);
  1015. dev->act_len = len;
  1016. dev->status = stat;
  1017. #ifdef DEBUG
  1018. if (transfer_len)
  1019. urb_priv.actual_length = transfer_len;
  1020. pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
  1021. #endif
  1022. return stat;
  1023. }
  1024. /*-------------------------------------------------------------------------*/
  1025. /* common code for handling submit messages - used for all but root hub */
  1026. /* accesses. */
  1027. int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1028. int transfer_len, struct devrequest *setup, int interval)
  1029. {
  1030. int stat = 0;
  1031. int maxsize = usb_maxpacket(dev, pipe);
  1032. int timeout;
  1033. /* device pulled? Shortcut the action. */
  1034. if (devgone == dev) {
  1035. dev->status = USB_ST_CRC_ERR;
  1036. return 0;
  1037. }
  1038. #ifdef DEBUG
  1039. urb_priv.actual_length = 0;
  1040. pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
  1041. #endif
  1042. if (!maxsize) {
  1043. err("submit_common_message: pipesize for pipe %lx is zero",
  1044. pipe);
  1045. return -1;
  1046. }
  1047. if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
  1048. err("sohci_submit_job failed");
  1049. return -1;
  1050. }
  1051. /* allow more time for a BULK device to react - some are slow */
  1052. #define BULK_TO 5000 /* timeout in milliseconds */
  1053. if (usb_pipebulk(pipe))
  1054. timeout = BULK_TO;
  1055. else
  1056. timeout = 100;
  1057. /* wait for it to complete */
  1058. for (;;) {
  1059. /* check whether the controller is done */
  1060. stat = hc_interrupt();
  1061. if (stat < 0) {
  1062. stat = USB_ST_CRC_ERR;
  1063. break;
  1064. }
  1065. /* NOTE: since we are not interrupt driven in U-Boot and always
  1066. * handle only one URB at a time, we cannot assume the
  1067. * transaction finished on the first successful return from
  1068. * hc_interrupt().. unless the flag for current URB is set,
  1069. * meaning that all TD's to/from device got actually
  1070. * transferred and processed. If the current URB is not
  1071. * finished we need to re-iterate this loop so as
  1072. * hc_interrupt() gets called again as there needs to be some
  1073. * more TD's to process still */
  1074. if ((stat >= 0) && (stat != 0xff) && (urb_finished)) {
  1075. /* 0xff is returned for an SF-interrupt */
  1076. break;
  1077. }
  1078. if (--timeout) {
  1079. mdelay(1);
  1080. if (!urb_finished)
  1081. dbg("\%");
  1082. } else {
  1083. err("CTL:TIMEOUT ");
  1084. dbg("submit_common_msg: TO status %x\n", stat);
  1085. stat = USB_ST_CRC_ERR;
  1086. urb_finished = 1;
  1087. break;
  1088. }
  1089. }
  1090. #if 0
  1091. /* we got an Root Hub Status Change interrupt */
  1092. if (got_rhsc) {
  1093. #ifdef DEBUG
  1094. ohci_dump_roothub (&gohci, 1);
  1095. #endif
  1096. got_rhsc = 0;
  1097. /* abuse timeout */
  1098. timeout = rh_check_port_status(&gohci);
  1099. if (timeout >= 0) {
  1100. #if 0 /* this does nothing useful, but leave it here in case that changes */
  1101. /* the called routine adds 1 to the passed value */
  1102. usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
  1103. #endif
  1104. /*
  1105. * XXX
  1106. * This is potentially dangerous because it assumes
  1107. * that only one device is ever plugged in!
  1108. */
  1109. devgone = dev;
  1110. }
  1111. }
  1112. #endif
  1113. dev->status = stat;
  1114. dev->act_len = transfer_len;
  1115. #ifdef DEBUG
  1116. pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
  1117. #endif
  1118. /* free TDs in urb_priv */
  1119. urb_free_priv (&urb_priv);
  1120. return 0;
  1121. }
  1122. /* submit routines called from usb.c */
  1123. int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1124. int transfer_len)
  1125. {
  1126. info("submit_bulk_msg");
  1127. return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
  1128. }
  1129. int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1130. int transfer_len, struct devrequest *setup)
  1131. {
  1132. int maxsize = usb_maxpacket(dev, pipe);
  1133. info("submit_control_msg");
  1134. #ifdef DEBUG
  1135. urb_priv.actual_length = 0;
  1136. pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
  1137. #endif
  1138. if (!maxsize) {
  1139. err("submit_control_message: pipesize for pipe %lx is zero",
  1140. pipe);
  1141. return -1;
  1142. }
  1143. if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
  1144. gohci.rh.dev = dev;
  1145. /* root hub - redirect */
  1146. return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
  1147. setup);
  1148. }
  1149. return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
  1150. }
  1151. int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1152. int transfer_len, int interval)
  1153. {
  1154. info("submit_int_msg");
  1155. return -1;
  1156. }
  1157. /*-------------------------------------------------------------------------*
  1158. * HC functions
  1159. *-------------------------------------------------------------------------*/
  1160. /* reset the HC and BUS */
  1161. static int hc_reset (ohci_t *ohci)
  1162. {
  1163. int timeout = 30;
  1164. int smm_timeout = 50; /* 0,5 sec */
  1165. if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
  1166. writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
  1167. info("USB HC TakeOver from SMM");
  1168. while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
  1169. mdelay (10);
  1170. if (--smm_timeout == 0) {
  1171. err("USB HC TakeOver failed!");
  1172. return -1;
  1173. }
  1174. }
  1175. }
  1176. /* Disable HC interrupts */
  1177. writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
  1178. dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
  1179. ohci->slot_name,
  1180. readl (&ohci->regs->control));
  1181. /* Reset USB (needed by some controllers) */
  1182. ohci->hc_control = 0;
  1183. writel (ohci->hc_control, &ohci->regs->control);
  1184. /* HC Reset requires max 10 us delay */
  1185. writel (OHCI_HCR, &ohci->regs->cmdstatus);
  1186. while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
  1187. if (--timeout == 0) {
  1188. err("USB HC reset timed out!");
  1189. return -1;
  1190. }
  1191. udelay (1);
  1192. }
  1193. return 0;
  1194. }
  1195. /*-------------------------------------------------------------------------*/
  1196. /* Start an OHCI controller, set the BUS operational
  1197. * enable interrupts
  1198. * connect the virtual root hub */
  1199. static int hc_start (ohci_t * ohci)
  1200. {
  1201. __u32 mask;
  1202. unsigned int fminterval;
  1203. ohci->disabled = 1;
  1204. /* Tell the controller where the control and bulk lists are
  1205. * The lists are empty now. */
  1206. writel (0, &ohci->regs->ed_controlhead);
  1207. writel (0, &ohci->regs->ed_bulkhead);
  1208. writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
  1209. fminterval = 0x2edf;
  1210. writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
  1211. fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
  1212. writel (fminterval, &ohci->regs->fminterval);
  1213. writel (0x628, &ohci->regs->lsthresh);
  1214. /* start controller operations */
  1215. ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
  1216. ohci->disabled = 0;
  1217. writel (ohci->hc_control, &ohci->regs->control);
  1218. /* disable all interrupts */
  1219. mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
  1220. OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
  1221. OHCI_INTR_OC | OHCI_INTR_MIE);
  1222. writel (mask, &ohci->regs->intrdisable);
  1223. /* clear all interrupts */
  1224. mask &= ~OHCI_INTR_MIE;
  1225. writel (mask, &ohci->regs->intrstatus);
  1226. /* Choose the interrupts we care about now - but w/o MIE */
  1227. mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
  1228. writel (mask, &ohci->regs->intrenable);
  1229. #ifdef OHCI_USE_NPS
  1230. /* required for AMD-756 and some Mac platforms */
  1231. writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
  1232. &ohci->regs->roothub.a);
  1233. writel (RH_HS_LPSC, &ohci->regs->roothub.status);
  1234. #endif /* OHCI_USE_NPS */
  1235. /* POTPGT delay is bits 24-31, in 2 ms units. */
  1236. mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
  1237. /* connect the virtual root hub */
  1238. ohci->rh.devnum = 0;
  1239. return 0;
  1240. }
  1241. /*-------------------------------------------------------------------------*/
  1242. /* an interrupt happens */
  1243. static int
  1244. hc_interrupt (void)
  1245. {
  1246. ohci_t *ohci = &gohci;
  1247. struct ohci_regs *regs = ohci->regs;
  1248. int ints;
  1249. int stat = -1;
  1250. if ((ohci->hcca->done_head != 0) &&
  1251. !(ohci_cpu_to_le32(ohci->hcca->done_head) & 0x01)) {
  1252. ints = OHCI_INTR_WDH;
  1253. } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
  1254. ohci->disabled++;
  1255. err ("%s device removed!", ohci->slot_name);
  1256. return -1;
  1257. } else if ((ints &= readl (&regs->intrenable)) == 0) {
  1258. dbg("hc_interrupt: returning..\n");
  1259. return 0xff;
  1260. }
  1261. /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
  1262. if (ints & OHCI_INTR_RHSC) {
  1263. got_rhsc = 1;
  1264. stat = 0xff;
  1265. }
  1266. if (ints & OHCI_INTR_UE) {
  1267. ohci->disabled++;
  1268. err ("OHCI Unrecoverable Error, controller usb-%s disabled",
  1269. ohci->slot_name);
  1270. /* e.g. due to PCI Master/Target Abort */
  1271. #ifdef DEBUG
  1272. ohci_dump (ohci, 1);
  1273. #endif
  1274. /* FIXME: be optimistic, hope that bug won't repeat often. */
  1275. /* Make some non-interrupt context restart the controller. */
  1276. /* Count and limit the retries though; either hardware or */
  1277. /* software errors can go forever... */
  1278. hc_reset (ohci);
  1279. return -1;
  1280. }
  1281. if (ints & OHCI_INTR_WDH) {
  1282. writel (OHCI_INTR_WDH, &regs->intrdisable);
  1283. stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
  1284. writel (OHCI_INTR_WDH, &regs->intrenable);
  1285. }
  1286. if (ints & OHCI_INTR_SO) {
  1287. dbg("USB Schedule overrun\n");
  1288. writel (OHCI_INTR_SO, &regs->intrenable);
  1289. stat = -1;
  1290. }
  1291. /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
  1292. if (ints & OHCI_INTR_SF) {
  1293. unsigned int frame = ohci_cpu_to_le16 (ohci->hcca->frame_no) & 1;
  1294. mdelay(1);
  1295. writel (OHCI_INTR_SF, &regs->intrdisable);
  1296. if (ohci->ed_rm_list[frame] != NULL)
  1297. writel (OHCI_INTR_SF, &regs->intrenable);
  1298. stat = 0xff;
  1299. }
  1300. writel (ints, &regs->intrstatus);
  1301. return stat;
  1302. }
  1303. /*-------------------------------------------------------------------------*/
  1304. /*-------------------------------------------------------------------------*/
  1305. /* De-allocate all resources.. */
  1306. static void hc_release_ohci (ohci_t *ohci)
  1307. {
  1308. dbg ("USB HC release ohci usb-%s", ohci->slot_name);
  1309. if (!ohci->disabled)
  1310. hc_reset (ohci);
  1311. }
  1312. /*-------------------------------------------------------------------------*/
  1313. /*
  1314. * low level initalisation routine, called from usb.c
  1315. */
  1316. static char ohci_inited = 0;
  1317. int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
  1318. {
  1319. /* Set the USB Clock */
  1320. *(vu_long *)MPC5XXX_CDM_48_FDC = CONFIG_USB_CLOCK;
  1321. #ifdef CONFIG_PSC3_USB /* USB is using the alternate configuration */
  1322. /* remove all PSC3 USB bits first before ORing in ours */
  1323. *(vu_long *)MPC5XXX_GPS_PORT_CONFIG &= ~0x00804f00;
  1324. #else
  1325. /* remove all USB bits first before ORing in ours */
  1326. *(vu_long *)MPC5XXX_GPS_PORT_CONFIG &= ~0x00807000;
  1327. #endif
  1328. /* Activate USB port */
  1329. *(vu_long *)MPC5XXX_GPS_PORT_CONFIG |= CONFIG_USB_CONFIG;
  1330. memset (&gohci, 0, sizeof (ohci_t));
  1331. memset (&urb_priv, 0, sizeof (urb_priv_t));
  1332. /* align the storage */
  1333. if ((__u32)&ghcca[0] & 0xff) {
  1334. err("HCCA not aligned!!");
  1335. return -1;
  1336. }
  1337. phcca = &ghcca[0];
  1338. info("aligned ghcca %p", phcca);
  1339. memset(&ohci_dev, 0, sizeof(struct ohci_device));
  1340. if ((__u32)&ohci_dev.ed[0] & 0x7) {
  1341. err("EDs not aligned!!");
  1342. return -1;
  1343. }
  1344. memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
  1345. if ((__u32)gtd & 0x7) {
  1346. err("TDs not aligned!!");
  1347. return -1;
  1348. }
  1349. ptd = gtd;
  1350. gohci.hcca = phcca;
  1351. memset (phcca, 0, sizeof (struct ohci_hcca));
  1352. gohci.disabled = 1;
  1353. gohci.sleeping = 0;
  1354. gohci.irq = -1;
  1355. gohci.regs = (struct ohci_regs *)MPC5XXX_USB;
  1356. gohci.flags = 0;
  1357. gohci.slot_name = "mpc5200";
  1358. if (hc_reset (&gohci) < 0) {
  1359. hc_release_ohci (&gohci);
  1360. return -1;
  1361. }
  1362. if (hc_start (&gohci) < 0) {
  1363. err ("can't start usb-%s", gohci.slot_name);
  1364. hc_release_ohci (&gohci);
  1365. return -1;
  1366. }
  1367. #ifdef DEBUG
  1368. ohci_dump (&gohci, 1);
  1369. #endif
  1370. ohci_inited = 1;
  1371. urb_finished = 1;
  1372. return 0;
  1373. }
  1374. int usb_lowlevel_stop(int index)
  1375. {
  1376. /* this gets called really early - before the controller has */
  1377. /* even been initialized! */
  1378. if (!ohci_inited)
  1379. return 0;
  1380. /* TODO release any interrupts, etc. */
  1381. /* call hc_release_ohci() here ? */
  1382. hc_reset (&gohci);
  1383. return 0;
  1384. }
  1385. #endif /* CONFIG_USB_OHCI */