iomux.h 4.3 KB

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  1. /*
  2. * Copyright (c) 2012
  3. *
  4. * Gabriel Huau <contact@huau-gabriel.fr>
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. #ifndef _S3C24X0_IOMUX_H_
  9. #define _S3C24X0_IOMUX_H_
  10. enum s3c2440_iomux_func {
  11. /* PORT A */
  12. IOMUXA_ADDR0 = 1,
  13. IOMUXA_ADDR16 = (1 << 1),
  14. IOMUXA_ADDR17 = (1 << 2),
  15. IOMUXA_ADDR18 = (1 << 3),
  16. IOMUXA_ADDR19 = (1 << 4),
  17. IOMUXA_ADDR20 = (1 << 5),
  18. IOMUXA_ADDR21 = (1 << 6),
  19. IOMUXA_ADDR22 = (1 << 7),
  20. IOMUXA_ADDR23 = (1 << 8),
  21. IOMUXA_ADDR24 = (1 << 9),
  22. IOMUXA_ADDR25 = (1 << 10),
  23. IOMUXA_ADDR26 = (1 << 11),
  24. IOMUXA_nGCS1 = (1 << 12),
  25. IOMUXA_nGCS2 = (1 << 13),
  26. IOMUXA_nGCS3 = (1 << 14),
  27. IOMUXA_nGCS4 = (1 << 15),
  28. IOMUXA_nGCS5 = (1 << 16),
  29. IOMUXA_CLE = (1 << 17),
  30. IOMUXA_ALE = (1 << 18),
  31. IOMUXA_nFWE = (1 << 19),
  32. IOMUXA_nFRE = (1 << 20),
  33. IOMUXA_nRSTOUT = (1 << 21),
  34. IOMUXA_nFCE = (1 << 22),
  35. /* PORT B */
  36. IOMUXB_nXDREQ0 = (2 << 20),
  37. IOMUXB_nXDACK0 = (2 << 18),
  38. IOMUXB_nXDREQ1 = (2 << 16),
  39. IOMUXB_nXDACK1 = (2 << 14),
  40. IOMUXB_nXBREQ = (2 << 12),
  41. IOMUXB_nXBACK = (2 << 10),
  42. IOMUXB_TCLK0 = (2 << 8),
  43. IOMUXB_TOUT3 = (2 << 6),
  44. IOMUXB_TOUT2 = (2 << 4),
  45. IOMUXB_TOUT1 = (2 << 2),
  46. IOMUXB_TOUT0 = 2,
  47. /* PORT C */
  48. IOMUXC_VS7 = (2 << 30),
  49. IOMUXC_VS6 = (2 << 28),
  50. IOMUXC_VS5 = (2 << 26),
  51. IOMUXC_VS4 = (2 << 24),
  52. IOMUXC_VS3 = (2 << 22),
  53. IOMUXC_VS2 = (2 << 20),
  54. IOMUXC_VS1 = (2 << 18),
  55. IOMUXC_VS0 = (2 << 16),
  56. IOMUXC_LCD_LPCREVB = (2 << 14),
  57. IOMUXC_LCD_LPCREV = (2 << 12),
  58. IOMUXC_LCD_LPCOE = (2 << 10),
  59. IOMUXC_VM = (2 << 8),
  60. IOMUXC_VFRAME = (2 << 6),
  61. IOMUXC_VLINE = (2 << 4),
  62. IOMUXC_VCLK = (2 << 2),
  63. IOMUXC_LEND = 2,
  64. IOMUXC_I2SSDI = (3 << 8),
  65. /* PORT D */
  66. IOMUXD_VS23 = (2 << 30),
  67. IOMUXD_VS22 = (2 << 28),
  68. IOMUXD_VS21 = (2 << 26),
  69. IOMUXD_VS20 = (2 << 24),
  70. IOMUXD_VS19 = (2 << 22),
  71. IOMUXD_VS18 = (2 << 20),
  72. IOMUXD_VS17 = (2 << 18),
  73. IOMUXD_VS16 = (2 << 16),
  74. IOMUXD_VS15 = (2 << 14),
  75. IOMUXD_VS14 = (2 << 12),
  76. IOMUXD_VS13 = (2 << 10),
  77. IOMUXD_VS12 = (2 << 8),
  78. IOMUXD_VS11 = (2 << 6),
  79. IOMUXD_VS10 = (2 << 4),
  80. IOMUXD_VS9 = (2 << 2),
  81. IOMUXD_VS8 = 2,
  82. IOMUXD_nSS0 = (3 << 30),
  83. IOMUXD_nSS1 = (3 << 28),
  84. IOMUXD_SPICLK1 = (3 << 20),
  85. IOMUXD_SPIMOSI1 = (3 << 18),
  86. IOMUXD_SPIMISO1 = (3 << 16),
  87. /* PORT E */
  88. IOMUXE_IICSDA = (2 << 30),
  89. IOMUXE_IICSCL = (2 << 28),
  90. IOMUXE_SPICLK0 = (2 << 26),
  91. IOMUXE_SPIMOSI0 = (2 << 24),
  92. IOMUXE_SPIMISO0 = (2 << 22),
  93. IOMUXE_SDDAT3 = (2 << 20),
  94. IOMUXE_SDDAT2 = (2 << 18),
  95. IOMUXE_SDDAT1 = (2 << 16),
  96. IOMUXE_SDDAT0 = (2 << 14),
  97. IOMUXE_SDCMD = (2 << 12),
  98. IOMUXE_SDCLK = (2 << 10),
  99. IOMUXE_I2SDO = (2 << 8),
  100. IOMUXE_I2SDI = (2 << 6),
  101. IOMUXE_CDCLK = (2 << 4),
  102. IOMUXE_I2SSCLK = (2 << 2),
  103. IOMUXE_I2SLRCK = 2,
  104. IOMUXE_AC_SDATA_OUT = (3 << 8),
  105. IOMUXE_AC_SDATA_IN = (3 << 6),
  106. IOMUXE_AC_nRESET = (3 << 4),
  107. IOMUXE_AC_BIT_CLK = (3 << 2),
  108. IOMUXE_AC_SYNC = 3,
  109. /* PORT F */
  110. IOMUXF_EINT7 = (2 << 14),
  111. IOMUXF_EINT6 = (2 << 12),
  112. IOMUXF_EINT5 = (2 << 10),
  113. IOMUXF_EINT4 = (2 << 8),
  114. IOMUXF_EINT3 = (2 << 6),
  115. IOMUXF_EINT2 = (2 << 4),
  116. IOMUXF_EINT1 = (2 << 2),
  117. IOMUXF_EINT0 = 2,
  118. /* PORT G */
  119. IOMUXG_EINT23 = (2 << 30),
  120. IOMUXG_EINT22 = (2 << 28),
  121. IOMUXG_EINT21 = (2 << 26),
  122. IOMUXG_EINT20 = (2 << 24),
  123. IOMUXG_EINT19 = (2 << 22),
  124. IOMUXG_EINT18 = (2 << 20),
  125. IOMUXG_EINT17 = (2 << 18),
  126. IOMUXG_EINT16 = (2 << 16),
  127. IOMUXG_EINT15 = (2 << 14),
  128. IOMUXG_EINT14 = (2 << 12),
  129. IOMUXG_EINT13 = (2 << 10),
  130. IOMUXG_EINT12 = (2 << 8),
  131. IOMUXG_EINT11 = (2 << 6),
  132. IOMUXG_EINT10 = (2 << 4),
  133. IOMUXG_EINT9 = (2 << 2),
  134. IOMUXG_EINT8 = 2,
  135. IOMUXG_TCLK1 = (3 << 22),
  136. IOMUXG_nCTS1 = (3 << 20),
  137. IOMUXG_nRTS1 = (3 << 18),
  138. IOMUXG_SPICLK1 = (3 << 14),
  139. IOMUXG_SPIMOSI1 = (3 << 12),
  140. IOMUXG_SPIMISO1 = (3 << 10),
  141. IOMUXG_LCD_PWRDN = (3 << 8),
  142. IOMUXG_nSS1 = (3 << 6),
  143. IOMUXG_nSS0 = (3 << 4),
  144. /* PORT H */
  145. IOMUXH_CLKOUT1 = (2 << 20),
  146. IOMUXH_CLKOUT0 = (2 << 18),
  147. IOMUXH_UEXTCLK = (2 << 16),
  148. IOMUXH_RXD2 = (2 << 14),
  149. IOMUXH_TXD2 = (2 << 12),
  150. IOMUXH_RXD1 = (2 << 10),
  151. IOMUXH_TXD1 = (2 << 8),
  152. IOMUXH_RXD0 = (2 << 6),
  153. IOMUXH_TXD0 = (2 << 4),
  154. IOMUXH_nRTS0 = (2 << 2),
  155. IOMUXH_nCTS0 = 2,
  156. IOMUXH_nCTS1 = (3 << 14),
  157. IOMUXH_nRTS1 = (3 << 12),
  158. /* PORT J */
  159. IOMUXJ_CAMRESET = (2 << 24),
  160. IOMUXJ_CAMCLKOUT = (2 << 22),
  161. IOMUXJ_CAMHREF = (2 << 20),
  162. IOMUXJ_CAMVSYNC = (2 << 18),
  163. IOMUXJ_CAMPCLK = (2 << 16),
  164. IOMUXJ_CAMDATA7 = (2 << 14),
  165. IOMUXJ_CAMDATA6 = (2 << 12),
  166. IOMUXJ_CAMDATA5 = (2 << 10),
  167. IOMUXJ_CAMDATA4 = (2 << 8),
  168. IOMUXJ_CAMDATA3 = (2 << 6),
  169. IOMUXJ_CAMDATA2 = (2 << 4),
  170. IOMUXJ_CAMDATA1 = (2 << 2),
  171. IOMUXJ_CAMDATA0 = 2
  172. };
  173. #endif