mipi_dsim.h 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375
  1. /*
  2. * Copyright (C) 2012 Samsung Electronics
  3. *
  4. * Author: InKi Dae <inki.dae@samsung.com>
  5. * Author: Donghwa Lee <dh09.lee@samsung.com>
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. */
  9. #ifndef _DSIM_H
  10. #define _DSIM_H
  11. #include <linux/list.h>
  12. #include <linux/fb.h>
  13. #define PANEL_NAME_SIZE (32)
  14. enum mipi_dsim_interface_type {
  15. DSIM_COMMAND,
  16. DSIM_VIDEO
  17. };
  18. enum mipi_dsim_virtual_ch_no {
  19. DSIM_VIRTUAL_CH_0,
  20. DSIM_VIRTUAL_CH_1,
  21. DSIM_VIRTUAL_CH_2,
  22. DSIM_VIRTUAL_CH_3
  23. };
  24. enum mipi_dsim_burst_mode_type {
  25. DSIM_NON_BURST_SYNC_EVENT,
  26. DSIM_BURST_SYNC_EVENT,
  27. DSIM_NON_BURST_SYNC_PULSE,
  28. DSIM_BURST,
  29. DSIM_NON_VIDEO_MODE
  30. };
  31. enum mipi_dsim_no_of_data_lane {
  32. DSIM_DATA_LANE_1,
  33. DSIM_DATA_LANE_2,
  34. DSIM_DATA_LANE_3,
  35. DSIM_DATA_LANE_4
  36. };
  37. enum mipi_dsim_byte_clk_src {
  38. DSIM_PLL_OUT_DIV8,
  39. DSIM_EXT_CLK_DIV8,
  40. DSIM_EXT_CLK_BYPASS
  41. };
  42. enum mipi_dsim_pixel_format {
  43. DSIM_CMD_3BPP,
  44. DSIM_CMD_8BPP,
  45. DSIM_CMD_12BPP,
  46. DSIM_CMD_16BPP,
  47. DSIM_VID_16BPP_565,
  48. DSIM_VID_18BPP_666PACKED,
  49. DSIM_18BPP_666LOOSELYPACKED,
  50. DSIM_24BPP_888
  51. };
  52. /* MIPI DSI Processor-to-Peripheral transaction types */
  53. enum {
  54. MIPI_DSI_V_SYNC_START = 0x01,
  55. MIPI_DSI_V_SYNC_END = 0x11,
  56. MIPI_DSI_H_SYNC_START = 0x21,
  57. MIPI_DSI_H_SYNC_END = 0x31,
  58. MIPI_DSI_COLOR_MODE_OFF = 0x02,
  59. MIPI_DSI_COLOR_MODE_ON = 0x12,
  60. MIPI_DSI_SHUTDOWN_PERIPHERAL = 0x22,
  61. MIPI_DSI_TURN_ON_PERIPHERAL = 0x32,
  62. MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM = 0x03,
  63. MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM = 0x13,
  64. MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM = 0x23,
  65. MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM = 0x04,
  66. MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM = 0x14,
  67. MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM = 0x24,
  68. MIPI_DSI_DCS_SHORT_WRITE = 0x05,
  69. MIPI_DSI_DCS_SHORT_WRITE_PARAM = 0x15,
  70. MIPI_DSI_DCS_READ = 0x06,
  71. MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE = 0x37,
  72. MIPI_DSI_END_OF_TRANSMISSION = 0x08,
  73. MIPI_DSI_NULL_PACKET = 0x09,
  74. MIPI_DSI_BLANKING_PACKET = 0x19,
  75. MIPI_DSI_GENERIC_LONG_WRITE = 0x29,
  76. MIPI_DSI_DCS_LONG_WRITE = 0x39,
  77. MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20 = 0x0c,
  78. MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24 = 0x1c,
  79. MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16 = 0x2c,
  80. MIPI_DSI_PACKED_PIXEL_STREAM_30 = 0x0d,
  81. MIPI_DSI_PACKED_PIXEL_STREAM_36 = 0x1d,
  82. MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12 = 0x3d,
  83. MIPI_DSI_PACKED_PIXEL_STREAM_16 = 0x0e,
  84. MIPI_DSI_PACKED_PIXEL_STREAM_18 = 0x1e,
  85. MIPI_DSI_PIXEL_STREAM_3BYTE_18 = 0x2e,
  86. MIPI_DSI_PACKED_PIXEL_STREAM_24 = 0x3e,
  87. };
  88. /*
  89. * struct mipi_dsim_config - interface for configuring mipi-dsi controller.
  90. *
  91. * @auto_flush: enable or disable Auto flush of MD FIFO using VSYNC pulse.
  92. * @eot_disable: enable or disable EoT packet in HS mode.
  93. * @auto_vertical_cnt: specifies auto vertical count mode.
  94. * in Video mode, the vertical line transition uses line counter
  95. * configured by VSA, VBP, and Vertical resolution.
  96. * If this bit is set to '1', the line counter does not use VSA and VBP
  97. * registers.(in command mode, this variable is ignored)
  98. * @hse: set horizontal sync event mode.
  99. * In VSYNC pulse and Vporch area, MIPI DSI master transfers only HSYNC
  100. * start packet to MIPI DSI slave at MIPI DSI spec1.1r02.
  101. * this bit transfers HSYNC end packet in VSYNC pulse and Vporch area
  102. * (in mommand mode, this variable is ignored)
  103. * @hfp: specifies HFP disable mode.
  104. * if this variable is set, DSI master ignores HFP area in VIDEO mode.
  105. * (in command mode, this variable is ignored)
  106. * @hbp: specifies HBP disable mode.
  107. * if this variable is set, DSI master ignores HBP area in VIDEO mode.
  108. * (in command mode, this variable is ignored)
  109. * @hsa: specifies HSA disable mode.
  110. * if this variable is set, DSI master ignores HSA area in VIDEO mode.
  111. * (in command mode, this variable is ignored)
  112. * @e_interface: specifies interface to be used.(CPU or RGB interface)
  113. * @e_virtual_ch: specifies virtual channel number that main or
  114. * sub diaplsy uses.
  115. * @e_pixel_format: specifies pixel stream format for main or sub display.
  116. * @e_burst_mode: selects Burst mode in Video mode.
  117. * in Non-burst mode, RGB data area is filled with RGB data and NULL
  118. * packets, according to input bandwidth of RGB interface.
  119. * In Burst mode, RGB data area is filled with RGB data only.
  120. * @e_no_data_lane: specifies data lane count to be used by Master.
  121. * @e_byte_clk: select byte clock source. (it must be DSIM_PLL_OUT_DIV8)
  122. * DSIM_EXT_CLK_DIV8 and DSIM_EXT_CLK_BYPASSS are not supported.
  123. * @pll_stable_time: specifies the PLL Timer for stability of the ganerated
  124. * clock(System clock cycle base)
  125. * if the timer value goes to 0x00000000, the clock stable bit of status
  126. * and interrupt register is set.
  127. * @esc_clk: specifies escape clock frequency for getting the escape clock
  128. * prescaler value.
  129. * @stop_holding_cnt: specifies the interval value between transmitting
  130. * read packet(or write "set_tear_on" command) and BTA request.
  131. * after transmitting read packet or write "set_tear_on" command,
  132. * BTA requests to D-PHY automatically. this counter value specifies
  133. * the interval between them.
  134. * @bta_timeout: specifies the timer for BTA.
  135. * this register specifies time out from BTA request to change
  136. * the direction with respect to Tx escape clock.
  137. * @rx_timeout: specifies the timer for LP Rx mode timeout.
  138. * this register specifies time out on how long RxValid deasserts,
  139. * after RxLpdt asserts with respect to Tx escape clock.
  140. * - RxValid specifies Rx data valid indicator.
  141. * - RxLpdt specifies an indicator that D-PHY is under RxLpdt mode.
  142. * - RxValid and RxLpdt specifies signal from D-PHY.
  143. */
  144. struct mipi_dsim_config {
  145. unsigned char auto_flush;
  146. unsigned char eot_disable;
  147. unsigned char auto_vertical_cnt;
  148. unsigned char hse;
  149. unsigned char hfp;
  150. unsigned char hbp;
  151. unsigned char hsa;
  152. enum mipi_dsim_interface_type e_interface;
  153. enum mipi_dsim_virtual_ch_no e_virtual_ch;
  154. enum mipi_dsim_pixel_format e_pixel_format;
  155. enum mipi_dsim_burst_mode_type e_burst_mode;
  156. enum mipi_dsim_no_of_data_lane e_no_data_lane;
  157. enum mipi_dsim_byte_clk_src e_byte_clk;
  158. /*
  159. * ===========================================
  160. * | P | M | S | MHz |
  161. * -------------------------------------------
  162. * | 3 | 100 | 3 | 100 |
  163. * | 3 | 100 | 2 | 200 |
  164. * | 3 | 63 | 1 | 252 |
  165. * | 4 | 100 | 1 | 300 |
  166. * | 4 | 110 | 1 | 330 |
  167. * | 12 | 350 | 1 | 350 |
  168. * | 3 | 100 | 1 | 400 |
  169. * | 4 | 150 | 1 | 450 |
  170. * | 6 | 118 | 1 | 472 |
  171. * | 3 | 120 | 1 | 480 |
  172. * | 12 | 250 | 0 | 500 |
  173. * | 4 | 100 | 0 | 600 |
  174. * | 3 | 81 | 0 | 648 |
  175. * | 3 | 88 | 0 | 704 |
  176. * | 3 | 90 | 0 | 720 |
  177. * | 3 | 100 | 0 | 800 |
  178. * | 12 | 425 | 0 | 850 |
  179. * | 4 | 150 | 0 | 900 |
  180. * | 12 | 475 | 0 | 950 |
  181. * | 6 | 250 | 0 | 1000 |
  182. * -------------------------------------------
  183. */
  184. /*
  185. * pms could be calculated as the following.
  186. * M * 24 / P * 2 ^ S = MHz
  187. */
  188. unsigned char p;
  189. unsigned short m;
  190. unsigned char s;
  191. unsigned int pll_stable_time;
  192. unsigned long esc_clk;
  193. unsigned short stop_holding_cnt;
  194. unsigned char bta_timeout;
  195. unsigned short rx_timeout;
  196. };
  197. /*
  198. * struct mipi_dsim_device - global interface for mipi-dsi driver.
  199. *
  200. * @dsim_config: infomation for configuring mipi-dsi controller.
  201. * @master_ops: callbacks to mipi-dsi operations.
  202. * @dsim_lcd_dev: pointer to activated ddi device.
  203. * (it would be registered by mipi-dsi driver.)
  204. * @dsim_lcd_drv: pointer to activated_ddi driver.
  205. * (it would be registered by mipi-dsi driver.)
  206. * @state: specifies status of MIPI-DSI controller.
  207. * the status could be RESET, INIT, STOP, HSCLKEN and ULPS.
  208. * @data_lane: specifiec enabled data lane number.
  209. * this variable would be set by driver according to e_no_data_lane
  210. * automatically.
  211. * @e_clk_src: select byte clock source.
  212. * @pd: pointer to MIPI-DSI driver platform data.
  213. */
  214. struct mipi_dsim_device {
  215. struct mipi_dsim_config *dsim_config;
  216. struct mipi_dsim_master_ops *master_ops;
  217. struct mipi_dsim_lcd_device *dsim_lcd_dev;
  218. struct mipi_dsim_lcd_driver *dsim_lcd_drv;
  219. unsigned int state;
  220. unsigned int data_lane;
  221. enum mipi_dsim_byte_clk_src e_clk_src;
  222. struct exynos_platform_mipi_dsim *pd;
  223. };
  224. /*
  225. * struct exynos_platform_mipi_dsim - interface to platform data
  226. * for mipi-dsi driver.
  227. *
  228. * @lcd_panel_name: specifies lcd panel name registered to mipi-dsi driver.
  229. * lcd panel driver searched would be actived.
  230. * @dsim_config: pointer of structure for configuring mipi-dsi controller.
  231. * @lcd_panel_info: pointer for lcd panel specific structure.
  232. * this structure specifies width, height, timing and polarity and so on.
  233. * @lcd_power: callback pointer for enabling or disabling lcd power.
  234. * @mipi_power: callback pointer for enabling or disabling mipi power.
  235. * @phy_enable: pointer to a callback controlling D-PHY enable/reset
  236. */
  237. struct exynos_platform_mipi_dsim {
  238. char lcd_panel_name[PANEL_NAME_SIZE];
  239. struct mipi_dsim_config *dsim_config;
  240. void *lcd_panel_info;
  241. int (*lcd_power)(void);
  242. int (*mipi_power)(void);
  243. void (*phy_enable)(unsigned int dev_index, unsigned int enable);
  244. };
  245. /*
  246. * struct mipi_dsim_master_ops - callbacks to mipi-dsi operations.
  247. *
  248. * @cmd_write: transfer command to lcd panel at LP mode.
  249. * @cmd_read: read command from rx register.
  250. * @get_dsim_frame_done: get the status that all screen data have been
  251. * transferred to mipi-dsi.
  252. * @clear_dsim_frame_done: clear frame done status.
  253. * @get_fb_frame_done: get frame done status of display controller.
  254. * @trigger: trigger display controller.
  255. * - this one would be used only in case of CPU mode.
  256. */
  257. struct mipi_dsim_master_ops {
  258. int (*cmd_write)(struct mipi_dsim_device *dsim, unsigned int data_id,
  259. const unsigned char *data0, unsigned int data1);
  260. int (*cmd_read)(struct mipi_dsim_device *dsim, unsigned int data_id,
  261. unsigned int data0, unsigned int data1);
  262. int (*get_dsim_frame_done)(struct mipi_dsim_device *dsim);
  263. int (*clear_dsim_frame_done)(struct mipi_dsim_device *dsim);
  264. int (*get_fb_frame_done)(void);
  265. void (*trigger)(struct fb_info *info);
  266. };
  267. /*
  268. * device structure for mipi-dsi based lcd panel.
  269. *
  270. * @name: name of the device to use with this device, or an
  271. * alias for that name.
  272. * @id: id of device to be registered.
  273. * @bus_id: bus id for identifing connected bus
  274. * and this bus id should be same as id of mipi_dsim_device.
  275. * @master: pointer to mipi-dsi master device object.
  276. * @platform_data: lcd panel specific platform data.
  277. */
  278. struct mipi_dsim_lcd_device {
  279. char *name;
  280. int id;
  281. int bus_id;
  282. int reverse_panel;
  283. struct mipi_dsim_device *master;
  284. void *platform_data;
  285. };
  286. /*
  287. * driver structure for mipi-dsi based lcd panel.
  288. *
  289. * this structure should be registered by lcd panel driver.
  290. * mipi-dsi driver seeks lcd panel registered through name field
  291. * and calls these callback functions in appropriate time.
  292. *
  293. * @name: name of the driver to use with this device, or an
  294. * alias for that name.
  295. * @id: id of driver to be registered.
  296. * this id would be used for finding device object registered.
  297. * @mipi_panel_init: callback pointer for initializing lcd panel based on mipi
  298. * dsi interface.
  299. * @mipi_display_on: callback pointer for lcd panel display on.
  300. */
  301. struct mipi_dsim_lcd_driver {
  302. char *name;
  303. int id;
  304. int (*mipi_panel_init)(struct mipi_dsim_device *dsim_dev);
  305. void (*mipi_display_on)(struct mipi_dsim_device *dsim_dev);
  306. };
  307. #ifdef CONFIG_EXYNOS_MIPI_DSIM
  308. int exynos_mipi_dsi_init(void);
  309. #else
  310. static inline int exynos_mipi_dsi_init(void)
  311. {
  312. return 0;
  313. }
  314. #endif
  315. /*
  316. * register mipi_dsim_lcd_driver object defined by lcd panel driver
  317. * to mipi-dsi driver.
  318. */
  319. int exynos_mipi_dsi_register_lcd_driver(struct mipi_dsim_lcd_driver
  320. *lcd_drv);
  321. /*
  322. * register mipi_dsim_lcd_device to mipi-dsi master.
  323. */
  324. int exynos_mipi_dsi_register_lcd_device(struct mipi_dsim_lcd_device
  325. *lcd_dev);
  326. void exynos_set_dsim_platform_data(struct exynos_platform_mipi_dsim *pd);
  327. /* panel driver init based on mipi dsi interface */
  328. void s6e8ax0_init(void);
  329. #endif /* _DSIM_H */