serial_meson.c 3.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
  4. */
  5. #include <common.h>
  6. #include <dm.h>
  7. #include <errno.h>
  8. #include <fdtdec.h>
  9. #include <linux/compiler.h>
  10. #include <serial.h>
  11. struct meson_uart {
  12. u32 wfifo;
  13. u32 rfifo;
  14. u32 control;
  15. u32 status;
  16. u32 misc;
  17. };
  18. struct meson_serial_platdata {
  19. struct meson_uart *reg;
  20. };
  21. /* AML_UART_STATUS bits */
  22. #define AML_UART_PARITY_ERR BIT(16)
  23. #define AML_UART_FRAME_ERR BIT(17)
  24. #define AML_UART_TX_FIFO_WERR BIT(18)
  25. #define AML_UART_RX_EMPTY BIT(20)
  26. #define AML_UART_TX_FULL BIT(21)
  27. #define AML_UART_TX_EMPTY BIT(22)
  28. #define AML_UART_XMIT_BUSY BIT(25)
  29. #define AML_UART_ERR (AML_UART_PARITY_ERR | \
  30. AML_UART_FRAME_ERR | \
  31. AML_UART_TX_FIFO_WERR)
  32. /* AML_UART_CONTROL bits */
  33. #define AML_UART_TX_EN BIT(12)
  34. #define AML_UART_RX_EN BIT(13)
  35. #define AML_UART_TX_RST BIT(22)
  36. #define AML_UART_RX_RST BIT(23)
  37. #define AML_UART_CLR_ERR BIT(24)
  38. static void meson_serial_init(struct meson_uart *uart)
  39. {
  40. u32 val;
  41. val = readl(&uart->control);
  42. val |= (AML_UART_RX_RST | AML_UART_TX_RST | AML_UART_CLR_ERR);
  43. writel(val, &uart->control);
  44. val &= ~(AML_UART_RX_RST | AML_UART_TX_RST | AML_UART_CLR_ERR);
  45. writel(val, &uart->control);
  46. val |= (AML_UART_RX_EN | AML_UART_TX_EN);
  47. writel(val, &uart->control);
  48. }
  49. static int meson_serial_probe(struct udevice *dev)
  50. {
  51. struct meson_serial_platdata *plat = dev->platdata;
  52. struct meson_uart *const uart = plat->reg;
  53. meson_serial_init(uart);
  54. return 0;
  55. }
  56. static int meson_serial_getc(struct udevice *dev)
  57. {
  58. struct meson_serial_platdata *plat = dev->platdata;
  59. struct meson_uart *const uart = plat->reg;
  60. if (readl(&uart->status) & AML_UART_RX_EMPTY)
  61. return -EAGAIN;
  62. return readl(&uart->rfifo) & 0xff;
  63. }
  64. static int meson_serial_putc(struct udevice *dev, const char ch)
  65. {
  66. struct meson_serial_platdata *plat = dev->platdata;
  67. struct meson_uart *const uart = plat->reg;
  68. if (readl(&uart->status) & AML_UART_TX_FULL)
  69. return -EAGAIN;
  70. writel(ch, &uart->wfifo);
  71. return 0;
  72. }
  73. static int meson_serial_pending(struct udevice *dev, bool input)
  74. {
  75. struct meson_serial_platdata *plat = dev->platdata;
  76. struct meson_uart *const uart = plat->reg;
  77. uint32_t status = readl(&uart->status);
  78. if (input)
  79. return !(status & AML_UART_RX_EMPTY);
  80. else
  81. return !(status & AML_UART_TX_FULL);
  82. }
  83. static int meson_serial_ofdata_to_platdata(struct udevice *dev)
  84. {
  85. struct meson_serial_platdata *plat = dev->platdata;
  86. fdt_addr_t addr;
  87. addr = devfdt_get_addr(dev);
  88. if (addr == FDT_ADDR_T_NONE)
  89. return -EINVAL;
  90. plat->reg = (struct meson_uart *)addr;
  91. return 0;
  92. }
  93. static const struct dm_serial_ops meson_serial_ops = {
  94. .putc = meson_serial_putc,
  95. .pending = meson_serial_pending,
  96. .getc = meson_serial_getc,
  97. };
  98. static const struct udevice_id meson_serial_ids[] = {
  99. { .compatible = "amlogic,meson-uart" },
  100. { .compatible = "amlogic,meson-gx-uart" },
  101. { }
  102. };
  103. U_BOOT_DRIVER(serial_meson) = {
  104. .name = "serial_meson",
  105. .id = UCLASS_SERIAL,
  106. .of_match = meson_serial_ids,
  107. .probe = meson_serial_probe,
  108. .ops = &meson_serial_ops,
  109. .flags = DM_FLAG_PRE_RELOC,
  110. .ofdata_to_platdata = meson_serial_ofdata_to_platdata,
  111. .platdata_auto_alloc_size = sizeof(struct meson_serial_platdata),
  112. };
  113. #ifdef CONFIG_DEBUG_UART_MESON
  114. #include <debug_uart.h>
  115. static inline void _debug_uart_init(void)
  116. {
  117. }
  118. static inline void _debug_uart_putc(int ch)
  119. {
  120. struct meson_uart *regs = (struct meson_uart *)CONFIG_DEBUG_UART_BASE;
  121. while (readl(&regs->status) & AML_UART_TX_FULL)
  122. ;
  123. writel(ch, &regs->wfifo);
  124. }
  125. DEBUG_UART_FUNCS
  126. #endif