twl4030.c 5.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2009 Wind River Systems, Inc.
  4. * Tom Rix <Tom.Rix at windriver.com>
  5. *
  6. * twl4030_power_reset_init is derived from code on omapzoom,
  7. * git://git.omapzoom.com/repo/u-boot.git
  8. *
  9. * Copyright (C) 2007-2009 Texas Instruments, Inc.
  10. *
  11. * twl4030_power_init is from cpu/omap3/common.c, power_init_r
  12. *
  13. * (C) Copyright 2004-2008
  14. * Texas Instruments, <www.ti.com>
  15. *
  16. * Author :
  17. * Sunil Kumar <sunilsaini05 at gmail.com>
  18. * Shashi Ranjan <shashiranjanmca05 at gmail.com>
  19. *
  20. * Derived from Beagle Board and 3430 SDP code by
  21. * Richard Woodruff <r-woodruff2 at ti.com>
  22. * Syed Mohammed Khasim <khasim at ti.com>
  23. */
  24. #include <twl4030.h>
  25. /*
  26. * Power Reset
  27. */
  28. void twl4030_power_reset_init(void)
  29. {
  30. u8 val = 0;
  31. if (twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
  32. TWL4030_PM_MASTER_P1_SW_EVENTS, &val)) {
  33. printf("Error:TWL4030: failed to read the power register\n");
  34. printf("Could not initialize hardware reset\n");
  35. } else {
  36. val |= TWL4030_PM_MASTER_SW_EVENTS_STOPON_PWRON;
  37. if (twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
  38. TWL4030_PM_MASTER_P1_SW_EVENTS, val)) {
  39. printf("Error:TWL4030: failed to write the power register\n");
  40. printf("Could not initialize hardware reset\n");
  41. }
  42. }
  43. }
  44. /*
  45. * Power off
  46. */
  47. void twl4030_power_off(void)
  48. {
  49. u8 data;
  50. /* PM master unlock (CFG and TST keys) */
  51. data = 0xCE;
  52. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
  53. TWL4030_PM_MASTER_PROTECT_KEY, data);
  54. data = 0xEC;
  55. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
  56. TWL4030_PM_MASTER_PROTECT_KEY, data);
  57. /* VBAT start disable */
  58. twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
  59. TWL4030_PM_MASTER_CFG_P1_TRANSITION, &data);
  60. data &= ~TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_VBAT;
  61. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
  62. TWL4030_PM_MASTER_CFG_P1_TRANSITION, data);
  63. twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
  64. TWL4030_PM_MASTER_CFG_P2_TRANSITION, &data);
  65. data &= ~TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_VBAT;
  66. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
  67. TWL4030_PM_MASTER_CFG_P2_TRANSITION, data);
  68. twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
  69. TWL4030_PM_MASTER_CFG_P3_TRANSITION, &data);
  70. data &= ~TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_VBAT;
  71. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
  72. TWL4030_PM_MASTER_CFG_P3_TRANSITION, data);
  73. /* High jitter for PWRANA2 */
  74. twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
  75. TWL4030_PM_MASTER_CFG_PWRANA2, &data);
  76. data &= ~(TWL4030_PM_MASTER_CFG_PWRANA2_LOJIT0_LOWV |
  77. TWL4030_PM_MASTER_CFG_PWRANA2_LOJIT1_LOWV);
  78. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
  79. TWL4030_PM_MASTER_CFG_PWRANA2, data);
  80. /* PM master lock */
  81. data = 0xFF;
  82. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
  83. TWL4030_PM_MASTER_PROTECT_KEY, data);
  84. /* Power off */
  85. twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
  86. TWL4030_PM_MASTER_P1_SW_EVENTS, &data);
  87. data |= TWL4030_PM_MASTER_SW_EVENTS_DEVOFF;
  88. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
  89. TWL4030_PM_MASTER_P1_SW_EVENTS, data);
  90. }
  91. /*
  92. * Set Device Group and Voltage
  93. */
  94. void twl4030_pmrecv_vsel_cfg(u8 vsel_reg, u8 vsel_val,
  95. u8 dev_grp, u8 dev_grp_sel)
  96. {
  97. int ret;
  98. /* Select the Voltage */
  99. ret = twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, vsel_reg,
  100. vsel_val);
  101. if (ret != 0) {
  102. printf("Could not write vsel to reg %02x (%d)\n",
  103. vsel_reg, ret);
  104. return;
  105. }
  106. /* Select the Device Group (enable the supply if dev_grp_sel != 0) */
  107. ret = twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, dev_grp,
  108. dev_grp_sel);
  109. if (ret != 0)
  110. printf("Could not write grp_sel to reg %02x (%d)\n",
  111. dev_grp, ret);
  112. }
  113. void twl4030_power_init(void)
  114. {
  115. /* set VAUX3 to 2.8V */
  116. twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX3_DEDICATED,
  117. TWL4030_PM_RECEIVER_VAUX3_VSEL_28,
  118. TWL4030_PM_RECEIVER_VAUX3_DEV_GRP,
  119. TWL4030_PM_RECEIVER_DEV_GRP_P1);
  120. /* set VPLL2 to 1.8V */
  121. twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VPLL2_DEDICATED,
  122. TWL4030_PM_RECEIVER_VPLL2_VSEL_18,
  123. TWL4030_PM_RECEIVER_VPLL2_DEV_GRP,
  124. TWL4030_PM_RECEIVER_DEV_GRP_ALL);
  125. /* set VDAC to 1.8V */
  126. twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VDAC_DEDICATED,
  127. TWL4030_PM_RECEIVER_VDAC_VSEL_18,
  128. TWL4030_PM_RECEIVER_VDAC_DEV_GRP,
  129. TWL4030_PM_RECEIVER_DEV_GRP_P1);
  130. }
  131. void twl4030_power_mmc_init(int dev_index)
  132. {
  133. if (dev_index == 0) {
  134. /* Set VMMC1 to 3.15 Volts */
  135. twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC1_DEDICATED,
  136. TWL4030_PM_RECEIVER_VMMC1_VSEL_32,
  137. TWL4030_PM_RECEIVER_VMMC1_DEV_GRP,
  138. TWL4030_PM_RECEIVER_DEV_GRP_P1);
  139. mdelay(100); /* ramp-up delay from Linux code */
  140. } else if (dev_index == 1) {
  141. /* Set VMMC2 to 3.15 Volts */
  142. twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC2_DEDICATED,
  143. TWL4030_PM_RECEIVER_VMMC2_VSEL_32,
  144. TWL4030_PM_RECEIVER_VMMC2_DEV_GRP,
  145. TWL4030_PM_RECEIVER_DEV_GRP_P1);
  146. mdelay(100); /* ramp-up delay from Linux code */
  147. }
  148. }
  149. #ifdef CONFIG_CMD_POWEROFF
  150. int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  151. {
  152. twl4030_power_off();
  153. return 0;
  154. }
  155. #endif