mc.c 37 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2014 Freescale Semiconductor, Inc.
  4. * Copyright 2017 NXP
  5. */
  6. #include <common.h>
  7. #include <errno.h>
  8. #include <linux/bug.h>
  9. #include <asm/io.h>
  10. #include <linux/libfdt.h>
  11. #include <net.h>
  12. #include <fdt_support.h>
  13. #include <fsl-mc/fsl_mc.h>
  14. #include <fsl-mc/fsl_mc_sys.h>
  15. #include <fsl-mc/fsl_mc_private.h>
  16. #include <fsl-mc/fsl_dpmng.h>
  17. #include <fsl-mc/fsl_dprc.h>
  18. #include <fsl-mc/fsl_dpio.h>
  19. #include <fsl-mc/fsl_dpni.h>
  20. #include <fsl-mc/fsl_qbman_portal.h>
  21. #include <fsl-mc/ldpaa_wriop.h>
  22. #define MC_RAM_BASE_ADDR_ALIGNMENT (512UL * 1024 * 1024)
  23. #define MC_RAM_BASE_ADDR_ALIGNMENT_MASK (~(MC_RAM_BASE_ADDR_ALIGNMENT - 1))
  24. #define MC_RAM_SIZE_ALIGNMENT (256UL * 1024 * 1024)
  25. #define MC_MEM_SIZE_ENV_VAR "mcmemsize"
  26. #define MC_BOOT_TIMEOUT_ENV_VAR "mcboottimeout"
  27. #define MC_BOOT_ENV_VAR "mcinitcmd"
  28. DECLARE_GLOBAL_DATA_PTR;
  29. static int mc_boot_status = -1;
  30. static int mc_dpl_applied = -1;
  31. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  32. static int mc_aiop_applied = -1;
  33. #endif
  34. struct fsl_mc_io *root_mc_io = NULL;
  35. struct fsl_mc_io *dflt_mc_io = NULL; /* child container */
  36. uint16_t root_dprc_handle = 0;
  37. uint16_t dflt_dprc_handle = 0;
  38. int child_dprc_id;
  39. struct fsl_dpbp_obj *dflt_dpbp = NULL;
  40. struct fsl_dpio_obj *dflt_dpio = NULL;
  41. struct fsl_dpni_obj *dflt_dpni = NULL;
  42. static u64 mc_lazy_dpl_addr;
  43. #ifdef DEBUG
  44. void dump_ram_words(const char *title, void *addr)
  45. {
  46. int i;
  47. uint32_t *words = addr;
  48. printf("Dumping beginning of %s (%p):\n", title, addr);
  49. for (i = 0; i < 16; i++)
  50. printf("%#x ", words[i]);
  51. printf("\n");
  52. }
  53. void dump_mc_ccsr_regs(struct mc_ccsr_registers __iomem *mc_ccsr_regs)
  54. {
  55. printf("MC CCSR registers:\n"
  56. "reg_gcr1 %#x\n"
  57. "reg_gsr %#x\n"
  58. "reg_sicbalr %#x\n"
  59. "reg_sicbahr %#x\n"
  60. "reg_sicapr %#x\n"
  61. "reg_mcfbalr %#x\n"
  62. "reg_mcfbahr %#x\n"
  63. "reg_mcfapr %#x\n"
  64. "reg_psr %#x\n",
  65. mc_ccsr_regs->reg_gcr1,
  66. mc_ccsr_regs->reg_gsr,
  67. mc_ccsr_regs->reg_sicbalr,
  68. mc_ccsr_regs->reg_sicbahr,
  69. mc_ccsr_regs->reg_sicapr,
  70. mc_ccsr_regs->reg_mcfbalr,
  71. mc_ccsr_regs->reg_mcfbahr,
  72. mc_ccsr_regs->reg_mcfapr,
  73. mc_ccsr_regs->reg_psr);
  74. }
  75. #else
  76. #define dump_ram_words(title, addr)
  77. #define dump_mc_ccsr_regs(mc_ccsr_regs)
  78. #endif /* DEBUG */
  79. #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
  80. /**
  81. * Copying MC firmware or DPL image to DDR
  82. */
  83. static int mc_copy_image(const char *title,
  84. u64 image_addr, u32 image_size, u64 mc_ram_addr)
  85. {
  86. debug("%s copied to address %p\n", title, (void *)mc_ram_addr);
  87. memcpy((void *)mc_ram_addr, (void *)image_addr, image_size);
  88. flush_dcache_range(mc_ram_addr, mc_ram_addr + image_size);
  89. return 0;
  90. }
  91. /**
  92. * MC firmware FIT image parser checks if the image is in FIT
  93. * format, verifies integrity of the image and calculates
  94. * raw image address and size values.
  95. * Returns 0 on success and a negative errno on error.
  96. * task fail.
  97. **/
  98. int parse_mc_firmware_fit_image(u64 mc_fw_addr,
  99. const void **raw_image_addr,
  100. size_t *raw_image_size)
  101. {
  102. int format;
  103. void *fit_hdr;
  104. int node_offset;
  105. const void *data;
  106. size_t size;
  107. const char *uname = "firmware";
  108. fit_hdr = (void *)mc_fw_addr;
  109. /* Check if Image is in FIT format */
  110. format = genimg_get_format(fit_hdr);
  111. if (format != IMAGE_FORMAT_FIT) {
  112. printf("fsl-mc: ERR: Bad firmware image (not a FIT image)\n");
  113. return -EINVAL;
  114. }
  115. if (!fit_check_format(fit_hdr)) {
  116. printf("fsl-mc: ERR: Bad firmware image (bad FIT header)\n");
  117. return -EINVAL;
  118. }
  119. node_offset = fit_image_get_node(fit_hdr, uname);
  120. if (node_offset < 0) {
  121. printf("fsl-mc: ERR: Bad firmware image (missing subimage)\n");
  122. return -ENOENT;
  123. }
  124. /* Verify MC firmware image */
  125. if (!(fit_image_verify(fit_hdr, node_offset))) {
  126. printf("fsl-mc: ERR: Bad firmware image (bad CRC)\n");
  127. return -EINVAL;
  128. }
  129. /* Get address and size of raw image */
  130. fit_image_get_data(fit_hdr, node_offset, &data, &size);
  131. *raw_image_addr = data;
  132. *raw_image_size = size;
  133. return 0;
  134. }
  135. #endif
  136. #define MC_DT_INCREASE_SIZE 64
  137. enum mc_fixup_type {
  138. MC_FIXUP_DPL,
  139. MC_FIXUP_DPC
  140. };
  141. static int mc_fixup_mac_addr(void *blob, int nodeoffset,
  142. const char *propname, struct eth_device *eth_dev,
  143. enum mc_fixup_type type)
  144. {
  145. int err = 0, len = 0, size, i;
  146. unsigned char env_enetaddr[ARP_HLEN];
  147. unsigned int enetaddr_32[ARP_HLEN];
  148. void *val = NULL;
  149. switch (type) {
  150. case MC_FIXUP_DPL:
  151. /* DPL likes its addresses on 32 * ARP_HLEN bits */
  152. for (i = 0; i < ARP_HLEN; i++)
  153. enetaddr_32[i] = cpu_to_fdt32(eth_dev->enetaddr[i]);
  154. val = enetaddr_32;
  155. len = sizeof(enetaddr_32);
  156. break;
  157. case MC_FIXUP_DPC:
  158. val = eth_dev->enetaddr;
  159. len = ARP_HLEN;
  160. break;
  161. }
  162. /* MAC address property present */
  163. if (fdt_get_property(blob, nodeoffset, propname, NULL)) {
  164. /* u-boot MAC addr randomly assigned - leave the present one */
  165. if (!eth_env_get_enetaddr_by_index("eth", eth_dev->index,
  166. env_enetaddr))
  167. return err;
  168. } else {
  169. size = MC_DT_INCREASE_SIZE + strlen(propname) + len;
  170. /* make room for mac address property */
  171. err = fdt_increase_size(blob, size);
  172. if (err) {
  173. printf("fdt_increase_size: err=%s\n",
  174. fdt_strerror(err));
  175. return err;
  176. }
  177. }
  178. err = fdt_setprop(blob, nodeoffset, propname, val, len);
  179. if (err) {
  180. printf("fdt_setprop: err=%s\n", fdt_strerror(err));
  181. return err;
  182. }
  183. return err;
  184. }
  185. #define is_dpni(s) (s != NULL ? !strncmp(s, "dpni@", 5) : 0)
  186. const char *dpl_get_connection_endpoint(void *blob, char *endpoint)
  187. {
  188. int connoffset = fdt_path_offset(blob, "/connections"), off;
  189. const char *s1, *s2;
  190. for (off = fdt_first_subnode(blob, connoffset);
  191. off >= 0;
  192. off = fdt_next_subnode(blob, off)) {
  193. s1 = fdt_stringlist_get(blob, off, "endpoint1", 0, NULL);
  194. s2 = fdt_stringlist_get(blob, off, "endpoint2", 0, NULL);
  195. if (!s1 || !s2)
  196. continue;
  197. if (strcmp(endpoint, s1) == 0)
  198. return s2;
  199. if (strcmp(endpoint, s2) == 0)
  200. return s1;
  201. }
  202. return NULL;
  203. }
  204. static int mc_fixup_dpl_mac_addr(void *blob, int dpmac_id,
  205. struct eth_device *eth_dev)
  206. {
  207. int objoff = fdt_path_offset(blob, "/objects");
  208. int dpmacoff = -1, dpnioff = -1;
  209. const char *endpoint;
  210. char mac_name[10];
  211. int err;
  212. sprintf(mac_name, "dpmac@%d", dpmac_id);
  213. dpmacoff = fdt_subnode_offset(blob, objoff, mac_name);
  214. if (dpmacoff < 0)
  215. /* dpmac not defined in DPL, so skip it. */
  216. return 0;
  217. err = mc_fixup_mac_addr(blob, dpmacoff, "mac_addr", eth_dev,
  218. MC_FIXUP_DPL);
  219. if (err) {
  220. printf("Error fixing up dpmac mac_addr in DPL\n");
  221. return err;
  222. }
  223. /* now we need to figure out if there is any
  224. * DPNI connected to this MAC, so we walk the
  225. * connection list
  226. */
  227. endpoint = dpl_get_connection_endpoint(blob, mac_name);
  228. if (!is_dpni(endpoint))
  229. return 0;
  230. /* let's see if we can fixup the DPNI as well */
  231. dpnioff = fdt_subnode_offset(blob, objoff, endpoint);
  232. if (dpnioff < 0)
  233. /* DPNI not defined in DPL in the objects area */
  234. return 0;
  235. return mc_fixup_mac_addr(blob, dpnioff, "mac_addr", eth_dev,
  236. MC_FIXUP_DPL);
  237. }
  238. static int mc_fixup_dpc_mac_addr(void *blob, int dpmac_id,
  239. struct eth_device *eth_dev)
  240. {
  241. int nodeoffset = fdt_path_offset(blob, "/board_info/ports"), noff;
  242. int err = 0;
  243. char mac_name[10];
  244. const char link_type_mode[] = "MAC_LINK_TYPE_FIXED";
  245. sprintf(mac_name, "mac@%d", dpmac_id);
  246. /* node not found - create it */
  247. noff = fdt_subnode_offset(blob, nodeoffset, (const char *)mac_name);
  248. if (noff < 0) {
  249. err = fdt_increase_size(blob, 200);
  250. if (err) {
  251. printf("fdt_increase_size: err=%s\n",
  252. fdt_strerror(err));
  253. return err;
  254. }
  255. noff = fdt_add_subnode(blob, nodeoffset, mac_name);
  256. if (noff < 0) {
  257. printf("fdt_add_subnode: err=%s\n",
  258. fdt_strerror(err));
  259. return err;
  260. }
  261. /* add default property of fixed link */
  262. err = fdt_appendprop_string(blob, noff,
  263. "link_type", link_type_mode);
  264. if (err) {
  265. printf("fdt_appendprop_string: err=%s\n",
  266. fdt_strerror(err));
  267. return err;
  268. }
  269. }
  270. return mc_fixup_mac_addr(blob, noff, "port_mac_address", eth_dev,
  271. MC_FIXUP_DPC);
  272. }
  273. static int mc_fixup_mac_addrs(void *blob, enum mc_fixup_type type)
  274. {
  275. int i, err = 0, ret = 0;
  276. char ethname[10];
  277. struct eth_device *eth_dev;
  278. for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) {
  279. /* port not enabled */
  280. if ((wriop_is_enabled_dpmac(i) != 1) ||
  281. (wriop_get_phy_address(i) == -1))
  282. continue;
  283. sprintf(ethname, "DPMAC%d@%s", i,
  284. phy_interface_strings[wriop_get_enet_if(i)]);
  285. eth_dev = eth_get_dev_by_name(ethname);
  286. if (eth_dev == NULL)
  287. continue;
  288. switch (type) {
  289. case MC_FIXUP_DPL:
  290. err = mc_fixup_dpl_mac_addr(blob, i, eth_dev);
  291. break;
  292. case MC_FIXUP_DPC:
  293. err = mc_fixup_dpc_mac_addr(blob, i, eth_dev);
  294. break;
  295. default:
  296. break;
  297. }
  298. if (err)
  299. printf("fsl-mc: ERROR fixing mac address for %s\n",
  300. ethname);
  301. ret |= err;
  302. }
  303. return ret;
  304. }
  305. static int mc_fixup_dpc(u64 dpc_addr)
  306. {
  307. void *blob = (void *)dpc_addr;
  308. int nodeoffset, err = 0;
  309. /* delete any existing ICID pools */
  310. nodeoffset = fdt_path_offset(blob, "/resources/icid_pools");
  311. if (fdt_del_node(blob, nodeoffset) < 0)
  312. printf("\nfsl-mc: WARNING: could not delete ICID pool\n");
  313. /* add a new pool */
  314. nodeoffset = fdt_path_offset(blob, "/resources");
  315. if (nodeoffset < 0) {
  316. printf("\nfsl-mc: ERROR: DPC is missing /resources\n");
  317. return -EINVAL;
  318. }
  319. nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pools");
  320. nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pool@0");
  321. do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0",
  322. "base_icid", FSL_DPAA2_STREAM_ID_START, 1);
  323. do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0",
  324. "num",
  325. FSL_DPAA2_STREAM_ID_END -
  326. FSL_DPAA2_STREAM_ID_START + 1, 1);
  327. /* fixup MAC addresses for dpmac ports */
  328. nodeoffset = fdt_path_offset(blob, "/board_info/ports");
  329. if (nodeoffset < 0)
  330. return 0;
  331. err = mc_fixup_mac_addrs(blob, MC_FIXUP_DPC);
  332. flush_dcache_range(dpc_addr, dpc_addr + fdt_totalsize(blob));
  333. return err;
  334. }
  335. static int load_mc_dpc(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpc_addr)
  336. {
  337. u64 mc_dpc_offset;
  338. #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
  339. int error;
  340. void *dpc_fdt_hdr;
  341. int dpc_size;
  342. #endif
  343. #ifdef CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET
  344. BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET & 0x3) != 0 ||
  345. CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET > 0xffffffff);
  346. mc_dpc_offset = CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET;
  347. #else
  348. #error "CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET not defined"
  349. #endif
  350. /*
  351. * Load the MC DPC blob in the MC private DRAM block:
  352. */
  353. #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
  354. printf("MC DPC is preloaded to %#llx\n", mc_ram_addr + mc_dpc_offset);
  355. #else
  356. /*
  357. * Get address and size of the DPC blob stored in flash:
  358. */
  359. dpc_fdt_hdr = (void *)mc_dpc_addr;
  360. error = fdt_check_header(dpc_fdt_hdr);
  361. if (error != 0) {
  362. /*
  363. * Don't return with error here, since the MC firmware can
  364. * still boot without a DPC
  365. */
  366. printf("\nfsl-mc: WARNING: No DPC image found");
  367. return 0;
  368. }
  369. dpc_size = fdt_totalsize(dpc_fdt_hdr);
  370. if (dpc_size > CONFIG_SYS_LS_MC_DPC_MAX_LENGTH) {
  371. printf("\nfsl-mc: ERROR: Bad DPC image (too large: %d)\n",
  372. dpc_size);
  373. return -EINVAL;
  374. }
  375. mc_copy_image("MC DPC blob",
  376. (u64)dpc_fdt_hdr, dpc_size, mc_ram_addr + mc_dpc_offset);
  377. #endif /* not defined CONFIG_SYS_LS_MC_DPC_IN_DDR */
  378. if (mc_fixup_dpc(mc_ram_addr + mc_dpc_offset))
  379. return -EINVAL;
  380. dump_ram_words("DPC", (void *)(mc_ram_addr + mc_dpc_offset));
  381. return 0;
  382. }
  383. static int mc_fixup_dpl(u64 dpl_addr)
  384. {
  385. void *blob = (void *)dpl_addr;
  386. u32 ver = fdt_getprop_u32_default(blob, "/", "dpl-version", 0);
  387. int err = 0;
  388. /* The DPL fixup for mac addresses is only relevant
  389. * for old-style DPLs
  390. */
  391. if (ver >= 10)
  392. return 0;
  393. err = mc_fixup_mac_addrs(blob, MC_FIXUP_DPL);
  394. flush_dcache_range(dpl_addr, dpl_addr + fdt_totalsize(blob));
  395. return err;
  396. }
  397. static int load_mc_dpl(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpl_addr)
  398. {
  399. u64 mc_dpl_offset;
  400. #ifndef CONFIG_SYS_LS_MC_DPL_IN_DDR
  401. int error;
  402. void *dpl_fdt_hdr;
  403. int dpl_size;
  404. #endif
  405. #ifdef CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
  406. BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET & 0x3) != 0 ||
  407. CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET > 0xffffffff);
  408. mc_dpl_offset = CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET;
  409. #else
  410. #error "CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET not defined"
  411. #endif
  412. /*
  413. * Load the MC DPL blob in the MC private DRAM block:
  414. */
  415. #ifdef CONFIG_SYS_LS_MC_DPL_IN_DDR
  416. printf("MC DPL is preloaded to %#llx\n", mc_ram_addr + mc_dpl_offset);
  417. #else
  418. /*
  419. * Get address and size of the DPL blob stored in flash:
  420. */
  421. dpl_fdt_hdr = (void *)mc_dpl_addr;
  422. error = fdt_check_header(dpl_fdt_hdr);
  423. if (error != 0) {
  424. printf("\nfsl-mc: ERROR: Bad DPL image (bad header)\n");
  425. return error;
  426. }
  427. dpl_size = fdt_totalsize(dpl_fdt_hdr);
  428. if (dpl_size > CONFIG_SYS_LS_MC_DPL_MAX_LENGTH) {
  429. printf("\nfsl-mc: ERROR: Bad DPL image (too large: %d)\n",
  430. dpl_size);
  431. return -EINVAL;
  432. }
  433. mc_copy_image("MC DPL blob",
  434. (u64)dpl_fdt_hdr, dpl_size, mc_ram_addr + mc_dpl_offset);
  435. #endif /* not defined CONFIG_SYS_LS_MC_DPL_IN_DDR */
  436. if (mc_fixup_dpl(mc_ram_addr + mc_dpl_offset))
  437. return -EINVAL;
  438. dump_ram_words("DPL", (void *)(mc_ram_addr + mc_dpl_offset));
  439. return 0;
  440. }
  441. /**
  442. * Return the MC boot timeout value in milliseconds
  443. */
  444. static unsigned long get_mc_boot_timeout_ms(void)
  445. {
  446. unsigned long timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
  447. char *timeout_ms_env_var = env_get(MC_BOOT_TIMEOUT_ENV_VAR);
  448. if (timeout_ms_env_var) {
  449. timeout_ms = simple_strtoul(timeout_ms_env_var, NULL, 10);
  450. if (timeout_ms == 0) {
  451. printf("fsl-mc: WARNING: Invalid value for \'"
  452. MC_BOOT_TIMEOUT_ENV_VAR
  453. "\' environment variable: %lu\n",
  454. timeout_ms);
  455. timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
  456. }
  457. }
  458. return timeout_ms;
  459. }
  460. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  461. __weak bool soc_has_aiop(void)
  462. {
  463. return false;
  464. }
  465. static int load_mc_aiop_img(u64 aiop_fw_addr)
  466. {
  467. u64 mc_ram_addr = mc_get_dram_addr();
  468. #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
  469. void *aiop_img;
  470. #endif
  471. /* Check if AIOP is available */
  472. if (!soc_has_aiop())
  473. return -ENODEV;
  474. /*
  475. * Load the MC AIOP image in the MC private DRAM block:
  476. */
  477. #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
  478. printf("MC AIOP is preloaded to %#llx\n", mc_ram_addr +
  479. CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET);
  480. #else
  481. aiop_img = (void *)aiop_fw_addr;
  482. mc_copy_image("MC AIOP image",
  483. (u64)aiop_img, CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH,
  484. mc_ram_addr + CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET);
  485. #endif
  486. mc_aiop_applied = 0;
  487. return 0;
  488. }
  489. #endif
  490. static int wait_for_mc(bool booting_mc, u32 *final_reg_gsr)
  491. {
  492. u32 reg_gsr;
  493. u32 mc_fw_boot_status;
  494. unsigned long timeout_ms = get_mc_boot_timeout_ms();
  495. struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
  496. dmb();
  497. assert(timeout_ms > 0);
  498. for (;;) {
  499. udelay(1000); /* throttle polling */
  500. reg_gsr = in_le32(&mc_ccsr_regs->reg_gsr);
  501. mc_fw_boot_status = (reg_gsr & GSR_FS_MASK);
  502. if (mc_fw_boot_status & 0x1)
  503. break;
  504. timeout_ms--;
  505. if (timeout_ms == 0)
  506. break;
  507. }
  508. if (timeout_ms == 0) {
  509. printf("ERROR: timeout\n");
  510. /* TODO: Get an error status from an MC CCSR register */
  511. return -ETIMEDOUT;
  512. }
  513. if (mc_fw_boot_status != 0x1) {
  514. /*
  515. * TODO: Identify critical errors from the GSR register's FS
  516. * field and for those errors, set error to -ENODEV or other
  517. * appropriate errno, so that the status property is set to
  518. * failure in the fsl,dprc device tree node.
  519. */
  520. printf("WARNING: Firmware returned an error (GSR: %#x)\n",
  521. reg_gsr);
  522. } else {
  523. printf("SUCCESS\n");
  524. }
  525. *final_reg_gsr = reg_gsr;
  526. return 0;
  527. }
  528. int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr)
  529. {
  530. int error = 0;
  531. int portal_id = 0;
  532. struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
  533. u64 mc_ram_addr = mc_get_dram_addr();
  534. u32 reg_gsr;
  535. u32 reg_mcfbalr;
  536. #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
  537. const void *raw_image_addr;
  538. size_t raw_image_size = 0;
  539. #endif
  540. struct mc_version mc_ver_info;
  541. u8 mc_ram_num_256mb_blocks;
  542. size_t mc_ram_size = mc_get_dram_block_size();
  543. mc_ram_num_256mb_blocks = mc_ram_size / MC_RAM_SIZE_ALIGNMENT;
  544. if (mc_ram_num_256mb_blocks < 1 || mc_ram_num_256mb_blocks > 0xff) {
  545. error = -EINVAL;
  546. printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
  547. mc_ram_size);
  548. goto out;
  549. }
  550. /*
  551. * Management Complex cores should be held at reset out of POR.
  552. * U-Boot should be the first software to touch MC. To be safe,
  553. * we reset all cores again by setting GCR1 to 0. It doesn't do
  554. * anything if they are held at reset. After we setup the firmware
  555. * we kick off MC by deasserting the reset bit for core 0, and
  556. * deasserting the reset bits for Command Portal Managers.
  557. * The stop bits are not touched here. They are used to stop the
  558. * cores when they are active. Setting stop bits doesn't stop the
  559. * cores from fetching instructions when they are released from
  560. * reset.
  561. */
  562. out_le32(&mc_ccsr_regs->reg_gcr1, 0);
  563. dmb();
  564. #ifdef CONFIG_SYS_LS_MC_FW_IN_DDR
  565. printf("MC firmware is preloaded to %#llx\n", mc_ram_addr);
  566. #else
  567. error = parse_mc_firmware_fit_image(mc_fw_addr, &raw_image_addr,
  568. &raw_image_size);
  569. if (error != 0)
  570. goto out;
  571. /*
  572. * Load the MC FW at the beginning of the MC private DRAM block:
  573. */
  574. mc_copy_image("MC Firmware",
  575. (u64)raw_image_addr, raw_image_size, mc_ram_addr);
  576. #endif
  577. dump_ram_words("firmware", (void *)mc_ram_addr);
  578. error = load_mc_dpc(mc_ram_addr, mc_ram_size, mc_dpc_addr);
  579. if (error != 0)
  580. goto out;
  581. debug("mc_ccsr_regs %p\n", mc_ccsr_regs);
  582. dump_mc_ccsr_regs(mc_ccsr_regs);
  583. /*
  584. * Tell MC what is the address range of the DRAM block assigned to it:
  585. */
  586. reg_mcfbalr = (u32)mc_ram_addr |
  587. (mc_ram_num_256mb_blocks - 1);
  588. out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr);
  589. out_le32(&mc_ccsr_regs->reg_mcfbahr,
  590. (u32)(mc_ram_addr >> 32));
  591. out_le32(&mc_ccsr_regs->reg_mcfapr, FSL_BYPASS_AMQ);
  592. /*
  593. * Tell the MC that we want delayed DPL deployment.
  594. */
  595. out_le32(&mc_ccsr_regs->reg_gsr, 0xDD00);
  596. printf("\nfsl-mc: Booting Management Complex ... ");
  597. /*
  598. * Deassert reset and release MC core 0 to run
  599. */
  600. out_le32(&mc_ccsr_regs->reg_gcr1, GCR1_P1_DE_RST | GCR1_M_ALL_DE_RST);
  601. error = wait_for_mc(true, &reg_gsr);
  602. if (error != 0)
  603. goto out;
  604. /*
  605. * TODO: need to obtain the portal_id for the root container from the
  606. * DPL
  607. */
  608. portal_id = 0;
  609. /*
  610. * Initialize the global default MC portal
  611. * And check that the MC firmware is responding portal commands:
  612. */
  613. root_mc_io = (struct fsl_mc_io *)calloc(sizeof(struct fsl_mc_io), 1);
  614. if (!root_mc_io) {
  615. printf(" No memory: calloc() failed\n");
  616. return -ENOMEM;
  617. }
  618. root_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(portal_id);
  619. debug("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n",
  620. portal_id, root_mc_io->mmio_regs);
  621. error = mc_get_version(root_mc_io, MC_CMD_NO_FLAGS, &mc_ver_info);
  622. if (error != 0) {
  623. printf("fsl-mc: ERROR: Firmware version check failed (error: %d)\n",
  624. error);
  625. goto out;
  626. }
  627. printf("fsl-mc: Management Complex booted (version: %d.%d.%d, boot status: %#x)\n",
  628. mc_ver_info.major, mc_ver_info.minor, mc_ver_info.revision,
  629. reg_gsr & GSR_FS_MASK);
  630. out:
  631. if (error != 0)
  632. mc_boot_status = error;
  633. else
  634. mc_boot_status = 0;
  635. return error;
  636. }
  637. int mc_apply_dpl(u64 mc_dpl_addr)
  638. {
  639. struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
  640. int error = 0;
  641. u32 reg_gsr;
  642. u64 mc_ram_addr = mc_get_dram_addr();
  643. size_t mc_ram_size = mc_get_dram_block_size();
  644. if (!mc_dpl_addr)
  645. return -1;
  646. error = load_mc_dpl(mc_ram_addr, mc_ram_size, mc_dpl_addr);
  647. if (error != 0)
  648. return error;
  649. /*
  650. * Tell the MC to deploy the DPL:
  651. */
  652. out_le32(&mc_ccsr_regs->reg_gsr, 0x0);
  653. printf("fsl-mc: Deploying data path layout ... ");
  654. error = wait_for_mc(false, &reg_gsr);
  655. if (!error)
  656. mc_dpl_applied = 0;
  657. return error;
  658. }
  659. int get_mc_boot_status(void)
  660. {
  661. return mc_boot_status;
  662. }
  663. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  664. int get_aiop_apply_status(void)
  665. {
  666. return mc_aiop_applied;
  667. }
  668. #endif
  669. int get_dpl_apply_status(void)
  670. {
  671. return mc_dpl_applied;
  672. }
  673. /*
  674. * Return the MC address of private DRAM block.
  675. * As per MC design document, MC initial base address
  676. * should be least significant 512MB address of MC private
  677. * memory, i.e. address should point to end address masked
  678. * with 512MB offset in private DRAM block.
  679. */
  680. u64 mc_get_dram_addr(void)
  681. {
  682. size_t mc_ram_size = mc_get_dram_block_size();
  683. return (gd->arch.resv_ram + mc_ram_size - 1) &
  684. MC_RAM_BASE_ADDR_ALIGNMENT_MASK;
  685. }
  686. /**
  687. * Return the actual size of the MC private DRAM block.
  688. */
  689. unsigned long mc_get_dram_block_size(void)
  690. {
  691. unsigned long dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
  692. char *dram_block_size_env_var = env_get(MC_MEM_SIZE_ENV_VAR);
  693. if (dram_block_size_env_var) {
  694. dram_block_size = simple_strtoul(dram_block_size_env_var, NULL,
  695. 16);
  696. if (dram_block_size < CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE) {
  697. printf("fsl-mc: WARNING: Invalid value for \'"
  698. MC_MEM_SIZE_ENV_VAR
  699. "\' environment variable: %lu\n",
  700. dram_block_size);
  701. dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
  702. }
  703. }
  704. return dram_block_size;
  705. }
  706. int fsl_mc_ldpaa_init(bd_t *bis)
  707. {
  708. int i;
  709. for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++)
  710. if ((wriop_is_enabled_dpmac(i) == 1) &&
  711. (wriop_get_phy_address(i) != -1))
  712. ldpaa_eth_init(i, wriop_get_enet_if(i));
  713. return 0;
  714. }
  715. static int dprc_version_check(struct fsl_mc_io *mc_io, uint16_t handle)
  716. {
  717. int error;
  718. uint16_t major_ver, minor_ver;
  719. error = dprc_get_api_version(mc_io, 0,
  720. &major_ver,
  721. &minor_ver);
  722. if (error < 0) {
  723. printf("dprc_get_api_version() failed: %d\n", error);
  724. return error;
  725. }
  726. if (major_ver < DPRC_VER_MAJOR || (major_ver == DPRC_VER_MAJOR &&
  727. minor_ver < DPRC_VER_MINOR)) {
  728. printf("DPRC version mismatch found %u.%u,",
  729. major_ver, minor_ver);
  730. printf("supported version is %u.%u\n",
  731. DPRC_VER_MAJOR, DPRC_VER_MINOR);
  732. }
  733. return error;
  734. }
  735. static int dpio_init(void)
  736. {
  737. struct qbman_swp_desc p_des;
  738. struct dpio_attr attr;
  739. struct dpio_cfg dpio_cfg;
  740. int err = 0;
  741. uint16_t major_ver, minor_ver;
  742. dflt_dpio = (struct fsl_dpio_obj *)calloc(
  743. sizeof(struct fsl_dpio_obj), 1);
  744. if (!dflt_dpio) {
  745. printf("No memory: calloc() failed\n");
  746. err = -ENOMEM;
  747. goto err_calloc;
  748. }
  749. dpio_cfg.channel_mode = DPIO_LOCAL_CHANNEL;
  750. dpio_cfg.num_priorities = 8;
  751. err = dpio_create(dflt_mc_io,
  752. dflt_dprc_handle,
  753. MC_CMD_NO_FLAGS,
  754. &dpio_cfg,
  755. &dflt_dpio->dpio_id);
  756. if (err < 0) {
  757. printf("dpio_create() failed: %d\n", err);
  758. err = -ENODEV;
  759. goto err_create;
  760. }
  761. err = dpio_get_api_version(dflt_mc_io, 0,
  762. &major_ver,
  763. &minor_ver);
  764. if (err < 0) {
  765. printf("dpio_get_api_version() failed: %d\n", err);
  766. goto err_get_api_ver;
  767. }
  768. if (major_ver < DPIO_VER_MAJOR || (major_ver == DPIO_VER_MAJOR &&
  769. minor_ver < DPIO_VER_MINOR)) {
  770. printf("DPRC version mismatch found %u.%u,",
  771. major_ver,
  772. minor_ver);
  773. }
  774. err = dpio_open(dflt_mc_io,
  775. MC_CMD_NO_FLAGS,
  776. dflt_dpio->dpio_id,
  777. &dflt_dpio->dpio_handle);
  778. if (err) {
  779. printf("dpio_open() failed\n");
  780. goto err_open;
  781. }
  782. memset(&attr, 0, sizeof(struct dpio_attr));
  783. err = dpio_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
  784. dflt_dpio->dpio_handle, &attr);
  785. if (err < 0) {
  786. printf("dpio_get_attributes() failed: %d\n", err);
  787. goto err_get_attr;
  788. }
  789. if (dflt_dpio->dpio_id != attr.id) {
  790. printf("dnpi object id and attribute id are not same\n");
  791. goto err_attr_not_same;
  792. }
  793. #ifdef DEBUG
  794. printf("Init: DPIO id=0x%d\n", dflt_dpio->dpio_id);
  795. #endif
  796. err = dpio_enable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  797. if (err < 0) {
  798. printf("dpio_enable() failed %d\n", err);
  799. goto err_get_enable;
  800. }
  801. debug("ce_offset=0x%llx, ci_offset=0x%llx, portalid=%d, prios=%d\n",
  802. attr.qbman_portal_ce_offset,
  803. attr.qbman_portal_ci_offset,
  804. attr.qbman_portal_id,
  805. attr.num_priorities);
  806. p_des.cena_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
  807. + attr.qbman_portal_ce_offset);
  808. p_des.cinh_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
  809. + attr.qbman_portal_ci_offset);
  810. dflt_dpio->sw_portal = qbman_swp_init(&p_des);
  811. if (dflt_dpio->sw_portal == NULL) {
  812. printf("qbman_swp_init() failed\n");
  813. goto err_get_swp_init;
  814. }
  815. return 0;
  816. err_get_swp_init:
  817. dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  818. err_get_enable:
  819. err_get_attr:
  820. err_attr_not_same:
  821. dpio_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  822. err_open:
  823. err_get_api_ver:
  824. dpio_destroy(dflt_mc_io,
  825. dflt_dprc_handle,
  826. MC_CMD_NO_FLAGS,
  827. dflt_dpio->dpio_id);
  828. err_create:
  829. free(dflt_dpio);
  830. err_calloc:
  831. return err;
  832. }
  833. static int dpio_exit(void)
  834. {
  835. int err;
  836. err = dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  837. if (err < 0) {
  838. printf("dpio_disable() failed: %d\n", err);
  839. goto err;
  840. }
  841. dpio_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  842. if (err < 0) {
  843. printf("dpio_close() failed: %d\n", err);
  844. goto err;
  845. }
  846. err = dpio_destroy(dflt_mc_io,
  847. dflt_dprc_handle,
  848. MC_CMD_NO_FLAGS,
  849. dflt_dpio->dpio_id);
  850. if (err < 0) {
  851. printf("dpio_destroy() failed: %d\n", err);
  852. goto err;
  853. }
  854. #ifdef DEBUG
  855. printf("Exit: DPIO id=0x%d\n", dflt_dpio->dpio_id);
  856. #endif
  857. if (dflt_dpio)
  858. free(dflt_dpio);
  859. return 0;
  860. err:
  861. return err;
  862. }
  863. static int dprc_init(void)
  864. {
  865. int err, child_portal_id, container_id;
  866. struct dprc_cfg cfg;
  867. uint64_t mc_portal_offset;
  868. /* Open root container */
  869. err = dprc_get_container_id(root_mc_io, MC_CMD_NO_FLAGS, &container_id);
  870. if (err < 0) {
  871. printf("dprc_get_container_id(): Root failed: %d\n", err);
  872. goto err_root_container_id;
  873. }
  874. #ifdef DEBUG
  875. printf("Root container id = %d\n", container_id);
  876. #endif
  877. err = dprc_open(root_mc_io, MC_CMD_NO_FLAGS, container_id,
  878. &root_dprc_handle);
  879. if (err < 0) {
  880. printf("dprc_open(): Root Container failed: %d\n", err);
  881. goto err_root_open;
  882. }
  883. if (!root_dprc_handle) {
  884. printf("dprc_open(): Root Container Handle is not valid\n");
  885. goto err_root_open;
  886. }
  887. err = dprc_version_check(root_mc_io, root_dprc_handle);
  888. if (err < 0) {
  889. printf("dprc_version_check() failed: %d\n", err);
  890. goto err_root_open;
  891. }
  892. memset(&cfg, 0, sizeof(struct dprc_cfg));
  893. cfg.options = DPRC_CFG_OPT_TOPOLOGY_CHANGES_ALLOWED |
  894. DPRC_CFG_OPT_OBJ_CREATE_ALLOWED |
  895. DPRC_CFG_OPT_ALLOC_ALLOWED;
  896. cfg.icid = DPRC_GET_ICID_FROM_POOL;
  897. cfg.portal_id = DPRC_GET_PORTAL_ID_FROM_POOL;
  898. err = dprc_create_container(root_mc_io, MC_CMD_NO_FLAGS,
  899. root_dprc_handle,
  900. &cfg,
  901. &child_dprc_id,
  902. &mc_portal_offset);
  903. if (err < 0) {
  904. printf("dprc_create_container() failed: %d\n", err);
  905. goto err_create;
  906. }
  907. dflt_mc_io = (struct fsl_mc_io *)calloc(sizeof(struct fsl_mc_io), 1);
  908. if (!dflt_mc_io) {
  909. err = -ENOMEM;
  910. printf(" No memory: calloc() failed\n");
  911. goto err_calloc;
  912. }
  913. child_portal_id = MC_PORTAL_OFFSET_TO_PORTAL_ID(mc_portal_offset);
  914. dflt_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(child_portal_id);
  915. #ifdef DEBUG
  916. printf("MC portal of child DPRC container: %d, physical addr %p)\n",
  917. child_dprc_id, dflt_mc_io->mmio_regs);
  918. #endif
  919. err = dprc_open(dflt_mc_io, MC_CMD_NO_FLAGS, child_dprc_id,
  920. &dflt_dprc_handle);
  921. if (err < 0) {
  922. printf("dprc_open(): Child container failed: %d\n", err);
  923. goto err_child_open;
  924. }
  925. if (!dflt_dprc_handle) {
  926. printf("dprc_open(): Child container Handle is not valid\n");
  927. goto err_child_open;
  928. }
  929. return 0;
  930. err_child_open:
  931. free(dflt_mc_io);
  932. err_calloc:
  933. dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS,
  934. root_dprc_handle, child_dprc_id);
  935. err_create:
  936. dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle);
  937. err_root_open:
  938. err_root_container_id:
  939. return err;
  940. }
  941. static int dprc_exit(void)
  942. {
  943. int err;
  944. err = dprc_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dprc_handle);
  945. if (err < 0) {
  946. printf("dprc_close(): Child failed: %d\n", err);
  947. goto err;
  948. }
  949. err = dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS,
  950. root_dprc_handle, child_dprc_id);
  951. if (err < 0) {
  952. printf("dprc_destroy_container() failed: %d\n", err);
  953. goto err;
  954. }
  955. err = dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle);
  956. if (err < 0) {
  957. printf("dprc_close(): Root failed: %d\n", err);
  958. goto err;
  959. }
  960. if (dflt_mc_io)
  961. free(dflt_mc_io);
  962. if (root_mc_io)
  963. free(root_mc_io);
  964. return 0;
  965. err:
  966. return err;
  967. }
  968. static int dpbp_init(void)
  969. {
  970. int err;
  971. struct dpbp_attr dpbp_attr;
  972. struct dpbp_cfg dpbp_cfg;
  973. uint16_t major_ver, minor_ver;
  974. dflt_dpbp = (struct fsl_dpbp_obj *)calloc(
  975. sizeof(struct fsl_dpbp_obj), 1);
  976. if (!dflt_dpbp) {
  977. printf("No memory: calloc() failed\n");
  978. err = -ENOMEM;
  979. goto err_calloc;
  980. }
  981. dpbp_cfg.options = 512;
  982. err = dpbp_create(dflt_mc_io,
  983. dflt_dprc_handle,
  984. MC_CMD_NO_FLAGS,
  985. &dpbp_cfg,
  986. &dflt_dpbp->dpbp_id);
  987. if (err < 0) {
  988. err = -ENODEV;
  989. printf("dpbp_create() failed: %d\n", err);
  990. goto err_create;
  991. }
  992. err = dpbp_get_api_version(dflt_mc_io, 0,
  993. &major_ver,
  994. &minor_ver);
  995. if (err < 0) {
  996. printf("dpbp_get_api_version() failed: %d\n", err);
  997. goto err_get_api_ver;
  998. }
  999. if (major_ver < DPBP_VER_MAJOR || (major_ver == DPBP_VER_MAJOR &&
  1000. minor_ver < DPBP_VER_MINOR)) {
  1001. printf("DPBP version mismatch found %u.%u,",
  1002. major_ver, minor_ver);
  1003. printf("supported version is %u.%u\n",
  1004. DPBP_VER_MAJOR, DPBP_VER_MINOR);
  1005. }
  1006. err = dpbp_open(dflt_mc_io,
  1007. MC_CMD_NO_FLAGS,
  1008. dflt_dpbp->dpbp_id,
  1009. &dflt_dpbp->dpbp_handle);
  1010. if (err) {
  1011. printf("dpbp_open() failed\n");
  1012. goto err_open;
  1013. }
  1014. memset(&dpbp_attr, 0, sizeof(struct dpbp_attr));
  1015. err = dpbp_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
  1016. dflt_dpbp->dpbp_handle,
  1017. &dpbp_attr);
  1018. if (err < 0) {
  1019. printf("dpbp_get_attributes() failed: %d\n", err);
  1020. goto err_get_attr;
  1021. }
  1022. if (dflt_dpbp->dpbp_id != dpbp_attr.id) {
  1023. printf("dpbp object id and attribute id are not same\n");
  1024. goto err_attr_not_same;
  1025. }
  1026. #ifdef DEBUG
  1027. printf("Init: DPBP id=0x%x\n", dflt_dpbp->dpbp_attr.id);
  1028. #endif
  1029. err = dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
  1030. if (err < 0) {
  1031. printf("dpbp_close() failed: %d\n", err);
  1032. goto err_close;
  1033. }
  1034. return 0;
  1035. err_get_attr:
  1036. err_attr_not_same:
  1037. dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
  1038. dpbp_destroy(dflt_mc_io,
  1039. dflt_dprc_handle,
  1040. MC_CMD_NO_FLAGS,
  1041. dflt_dpbp->dpbp_id);
  1042. err_get_api_ver:
  1043. err_close:
  1044. err_open:
  1045. err_create:
  1046. free(dflt_dpbp);
  1047. err_calloc:
  1048. return err;
  1049. }
  1050. static int dpbp_exit(void)
  1051. {
  1052. int err;
  1053. err = dpbp_destroy(dflt_mc_io, dflt_dprc_handle, MC_CMD_NO_FLAGS,
  1054. dflt_dpbp->dpbp_id);
  1055. if (err < 0) {
  1056. printf("dpbp_destroy() failed: %d\n", err);
  1057. goto err;
  1058. }
  1059. #ifdef DEBUG
  1060. printf("Exit: DPBP id=0x%d\n", dflt_dpbp->dpbp_attr.id);
  1061. #endif
  1062. if (dflt_dpbp)
  1063. free(dflt_dpbp);
  1064. return 0;
  1065. err:
  1066. return err;
  1067. }
  1068. static int dpni_init(void)
  1069. {
  1070. int err;
  1071. uint8_t cfg_buf[256] = {0};
  1072. struct dpni_cfg dpni_cfg;
  1073. uint16_t major_ver, minor_ver;
  1074. dflt_dpni = (struct fsl_dpni_obj *)calloc(
  1075. sizeof(struct fsl_dpni_obj), 1);
  1076. if (!dflt_dpni) {
  1077. printf("No memory: calloc() failed\n");
  1078. err = -ENOMEM;
  1079. goto err_calloc;
  1080. }
  1081. memset(&dpni_cfg, 0, sizeof(dpni_cfg));
  1082. err = dpni_prepare_cfg(&dpni_cfg, &cfg_buf[0]);
  1083. if (err < 0) {
  1084. err = -ENODEV;
  1085. printf("dpni_prepare_cfg() failed: %d\n", err);
  1086. goto err_prepare_cfg;
  1087. }
  1088. err = dpni_create(dflt_mc_io,
  1089. dflt_dprc_handle,
  1090. MC_CMD_NO_FLAGS,
  1091. &dpni_cfg,
  1092. &dflt_dpni->dpni_id);
  1093. if (err < 0) {
  1094. err = -ENODEV;
  1095. printf("dpni create() failed: %d\n", err);
  1096. goto err_create;
  1097. }
  1098. err = dpni_get_api_version(dflt_mc_io, 0,
  1099. &major_ver,
  1100. &minor_ver);
  1101. if (err < 0) {
  1102. printf("dpni_get_api_version() failed: %d\n", err);
  1103. goto err_get_version;
  1104. }
  1105. if (major_ver < DPNI_VER_MAJOR || (major_ver == DPNI_VER_MAJOR &&
  1106. minor_ver < DPNI_VER_MINOR)) {
  1107. printf("DPNI version mismatch found %u.%u,",
  1108. major_ver, minor_ver);
  1109. printf("supported version is %u.%u\n",
  1110. DPNI_VER_MAJOR, DPNI_VER_MINOR);
  1111. }
  1112. err = dpni_open(dflt_mc_io,
  1113. MC_CMD_NO_FLAGS,
  1114. dflt_dpni->dpni_id,
  1115. &dflt_dpni->dpni_handle);
  1116. if (err) {
  1117. printf("dpni_open() failed\n");
  1118. goto err_open;
  1119. }
  1120. #ifdef DEBUG
  1121. printf("Init: DPNI id=0x%d\n", dflt_dpni->dpni_id);
  1122. #endif
  1123. err = dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
  1124. if (err < 0) {
  1125. printf("dpni_close() failed: %d\n", err);
  1126. goto err_close;
  1127. }
  1128. return 0;
  1129. err_close:
  1130. dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
  1131. err_open:
  1132. err_get_version:
  1133. dpni_destroy(dflt_mc_io,
  1134. dflt_dprc_handle,
  1135. MC_CMD_NO_FLAGS,
  1136. dflt_dpni->dpni_id);
  1137. err_create:
  1138. err_prepare_cfg:
  1139. free(dflt_dpni);
  1140. err_calloc:
  1141. return err;
  1142. }
  1143. static int dpni_exit(void)
  1144. {
  1145. int err;
  1146. err = dpni_destroy(dflt_mc_io, dflt_dprc_handle, MC_CMD_NO_FLAGS,
  1147. dflt_dpni->dpni_id);
  1148. if (err < 0) {
  1149. printf("dpni_destroy() failed: %d\n", err);
  1150. goto err;
  1151. }
  1152. #ifdef DEBUG
  1153. printf("Exit: DPNI id=0x%d\n", dflt_dpni->dpni_id);
  1154. #endif
  1155. if (dflt_dpni)
  1156. free(dflt_dpni);
  1157. return 0;
  1158. err:
  1159. return err;
  1160. }
  1161. static int mc_init_object(void)
  1162. {
  1163. int err = 0;
  1164. err = dprc_init();
  1165. if (err < 0) {
  1166. printf("dprc_init() failed: %d\n", err);
  1167. goto err;
  1168. }
  1169. err = dpbp_init();
  1170. if (err < 0) {
  1171. printf("dpbp_init() failed: %d\n", err);
  1172. goto err;
  1173. }
  1174. err = dpio_init();
  1175. if (err < 0) {
  1176. printf("dpio_init() failed: %d\n", err);
  1177. goto err;
  1178. }
  1179. err = dpni_init();
  1180. if (err < 0) {
  1181. printf("dpni_init() failed: %d\n", err);
  1182. goto err;
  1183. }
  1184. return 0;
  1185. err:
  1186. return err;
  1187. }
  1188. int fsl_mc_ldpaa_exit(bd_t *bd)
  1189. {
  1190. int err = 0;
  1191. bool is_dpl_apply_status = false;
  1192. bool mc_boot_status = false;
  1193. if (bd && mc_lazy_dpl_addr && !fsl_mc_ldpaa_exit(NULL)) {
  1194. err = mc_apply_dpl(mc_lazy_dpl_addr);
  1195. if (!err)
  1196. fdt_fixup_board_enet(working_fdt);
  1197. mc_lazy_dpl_addr = 0;
  1198. }
  1199. if (!get_mc_boot_status())
  1200. mc_boot_status = true;
  1201. /* MC is not loaded intentionally, So return success. */
  1202. if (bd && !mc_boot_status)
  1203. return 0;
  1204. /* If DPL is deployed, set is_dpl_apply_status as TRUE. */
  1205. if (!get_dpl_apply_status())
  1206. is_dpl_apply_status = true;
  1207. /*
  1208. * For case MC is loaded but DPL is not deployed, return success and
  1209. * print message on console. Else FDT fix-up code execution hanged.
  1210. */
  1211. if (bd && mc_boot_status && !is_dpl_apply_status) {
  1212. printf("fsl-mc: DPL not deployed, DPAA2 ethernet not work\n");
  1213. goto mc_obj_cleanup;
  1214. }
  1215. if (bd && mc_boot_status && is_dpl_apply_status)
  1216. return 0;
  1217. mc_obj_cleanup:
  1218. err = dpbp_exit();
  1219. if (err < 0) {
  1220. printf("dpbp_exit() failed: %d\n", err);
  1221. goto err;
  1222. }
  1223. err = dpio_exit();
  1224. if (err < 0) {
  1225. printf("dpio_exit() failed: %d\n", err);
  1226. goto err;
  1227. }
  1228. err = dpni_exit();
  1229. if (err < 0) {
  1230. printf("dpni_exit() failed: %d\n", err);
  1231. goto err;
  1232. }
  1233. err = dprc_exit();
  1234. if (err < 0) {
  1235. printf("dprc_exit() failed: %d\n", err);
  1236. goto err;
  1237. }
  1238. return 0;
  1239. err:
  1240. return err;
  1241. }
  1242. static int do_fsl_mc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  1243. {
  1244. int err = 0;
  1245. if (argc < 3)
  1246. goto usage;
  1247. switch (argv[1][0]) {
  1248. case 's': {
  1249. char sub_cmd;
  1250. u64 mc_fw_addr, mc_dpc_addr;
  1251. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  1252. u64 aiop_fw_addr;
  1253. #endif
  1254. sub_cmd = argv[2][0];
  1255. switch (sub_cmd) {
  1256. case 'm':
  1257. if (argc < 5)
  1258. goto usage;
  1259. if (get_mc_boot_status() == 0) {
  1260. printf("fsl-mc: MC is already booted");
  1261. printf("\n");
  1262. return err;
  1263. }
  1264. mc_fw_addr = simple_strtoull(argv[3], NULL, 16);
  1265. mc_dpc_addr = simple_strtoull(argv[4], NULL,
  1266. 16);
  1267. if (!mc_init(mc_fw_addr, mc_dpc_addr))
  1268. err = mc_init_object();
  1269. break;
  1270. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  1271. case 'a':
  1272. if (argc < 4)
  1273. goto usage;
  1274. if (get_aiop_apply_status() == 0) {
  1275. printf("fsl-mc: AIOP FW is already");
  1276. printf(" applied\n");
  1277. return err;
  1278. }
  1279. aiop_fw_addr = simple_strtoull(argv[3], NULL,
  1280. 16);
  1281. /* if SoC doesn't have AIOP, err = -ENODEV */
  1282. err = load_mc_aiop_img(aiop_fw_addr);
  1283. if (!err)
  1284. printf("fsl-mc: AIOP FW applied\n");
  1285. break;
  1286. #endif
  1287. default:
  1288. printf("Invalid option: %s\n", argv[2]);
  1289. goto usage;
  1290. break;
  1291. }
  1292. }
  1293. break;
  1294. case 'l':
  1295. case 'a': {
  1296. u64 mc_dpl_addr;
  1297. if (argc < 4)
  1298. goto usage;
  1299. if (get_dpl_apply_status() == 0) {
  1300. printf("fsl-mc: DPL already applied\n");
  1301. return err;
  1302. }
  1303. mc_dpl_addr = simple_strtoull(argv[3], NULL,
  1304. 16);
  1305. if (get_mc_boot_status() != 0) {
  1306. printf("fsl-mc: Deploying data path layout ..");
  1307. printf("ERROR (MC is not booted)\n");
  1308. return -ENODEV;
  1309. }
  1310. if (argv[1][0] == 'l') {
  1311. /*
  1312. * We will do the actual dpaa exit and dpl apply
  1313. * later from announce_and_cleanup().
  1314. */
  1315. mc_lazy_dpl_addr = mc_dpl_addr;
  1316. } else {
  1317. /* The user wants it applied now */
  1318. if (!fsl_mc_ldpaa_exit(NULL))
  1319. err = mc_apply_dpl(mc_dpl_addr);
  1320. }
  1321. break;
  1322. }
  1323. default:
  1324. printf("Invalid option: %s\n", argv[1]);
  1325. goto usage;
  1326. break;
  1327. }
  1328. return err;
  1329. usage:
  1330. return CMD_RET_USAGE;
  1331. }
  1332. U_BOOT_CMD(
  1333. fsl_mc, CONFIG_SYS_MAXARGS, 1, do_fsl_mc,
  1334. "DPAA2 command to manage Management Complex (MC)",
  1335. "start mc [FW_addr] [DPC_addr] - Start Management Complex\n"
  1336. "fsl_mc apply DPL [DPL_addr] - Apply DPL file\n"
  1337. "fsl_mc lazyapply DPL [DPL_addr] - Apply DPL file on exit\n"
  1338. "fsl_mc start aiop [FW_addr] - Start AIOP\n"
  1339. );
  1340. void mc_env_boot(void)
  1341. {
  1342. #if defined(CONFIG_FSL_MC_ENET)
  1343. char *mc_boot_env_var;
  1344. /* The MC may only be initialized in the reset PHY function
  1345. * because otherwise U-Boot has not yet set up all the MAC
  1346. * address info properly. Without MAC addresses, the MC code
  1347. * can not properly initialize the DPC.
  1348. */
  1349. mc_boot_env_var = env_get(MC_BOOT_ENV_VAR);
  1350. if (mc_boot_env_var)
  1351. run_command_list(mc_boot_env_var, -1, 0);
  1352. #endif /* CONFIG_FSL_MC_ENET */
  1353. }