qbman_private.h 5.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2014 Freescale Semiconductor
  4. */
  5. /* Perform extra checking */
  6. #include <common.h>
  7. #include <errno.h>
  8. #include <asm/io.h>
  9. #include <linux/types.h>
  10. #include <asm/atomic.h>
  11. #include <malloc.h>
  12. #include <asm/arch/soc.h>
  13. #include <fsl-mc/fsl_qbman_base.h>
  14. #define QBMAN_CHECKING
  15. /* Any time there is a register interface which we poll on, this provides a
  16. * "break after x iterations" scheme for it. It's handy for debugging, eg.
  17. * where you don't want millions of lines of log output from a polling loop
  18. * that won't, because such things tend to drown out the earlier log output
  19. * that might explain what caused the problem. (NB: put ";" after each macro!)
  20. * TODO: we should probably remove this once we're done sanitising the
  21. * simulator...
  22. */
  23. #define DBG_POLL_START(loopvar) (loopvar = 10)
  24. #define DBG_POLL_CHECK(loopvar) \
  25. do {if (!(loopvar--)) BUG_ON(NULL == "DBG_POLL_CHECK"); } while (0)
  26. /* For CCSR or portal-CINH registers that contain fields at arbitrary offsets
  27. * and widths, these macro-generated encode/decode/isolate/remove inlines can
  28. * be used.
  29. *
  30. * Eg. to "d"ecode a 14-bit field out of a register (into a "uint16_t" type),
  31. * where the field is located 3 bits "up" from the least-significant bit of the
  32. * register (ie. the field location within the 32-bit register corresponds to a
  33. * mask of 0x0001fff8), you would do;
  34. * uint16_t field = d32_uint16_t(3, 14, reg_value);
  35. *
  36. * Or to "e"ncode a 1-bit boolean value (input type is "int", zero is FALSE,
  37. * non-zero is TRUE, so must convert all non-zero inputs to 1, hence the "!!"
  38. * operator) into a register at bit location 0x00080000 (19 bits "in" from the
  39. * LS bit), do;
  40. * reg_value |= e32_int(19, 1, !!field);
  41. *
  42. * If you wish to read-modify-write a register, such that you leave the 14-bit
  43. * field as-is but have all other fields set to zero, then "i"solate the 14-bit
  44. * value using;
  45. * reg_value = i32_uint16_t(3, 14, reg_value);
  46. *
  47. * Alternatively, you could "r"emove the 1-bit boolean field (setting it to
  48. * zero) but leaving all other fields as-is;
  49. * reg_val = r32_int(19, 1, reg_value);
  50. *
  51. */
  52. #define MAKE_MASK32(width) (width == 32 ? 0xffffffff : \
  53. (uint32_t)((1 << width) - 1))
  54. #define DECLARE_CODEC32(t) \
  55. static inline uint32_t e32_##t(uint32_t lsoffset, uint32_t width, t val) \
  56. { \
  57. BUG_ON(width > (sizeof(t) * 8)); \
  58. return ((uint32_t)val & MAKE_MASK32(width)) << lsoffset; \
  59. } \
  60. static inline t d32_##t(uint32_t lsoffset, uint32_t width, uint32_t val) \
  61. { \
  62. BUG_ON(width > (sizeof(t) * 8)); \
  63. return (t)((val >> lsoffset) & MAKE_MASK32(width)); \
  64. } \
  65. static inline uint32_t i32_##t(uint32_t lsoffset, uint32_t width, \
  66. uint32_t val) \
  67. { \
  68. BUG_ON(width > (sizeof(t) * 8)); \
  69. return e32_##t(lsoffset, width, d32_##t(lsoffset, width, val)); \
  70. } \
  71. static inline uint32_t r32_##t(uint32_t lsoffset, uint32_t width, \
  72. uint32_t val) \
  73. { \
  74. BUG_ON(width > (sizeof(t) * 8)); \
  75. return ~(MAKE_MASK32(width) << lsoffset) & val; \
  76. }
  77. DECLARE_CODEC32(uint32_t)
  78. DECLARE_CODEC32(uint16_t)
  79. DECLARE_CODEC32(uint8_t)
  80. DECLARE_CODEC32(int)
  81. /*********************/
  82. /* Debugging assists */
  83. /*********************/
  84. static inline void __hexdump(unsigned long start, unsigned long end,
  85. unsigned long p, size_t sz, const unsigned char *c)
  86. {
  87. while (start < end) {
  88. unsigned int pos = 0;
  89. char buf[64];
  90. int nl = 0;
  91. pos += sprintf(buf + pos, "%08lx: ", start);
  92. do {
  93. if ((start < p) || (start >= (p + sz)))
  94. pos += sprintf(buf + pos, "..");
  95. else
  96. pos += sprintf(buf + pos, "%02x", *(c++));
  97. if (!(++start & 15)) {
  98. buf[pos++] = '\n';
  99. nl = 1;
  100. } else {
  101. nl = 0;
  102. if (!(start & 1))
  103. buf[pos++] = ' ';
  104. if (!(start & 3))
  105. buf[pos++] = ' ';
  106. }
  107. } while (start & 15);
  108. if (!nl)
  109. buf[pos++] = '\n';
  110. buf[pos] = '\0';
  111. debug("%s", buf);
  112. }
  113. }
  114. static inline void hexdump(const void *ptr, size_t sz)
  115. {
  116. unsigned long p = (unsigned long)ptr;
  117. unsigned long start = p & ~(unsigned long)15;
  118. unsigned long end = (p + sz + 15) & ~(unsigned long)15;
  119. const unsigned char *c = ptr;
  120. __hexdump(start, end, p, sz, c);
  121. }
  122. #if defined(__BIG_ENDIAN)
  123. #define DQRR_TOK_OFFSET 0
  124. #else
  125. #define DQRR_TOK_OFFSET 24
  126. #endif
  127. /* Similarly-named functions */
  128. #define upper32(a) upper_32_bits(a)
  129. #define lower32(a) lower_32_bits(a)
  130. /****************/
  131. /* arch assists */
  132. /****************/
  133. static inline void dcbz(void *ptr)
  134. {
  135. uint32_t *p = ptr;
  136. BUG_ON((unsigned long)ptr & 63);
  137. p[0] = 0;
  138. p[1] = 0;
  139. p[2] = 0;
  140. p[3] = 0;
  141. p[4] = 0;
  142. p[5] = 0;
  143. p[6] = 0;
  144. p[7] = 0;
  145. p[8] = 0;
  146. p[9] = 0;
  147. p[10] = 0;
  148. p[11] = 0;
  149. p[12] = 0;
  150. p[13] = 0;
  151. p[14] = 0;
  152. p[15] = 0;
  153. }
  154. #define lwsync()
  155. void qbman_version(u32 *major, u32 *minor)
  156. {
  157. u32 svr_dev_id;
  158. /*
  159. * LS2080A SoC and its personalities has qbman cotroller version 4.0
  160. * New SoCs like LS2088A, LS1088A has qbman conroller version 4.1
  161. */
  162. svr_dev_id = get_svr();
  163. if (IS_SVR_DEV(svr_dev_id, SVR_DEV(SVR_LS2080A))) {
  164. *major = 4;
  165. *minor = 0;
  166. } else {
  167. *major = 4;
  168. *minor = 1;
  169. }
  170. }
  171. #include "qbman_sys.h"