qbman_portal.c 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2014 Freescale Semiconductor
  4. */
  5. #include <asm/arch/clock.h>
  6. #include "qbman_portal.h"
  7. /* QBMan portal management command codes */
  8. #define QBMAN_MC_ACQUIRE 0x30
  9. #define QBMAN_WQCHAN_CONFIGURE 0x46
  10. /* CINH register offsets */
  11. #define QBMAN_CINH_SWP_EQAR 0x8c0
  12. #define QBMAN_CINH_SWP_DCAP 0xac0
  13. #define QBMAN_CINH_SWP_SDQCR 0xb00
  14. #define QBMAN_CINH_SWP_RAR 0xcc0
  15. /* CENA register offsets */
  16. #define QBMAN_CENA_SWP_EQCR(n) (0x000 + ((uint32_t)(n) << 6))
  17. #define QBMAN_CENA_SWP_DQRR(n) (0x200 + ((uint32_t)(n) << 6))
  18. #define QBMAN_CENA_SWP_RCR(n) (0x400 + ((uint32_t)(n) << 6))
  19. #define QBMAN_CENA_SWP_CR 0x600
  20. #define QBMAN_CENA_SWP_RR(vb) (0x700 + ((uint32_t)(vb) >> 1))
  21. #define QBMAN_CENA_SWP_VDQCR 0x780
  22. /* Reverse mapping of QBMAN_CENA_SWP_DQRR() */
  23. #define QBMAN_IDX_FROM_DQRR(p) (((unsigned long)p & 0x1ff) >> 6)
  24. /*******************************/
  25. /* Pre-defined attribute codes */
  26. /*******************************/
  27. struct qb_attr_code code_generic_verb = QB_CODE(0, 0, 7);
  28. struct qb_attr_code code_generic_rslt = QB_CODE(0, 8, 8);
  29. /*************************/
  30. /* SDQCR attribute codes */
  31. /*************************/
  32. /* we put these here because at least some of them are required by
  33. * qbman_swp_init() */
  34. struct qb_attr_code code_sdqcr_dct = QB_CODE(0, 24, 2);
  35. struct qb_attr_code code_sdqcr_fc = QB_CODE(0, 29, 1);
  36. struct qb_attr_code code_sdqcr_tok = QB_CODE(0, 16, 8);
  37. #define CODE_SDQCR_DQSRC(n) QB_CODE(0, n, 1)
  38. enum qbman_sdqcr_dct {
  39. qbman_sdqcr_dct_null = 0,
  40. qbman_sdqcr_dct_prio_ics,
  41. qbman_sdqcr_dct_active_ics,
  42. qbman_sdqcr_dct_active
  43. };
  44. enum qbman_sdqcr_fc {
  45. qbman_sdqcr_fc_one = 0,
  46. qbman_sdqcr_fc_up_to_3 = 1
  47. };
  48. /*********************************/
  49. /* Portal constructor/destructor */
  50. /*********************************/
  51. /* Software portals should always be in the power-on state when we initialise,
  52. * due to the CCSR-based portal reset functionality that MC has. */
  53. struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)
  54. {
  55. int ret;
  56. struct qbman_swp *p = malloc(sizeof(struct qbman_swp));
  57. u32 major = 0, minor = 0;
  58. if (!p)
  59. return NULL;
  60. p->desc = d;
  61. #ifdef QBMAN_CHECKING
  62. p->mc.check = swp_mc_can_start;
  63. #endif
  64. p->mc.valid_bit = QB_VALID_BIT;
  65. p->sdq = 0;
  66. qb_attr_code_encode(&code_sdqcr_dct, &p->sdq, qbman_sdqcr_dct_prio_ics);
  67. qb_attr_code_encode(&code_sdqcr_fc, &p->sdq, qbman_sdqcr_fc_up_to_3);
  68. qb_attr_code_encode(&code_sdqcr_tok, &p->sdq, 0xbb);
  69. atomic_set(&p->vdq.busy, 1);
  70. p->vdq.valid_bit = QB_VALID_BIT;
  71. p->dqrr.next_idx = 0;
  72. qbman_version(&major, &minor);
  73. if (!major) {
  74. printf("invalid qbman version\n");
  75. return NULL;
  76. }
  77. if (major >= 4 && minor >= 1)
  78. p->dqrr.dqrr_size = QBMAN_VER_4_1_DQRR_SIZE;
  79. else
  80. p->dqrr.dqrr_size = QBMAN_VER_4_0_DQRR_SIZE;
  81. p->dqrr.valid_bit = QB_VALID_BIT;
  82. ret = qbman_swp_sys_init(&p->sys, d, p->dqrr.dqrr_size);
  83. if (ret) {
  84. free(p);
  85. printf("qbman_swp_sys_init() failed %d\n", ret);
  86. return NULL;
  87. }
  88. qbman_cinh_write(&p->sys, QBMAN_CINH_SWP_SDQCR, p->sdq);
  89. return p;
  90. }
  91. /***********************/
  92. /* Management commands */
  93. /***********************/
  94. /*
  95. * Internal code common to all types of management commands.
  96. */
  97. void *qbman_swp_mc_start(struct qbman_swp *p)
  98. {
  99. void *ret;
  100. int *return_val;
  101. #ifdef QBMAN_CHECKING
  102. BUG_ON(p->mc.check != swp_mc_can_start);
  103. #endif
  104. ret = qbman_cena_write_start(&p->sys, QBMAN_CENA_SWP_CR);
  105. #ifdef QBMAN_CHECKING
  106. return_val = (int *)ret;
  107. if (!(*return_val))
  108. p->mc.check = swp_mc_can_submit;
  109. #endif
  110. return ret;
  111. }
  112. void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint32_t cmd_verb)
  113. {
  114. uint32_t *v = cmd;
  115. #ifdef QBMAN_CHECKING
  116. BUG_ON(p->mc.check != swp_mc_can_submit);
  117. #endif
  118. lwsync();
  119. /* TBD: "|=" is going to hurt performance. Need to move as many fields
  120. * out of word zero, and for those that remain, the "OR" needs to occur
  121. * at the caller side. This debug check helps to catch cases where the
  122. * caller wants to OR but has forgotten to do so. */
  123. BUG_ON((*v & cmd_verb) != *v);
  124. *v = cmd_verb | p->mc.valid_bit;
  125. qbman_cena_write_complete(&p->sys, QBMAN_CENA_SWP_CR, cmd);
  126. /* TODO: add prefetch support for GPP */
  127. #ifdef QBMAN_CHECKING
  128. p->mc.check = swp_mc_can_poll;
  129. #endif
  130. }
  131. void *qbman_swp_mc_result(struct qbman_swp *p)
  132. {
  133. uint32_t *ret, verb;
  134. #ifdef QBMAN_CHECKING
  135. BUG_ON(p->mc.check != swp_mc_can_poll);
  136. #endif
  137. ret = qbman_cena_read(&p->sys, QBMAN_CENA_SWP_RR(p->mc.valid_bit));
  138. /* Remove the valid-bit - command completed iff the rest is non-zero */
  139. verb = ret[0] & ~QB_VALID_BIT;
  140. if (!verb)
  141. return NULL;
  142. #ifdef QBMAN_CHECKING
  143. p->mc.check = swp_mc_can_start;
  144. #endif
  145. p->mc.valid_bit ^= QB_VALID_BIT;
  146. return ret;
  147. }
  148. /***********/
  149. /* Enqueue */
  150. /***********/
  151. /* These should be const, eventually */
  152. static struct qb_attr_code code_eq_cmd = QB_CODE(0, 0, 2);
  153. static struct qb_attr_code code_eq_orp_en = QB_CODE(0, 2, 1);
  154. static struct qb_attr_code code_eq_tgt_id = QB_CODE(2, 0, 24);
  155. /* static struct qb_attr_code code_eq_tag = QB_CODE(3, 0, 32); */
  156. static struct qb_attr_code code_eq_qd_en = QB_CODE(0, 4, 1);
  157. static struct qb_attr_code code_eq_qd_bin = QB_CODE(4, 0, 16);
  158. static struct qb_attr_code code_eq_qd_pri = QB_CODE(4, 16, 4);
  159. static struct qb_attr_code code_eq_rsp_stash = QB_CODE(5, 16, 1);
  160. static struct qb_attr_code code_eq_rsp_lo = QB_CODE(6, 0, 32);
  161. enum qbman_eq_cmd_e {
  162. /* No enqueue, primarily for plugging ORP gaps for dropped frames */
  163. qbman_eq_cmd_empty,
  164. /* DMA an enqueue response once complete */
  165. qbman_eq_cmd_respond,
  166. /* DMA an enqueue response only if the enqueue fails */
  167. qbman_eq_cmd_respond_reject
  168. };
  169. void qbman_eq_desc_clear(struct qbman_eq_desc *d)
  170. {
  171. memset(d, 0, sizeof(*d));
  172. }
  173. void qbman_eq_desc_set_no_orp(struct qbman_eq_desc *d, int respond_success)
  174. {
  175. uint32_t *cl = qb_cl(d);
  176. qb_attr_code_encode(&code_eq_orp_en, cl, 0);
  177. qb_attr_code_encode(&code_eq_cmd, cl,
  178. respond_success ? qbman_eq_cmd_respond :
  179. qbman_eq_cmd_respond_reject);
  180. }
  181. void qbman_eq_desc_set_response(struct qbman_eq_desc *d,
  182. dma_addr_t storage_phys,
  183. int stash)
  184. {
  185. uint32_t *cl = qb_cl(d);
  186. qb_attr_code_encode_64(&code_eq_rsp_lo, (uint64_t *)cl, storage_phys);
  187. qb_attr_code_encode(&code_eq_rsp_stash, cl, !!stash);
  188. }
  189. void qbman_eq_desc_set_qd(struct qbman_eq_desc *d, uint32_t qdid,
  190. uint32_t qd_bin, uint32_t qd_prio)
  191. {
  192. uint32_t *cl = qb_cl(d);
  193. qb_attr_code_encode(&code_eq_qd_en, cl, 1);
  194. qb_attr_code_encode(&code_eq_tgt_id, cl, qdid);
  195. qb_attr_code_encode(&code_eq_qd_bin, cl, qd_bin);
  196. qb_attr_code_encode(&code_eq_qd_pri, cl, qd_prio);
  197. }
  198. #define EQAR_IDX(eqar) ((eqar) & 0x7)
  199. #define EQAR_VB(eqar) ((eqar) & 0x80)
  200. #define EQAR_SUCCESS(eqar) ((eqar) & 0x100)
  201. int qbman_swp_enqueue(struct qbman_swp *s, const struct qbman_eq_desc *d,
  202. const struct qbman_fd *fd)
  203. {
  204. uint32_t *p;
  205. const uint32_t *cl = qb_cl(d);
  206. uint32_t eqar = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_EQAR);
  207. debug("EQAR=%08x\n", eqar);
  208. if (!EQAR_SUCCESS(eqar))
  209. return -EBUSY;
  210. p = qbman_cena_write_start(&s->sys,
  211. QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));
  212. word_copy(&p[1], &cl[1], 7);
  213. word_copy(&p[8], fd, sizeof(*fd) >> 2);
  214. lwsync();
  215. /* Set the verb byte, have to substitute in the valid-bit */
  216. p[0] = cl[0] | EQAR_VB(eqar);
  217. qbman_cena_write_complete(&s->sys,
  218. QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)),
  219. p);
  220. return 0;
  221. }
  222. /***************************/
  223. /* Volatile (pull) dequeue */
  224. /***************************/
  225. /* These should be const, eventually */
  226. static struct qb_attr_code code_pull_dct = QB_CODE(0, 0, 2);
  227. static struct qb_attr_code code_pull_dt = QB_CODE(0, 2, 2);
  228. static struct qb_attr_code code_pull_rls = QB_CODE(0, 4, 1);
  229. static struct qb_attr_code code_pull_stash = QB_CODE(0, 5, 1);
  230. static struct qb_attr_code code_pull_numframes = QB_CODE(0, 8, 4);
  231. static struct qb_attr_code code_pull_token = QB_CODE(0, 16, 8);
  232. static struct qb_attr_code code_pull_dqsource = QB_CODE(1, 0, 24);
  233. static struct qb_attr_code code_pull_rsp_lo = QB_CODE(2, 0, 32);
  234. enum qb_pull_dt_e {
  235. qb_pull_dt_channel,
  236. qb_pull_dt_workqueue,
  237. qb_pull_dt_framequeue
  238. };
  239. void qbman_pull_desc_clear(struct qbman_pull_desc *d)
  240. {
  241. memset(d, 0, sizeof(*d));
  242. }
  243. void qbman_pull_desc_set_storage(struct qbman_pull_desc *d,
  244. struct ldpaa_dq *storage,
  245. dma_addr_t storage_phys,
  246. int stash)
  247. {
  248. uint32_t *cl = qb_cl(d);
  249. /* Squiggle the pointer 'storage' into the extra 2 words of the
  250. * descriptor (which aren't copied to the hw command) */
  251. *(void **)&cl[4] = storage;
  252. if (!storage) {
  253. qb_attr_code_encode(&code_pull_rls, cl, 0);
  254. return;
  255. }
  256. qb_attr_code_encode(&code_pull_rls, cl, 1);
  257. qb_attr_code_encode(&code_pull_stash, cl, !!stash);
  258. qb_attr_code_encode_64(&code_pull_rsp_lo, (uint64_t *)cl, storage_phys);
  259. }
  260. void qbman_pull_desc_set_numframes(struct qbman_pull_desc *d, uint8_t numframes)
  261. {
  262. uint32_t *cl = qb_cl(d);
  263. BUG_ON(!numframes || (numframes > 16));
  264. qb_attr_code_encode(&code_pull_numframes, cl,
  265. (uint32_t)(numframes - 1));
  266. }
  267. void qbman_pull_desc_set_token(struct qbman_pull_desc *d, uint8_t token)
  268. {
  269. uint32_t *cl = qb_cl(d);
  270. qb_attr_code_encode(&code_pull_token, cl, token);
  271. }
  272. void qbman_pull_desc_set_fq(struct qbman_pull_desc *d, uint32_t fqid)
  273. {
  274. uint32_t *cl = qb_cl(d);
  275. qb_attr_code_encode(&code_pull_dct, cl, 1);
  276. qb_attr_code_encode(&code_pull_dt, cl, qb_pull_dt_framequeue);
  277. qb_attr_code_encode(&code_pull_dqsource, cl, fqid);
  278. }
  279. int qbman_swp_pull(struct qbman_swp *s, struct qbman_pull_desc *d)
  280. {
  281. uint32_t *p;
  282. uint32_t *cl = qb_cl(d);
  283. if (!atomic_dec_and_test(&s->vdq.busy)) {
  284. atomic_inc(&s->vdq.busy);
  285. return -EBUSY;
  286. }
  287. s->vdq.storage = *(void **)&cl[4];
  288. s->vdq.token = qb_attr_code_decode(&code_pull_token, cl);
  289. p = qbman_cena_write_start(&s->sys, QBMAN_CENA_SWP_VDQCR);
  290. word_copy(&p[1], &cl[1], 3);
  291. lwsync();
  292. /* Set the verb byte, have to substitute in the valid-bit */
  293. p[0] = cl[0] | s->vdq.valid_bit;
  294. s->vdq.valid_bit ^= QB_VALID_BIT;
  295. qbman_cena_write_complete(&s->sys, QBMAN_CENA_SWP_VDQCR, p);
  296. return 0;
  297. }
  298. /****************/
  299. /* Polling DQRR */
  300. /****************/
  301. static struct qb_attr_code code_dqrr_verb = QB_CODE(0, 0, 8);
  302. static struct qb_attr_code code_dqrr_response = QB_CODE(0, 0, 7);
  303. static struct qb_attr_code code_dqrr_stat = QB_CODE(0, 8, 8);
  304. #define QBMAN_DQRR_RESPONSE_DQ 0x60
  305. #define QBMAN_DQRR_RESPONSE_FQRN 0x21
  306. #define QBMAN_DQRR_RESPONSE_FQRNI 0x22
  307. #define QBMAN_DQRR_RESPONSE_FQPN 0x24
  308. #define QBMAN_DQRR_RESPONSE_FQDAN 0x25
  309. #define QBMAN_DQRR_RESPONSE_CDAN 0x26
  310. #define QBMAN_DQRR_RESPONSE_CSCN_MEM 0x27
  311. #define QBMAN_DQRR_RESPONSE_CGCU 0x28
  312. #define QBMAN_DQRR_RESPONSE_BPSCN 0x29
  313. #define QBMAN_DQRR_RESPONSE_CSCN_WQ 0x2a
  314. /* NULL return if there are no unconsumed DQRR entries. Returns a DQRR entry
  315. * only once, so repeated calls can return a sequence of DQRR entries, without
  316. * requiring they be consumed immediately or in any particular order. */
  317. const struct ldpaa_dq *qbman_swp_dqrr_next(struct qbman_swp *s)
  318. {
  319. uint32_t verb;
  320. uint32_t response_verb;
  321. uint32_t flags;
  322. const struct ldpaa_dq *dq;
  323. const uint32_t *p;
  324. dq = qbman_cena_read(&s->sys, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
  325. p = qb_cl(dq);
  326. verb = qb_attr_code_decode(&code_dqrr_verb, p);
  327. /* If the valid-bit isn't of the expected polarity, nothing there. Note,
  328. * in the DQRR reset bug workaround, we shouldn't need to skip these
  329. * check, because we've already determined that a new entry is available
  330. * and we've invalidated the cacheline before reading it, so the
  331. * valid-bit behaviour is repaired and should tell us what we already
  332. * knew from reading PI.
  333. */
  334. if ((verb & QB_VALID_BIT) != s->dqrr.valid_bit) {
  335. qbman_cena_invalidate_prefetch(&s->sys,
  336. QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
  337. return NULL;
  338. }
  339. /* There's something there. Move "next_idx" attention to the next ring
  340. * entry (and prefetch it) before returning what we found. */
  341. s->dqrr.next_idx++;
  342. s->dqrr.next_idx &= s->dqrr.dqrr_size - 1;/* Wrap around at dqrr_size */
  343. /* TODO: it's possible to do all this without conditionals, optimise it
  344. * later. */
  345. if (!s->dqrr.next_idx)
  346. s->dqrr.valid_bit ^= QB_VALID_BIT;
  347. /* If this is the final response to a volatile dequeue command
  348. indicate that the vdq is no longer busy */
  349. flags = ldpaa_dq_flags(dq);
  350. response_verb = qb_attr_code_decode(&code_dqrr_response, &verb);
  351. if ((response_verb == QBMAN_DQRR_RESPONSE_DQ) &&
  352. (flags & LDPAA_DQ_STAT_VOLATILE) &&
  353. (flags & LDPAA_DQ_STAT_EXPIRED))
  354. atomic_inc(&s->vdq.busy);
  355. qbman_cena_invalidate_prefetch(&s->sys,
  356. QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
  357. return dq;
  358. }
  359. /* Consume DQRR entries previously returned from qbman_swp_dqrr_next(). */
  360. void qbman_swp_dqrr_consume(struct qbman_swp *s, const struct ldpaa_dq *dq)
  361. {
  362. qbman_cinh_write(&s->sys, QBMAN_CINH_SWP_DCAP, QBMAN_IDX_FROM_DQRR(dq));
  363. }
  364. /*********************************/
  365. /* Polling user-provided storage */
  366. /*********************************/
  367. void qbman_dq_entry_set_oldtoken(struct ldpaa_dq *dq,
  368. unsigned int num_entries,
  369. uint8_t oldtoken)
  370. {
  371. memset(dq, oldtoken, num_entries * sizeof(*dq));
  372. }
  373. int qbman_dq_entry_has_newtoken(struct qbman_swp *s,
  374. const struct ldpaa_dq *dq,
  375. uint8_t newtoken)
  376. {
  377. /* To avoid converting the little-endian DQ entry to host-endian prior
  378. * to us knowing whether there is a valid entry or not (and run the
  379. * risk of corrupting the incoming hardware LE write), we detect in
  380. * hardware endianness rather than host. This means we need a different
  381. * "code" depending on whether we are BE or LE in software, which is
  382. * where DQRR_TOK_OFFSET comes in... */
  383. static struct qb_attr_code code_dqrr_tok_detect =
  384. QB_CODE(0, DQRR_TOK_OFFSET, 8);
  385. /* The user trying to poll for a result treats "dq" as const. It is
  386. * however the same address that was provided to us non-const in the
  387. * first place, for directing hardware DMA to. So we can cast away the
  388. * const because it is mutable from our perspective. */
  389. uint32_t *p = qb_cl((struct ldpaa_dq *)dq);
  390. uint32_t token;
  391. token = qb_attr_code_decode(&code_dqrr_tok_detect, &p[1]);
  392. if (token != newtoken)
  393. return 0;
  394. /* Only now do we convert from hardware to host endianness. Also, as we
  395. * are returning success, the user has promised not to call us again, so
  396. * there's no risk of us converting the endianness twice... */
  397. make_le32_n(p, 16);
  398. /* VDQCR "no longer busy" hook - not quite the same as DQRR, because the
  399. * fact "VDQCR" shows busy doesn't mean that the result we're looking at
  400. * is from the same command. Eg. we may be looking at our 10th dequeue
  401. * result from our first VDQCR command, yet the second dequeue command
  402. * could have been kicked off already, after seeing the 1st result. Ie.
  403. * the result we're looking at is not necessarily proof that we can
  404. * reset "busy". We instead base the decision on whether the current
  405. * result is sitting at the first 'storage' location of the busy
  406. * command. */
  407. if (s->vdq.storage == dq) {
  408. s->vdq.storage = NULL;
  409. atomic_inc(&s->vdq.busy);
  410. }
  411. return 1;
  412. }
  413. /********************************/
  414. /* Categorising dequeue entries */
  415. /********************************/
  416. static inline int __qbman_dq_entry_is_x(const struct ldpaa_dq *dq, uint32_t x)
  417. {
  418. const uint32_t *p = qb_cl(dq);
  419. uint32_t response_verb = qb_attr_code_decode(&code_dqrr_response, p);
  420. return response_verb == x;
  421. }
  422. int qbman_dq_entry_is_DQ(const struct ldpaa_dq *dq)
  423. {
  424. return __qbman_dq_entry_is_x(dq, QBMAN_DQRR_RESPONSE_DQ);
  425. }
  426. /*********************************/
  427. /* Parsing frame dequeue results */
  428. /*********************************/
  429. /* These APIs assume qbman_dq_entry_is_DQ() is TRUE */
  430. uint32_t ldpaa_dq_flags(const struct ldpaa_dq *dq)
  431. {
  432. const uint32_t *p = qb_cl(dq);
  433. return qb_attr_code_decode(&code_dqrr_stat, p);
  434. }
  435. const struct dpaa_fd *ldpaa_dq_fd(const struct ldpaa_dq *dq)
  436. {
  437. const uint32_t *p = qb_cl(dq);
  438. return (const struct dpaa_fd *)&p[8];
  439. }
  440. /******************/
  441. /* Buffer release */
  442. /******************/
  443. /* These should be const, eventually */
  444. /* static struct qb_attr_code code_release_num = QB_CODE(0, 0, 3); */
  445. static struct qb_attr_code code_release_set_me = QB_CODE(0, 5, 1);
  446. static struct qb_attr_code code_release_bpid = QB_CODE(0, 16, 16);
  447. void qbman_release_desc_clear(struct qbman_release_desc *d)
  448. {
  449. uint32_t *cl;
  450. memset(d, 0, sizeof(*d));
  451. cl = qb_cl(d);
  452. qb_attr_code_encode(&code_release_set_me, cl, 1);
  453. }
  454. void qbman_release_desc_set_bpid(struct qbman_release_desc *d, uint32_t bpid)
  455. {
  456. uint32_t *cl = qb_cl(d);
  457. qb_attr_code_encode(&code_release_bpid, cl, bpid);
  458. }
  459. #define RAR_IDX(rar) ((rar) & 0x7)
  460. #define RAR_VB(rar) ((rar) & 0x80)
  461. #define RAR_SUCCESS(rar) ((rar) & 0x100)
  462. int qbman_swp_release(struct qbman_swp *s, const struct qbman_release_desc *d,
  463. const uint64_t *buffers, unsigned int num_buffers)
  464. {
  465. uint32_t *p;
  466. const uint32_t *cl = qb_cl(d);
  467. uint32_t rar = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_RAR);
  468. debug("RAR=%08x\n", rar);
  469. if (!RAR_SUCCESS(rar))
  470. return -EBUSY;
  471. BUG_ON(!num_buffers || (num_buffers > 7));
  472. /* Start the release command */
  473. p = qbman_cena_write_start(&s->sys,
  474. QBMAN_CENA_SWP_RCR(RAR_IDX(rar)));
  475. /* Copy the caller's buffer pointers to the command */
  476. u64_to_le32_copy(&p[2], buffers, num_buffers);
  477. lwsync();
  478. /* Set the verb byte, have to substitute in the valid-bit and the number
  479. * of buffers. */
  480. p[0] = cl[0] | RAR_VB(rar) | num_buffers;
  481. qbman_cena_write_complete(&s->sys,
  482. QBMAN_CENA_SWP_RCR(RAR_IDX(rar)),
  483. p);
  484. return 0;
  485. }
  486. /*******************/
  487. /* Buffer acquires */
  488. /*******************/
  489. /* These should be const, eventually */
  490. static struct qb_attr_code code_acquire_bpid = QB_CODE(0, 16, 16);
  491. static struct qb_attr_code code_acquire_num = QB_CODE(1, 0, 3);
  492. static struct qb_attr_code code_acquire_r_num = QB_CODE(1, 0, 3);
  493. int qbman_swp_acquire(struct qbman_swp *s, uint32_t bpid, uint64_t *buffers,
  494. unsigned int num_buffers)
  495. {
  496. uint32_t *p;
  497. uint32_t verb, rslt, num;
  498. BUG_ON(!num_buffers || (num_buffers > 7));
  499. /* Start the management command */
  500. p = qbman_swp_mc_start(s);
  501. if (!p)
  502. return -EBUSY;
  503. /* Encode the caller-provided attributes */
  504. qb_attr_code_encode(&code_acquire_bpid, p, bpid);
  505. qb_attr_code_encode(&code_acquire_num, p, num_buffers);
  506. /* Complete the management command */
  507. p = qbman_swp_mc_complete(s, p, p[0] | QBMAN_MC_ACQUIRE);
  508. /* Decode the outcome */
  509. verb = qb_attr_code_decode(&code_generic_verb, p);
  510. rslt = qb_attr_code_decode(&code_generic_rslt, p);
  511. num = qb_attr_code_decode(&code_acquire_r_num, p);
  512. BUG_ON(verb != QBMAN_MC_ACQUIRE);
  513. /* Determine success or failure */
  514. if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
  515. printf("Acquire buffers from BPID 0x%x failed, code=0x%02x\n",
  516. bpid, rslt);
  517. return -EIO;
  518. }
  519. BUG_ON(num > num_buffers);
  520. /* Copy the acquired buffers to the caller's array */
  521. u64_from_le32_copy(buffers, &p[2], num);
  522. return (int)num;
  523. }