pch_common.h 1.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (c) 2016 Google, Inc
  4. */
  5. #ifndef __asm_pch_common_h
  6. #define __asm_pch_common_h
  7. /* Common Intel SATA registers */
  8. #define SATA_SIRI 0xa0 /* SATA Indexed Register Index */
  9. #define SATA_SIRD 0xa4 /* SATA Indexed Register Data */
  10. #define SATA_SP 0xd0 /* Scratchpad */
  11. #define INTR_LN 0x3c
  12. #define IDE_TIM_PRI 0x40 /* IDE timings, primary */
  13. #define IDE_DECODE_ENABLE (1 << 15)
  14. #define IDE_SITRE (1 << 14)
  15. #define IDE_ISP_5_CLOCKS (0 << 12)
  16. #define IDE_ISP_4_CLOCKS (1 << 12)
  17. #define IDE_ISP_3_CLOCKS (2 << 12)
  18. #define IDE_RCT_4_CLOCKS (0 << 8)
  19. #define IDE_RCT_3_CLOCKS (1 << 8)
  20. #define IDE_RCT_2_CLOCKS (2 << 8)
  21. #define IDE_RCT_1_CLOCKS (3 << 8)
  22. #define IDE_DTE1 (1 << 7)
  23. #define IDE_PPE1 (1 << 6)
  24. #define IDE_IE1 (1 << 5)
  25. #define IDE_TIME1 (1 << 4)
  26. #define IDE_DTE0 (1 << 3)
  27. #define IDE_PPE0 (1 << 2)
  28. #define IDE_IE0 (1 << 1)
  29. #define IDE_TIME0 (1 << 0)
  30. #define IDE_TIM_SEC 0x42 /* IDE timings, secondary */
  31. #define SERIRQ_CNTL 0x64
  32. /**
  33. * pch_common_sir_read() - Read from a SATA indexed register
  34. *
  35. * @dev: SATA device
  36. * @idx: Register index to read
  37. * @return value read from register
  38. */
  39. u32 pch_common_sir_read(struct udevice *dev, int idx);
  40. /**
  41. * pch_common_sir_write() - Write to a SATA indexed register
  42. *
  43. * @dev: SATA device
  44. * @idx: Register index to write
  45. * @value: Value to write
  46. */
  47. void pch_common_sir_write(struct udevice *dev, int idx, u32 value);
  48. #endif