cpu.h 6.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (c) 2014 The Chromium OS Authors.
  4. *
  5. * Part of this file is adapted from coreboot
  6. * src/arch/x86/include/arch/cpu.h and
  7. * src/arch/x86/lib/cpu.c
  8. */
  9. #ifndef _ASM_CPU_H
  10. #define _ASM_CPU_H
  11. enum {
  12. X86_VENDOR_INVALID = 0,
  13. X86_VENDOR_INTEL,
  14. X86_VENDOR_CYRIX,
  15. X86_VENDOR_AMD,
  16. X86_VENDOR_UMC,
  17. X86_VENDOR_NEXGEN,
  18. X86_VENDOR_CENTAUR,
  19. X86_VENDOR_RISE,
  20. X86_VENDOR_TRANSMETA,
  21. X86_VENDOR_NSC,
  22. X86_VENDOR_SIS,
  23. X86_VENDOR_ANY = 0xfe,
  24. X86_VENDOR_UNKNOWN = 0xff
  25. };
  26. /* Global descriptor table (GDT) bits */
  27. enum {
  28. GDT_4KB = 1ULL << 55,
  29. GDT_32BIT = 1ULL << 54,
  30. GDT_LONG = 1ULL << 53,
  31. GDT_PRESENT = 1ULL << 47,
  32. GDT_NOTSYS = 1ULL << 44,
  33. GDT_CODE = 1ULL << 43,
  34. GDT_LIMIT_LOW_SHIFT = 0,
  35. GDT_LIMIT_LOW_MASK = 0xffff,
  36. GDT_LIMIT_HIGH_SHIFT = 48,
  37. GDT_LIMIT_HIGH_MASK = 0xf,
  38. GDT_BASE_LOW_SHIFT = 16,
  39. GDT_BASE_LOW_MASK = 0xffff,
  40. GDT_BASE_HIGH_SHIFT = 56,
  41. GDT_BASE_HIGH_MASK = 0xf,
  42. };
  43. /*
  44. * System controllers in an x86 system. We mostly need to just find these and
  45. * use them on PCI. At some point these might have their own uclass (e.g.
  46. * UCLASS_VIDEO for the GMA device).
  47. */
  48. enum {
  49. X86_NONE,
  50. X86_SYSCON_ME, /* Intel Management Engine */
  51. X86_SYSCON_PINCONF, /* Intel x86 pin configuration */
  52. X86_SYSCON_PMU, /* Power Management Unit */
  53. X86_SYSCON_SCU, /* System Controller Unit */
  54. };
  55. struct cpuid_result {
  56. uint32_t eax;
  57. uint32_t ebx;
  58. uint32_t ecx;
  59. uint32_t edx;
  60. };
  61. /*
  62. * Generic CPUID function
  63. */
  64. static inline struct cpuid_result cpuid(int op)
  65. {
  66. struct cpuid_result result;
  67. asm volatile(
  68. "mov %%ebx, %%edi;"
  69. "cpuid;"
  70. "mov %%ebx, %%esi;"
  71. "mov %%edi, %%ebx;"
  72. : "=a" (result.eax),
  73. "=S" (result.ebx),
  74. "=c" (result.ecx),
  75. "=d" (result.edx)
  76. : "0" (op)
  77. : "edi");
  78. return result;
  79. }
  80. /*
  81. * Generic Extended CPUID function
  82. */
  83. static inline struct cpuid_result cpuid_ext(int op, unsigned ecx)
  84. {
  85. struct cpuid_result result;
  86. asm volatile(
  87. "mov %%ebx, %%edi;"
  88. "cpuid;"
  89. "mov %%ebx, %%esi;"
  90. "mov %%edi, %%ebx;"
  91. : "=a" (result.eax),
  92. "=S" (result.ebx),
  93. "=c" (result.ecx),
  94. "=d" (result.edx)
  95. : "0" (op), "2" (ecx)
  96. : "edi");
  97. return result;
  98. }
  99. /*
  100. * CPUID functions returning a single datum
  101. */
  102. static inline unsigned int cpuid_eax(unsigned int op)
  103. {
  104. unsigned int eax;
  105. __asm__("mov %%ebx, %%edi;"
  106. "cpuid;"
  107. "mov %%edi, %%ebx;"
  108. : "=a" (eax)
  109. : "0" (op)
  110. : "ecx", "edx", "edi");
  111. return eax;
  112. }
  113. static inline unsigned int cpuid_ebx(unsigned int op)
  114. {
  115. unsigned int eax, ebx;
  116. __asm__("mov %%ebx, %%edi;"
  117. "cpuid;"
  118. "mov %%ebx, %%esi;"
  119. "mov %%edi, %%ebx;"
  120. : "=a" (eax), "=S" (ebx)
  121. : "0" (op)
  122. : "ecx", "edx", "edi");
  123. return ebx;
  124. }
  125. static inline unsigned int cpuid_ecx(unsigned int op)
  126. {
  127. unsigned int eax, ecx;
  128. __asm__("mov %%ebx, %%edi;"
  129. "cpuid;"
  130. "mov %%edi, %%ebx;"
  131. : "=a" (eax), "=c" (ecx)
  132. : "0" (op)
  133. : "edx", "edi");
  134. return ecx;
  135. }
  136. static inline unsigned int cpuid_edx(unsigned int op)
  137. {
  138. unsigned int eax, edx;
  139. __asm__("mov %%ebx, %%edi;"
  140. "cpuid;"
  141. "mov %%edi, %%ebx;"
  142. : "=a" (eax), "=d" (edx)
  143. : "0" (op)
  144. : "ecx", "edi");
  145. return edx;
  146. }
  147. #if !CONFIG_IS_ENABLED(X86_64)
  148. /* Standard macro to see if a specific flag is changeable */
  149. static inline int flag_is_changeable_p(uint32_t flag)
  150. {
  151. uint32_t f1, f2;
  152. asm(
  153. "pushfl\n\t"
  154. "pushfl\n\t"
  155. "popl %0\n\t"
  156. "movl %0,%1\n\t"
  157. "xorl %2,%0\n\t"
  158. "pushl %0\n\t"
  159. "popfl\n\t"
  160. "pushfl\n\t"
  161. "popl %0\n\t"
  162. "popfl\n\t"
  163. : "=&r" (f1), "=&r" (f2)
  164. : "ir" (flag));
  165. return ((f1^f2) & flag) != 0;
  166. }
  167. #endif
  168. static inline void mfence(void)
  169. {
  170. __asm__ __volatile__("mfence" : : : "memory");
  171. }
  172. /**
  173. * cpu_enable_paging_pae() - Enable PAE-paging
  174. *
  175. * @cr3: Value to set in cr3 (PDPT or PML4T)
  176. */
  177. void cpu_enable_paging_pae(ulong cr3);
  178. /**
  179. * cpu_disable_paging_pae() - Disable paging and PAE
  180. */
  181. void cpu_disable_paging_pae(void);
  182. /**
  183. * cpu_has_64bit() - Check if the CPU has 64-bit support
  184. *
  185. * @return 1 if this CPU supports long mode (64-bit), 0 if not
  186. */
  187. int cpu_has_64bit(void);
  188. /**
  189. * cpu_vendor_name() - Get CPU vendor name
  190. *
  191. * @vendor: CPU vendor enumeration number
  192. *
  193. * @return: Address to hold the CPU vendor name string
  194. */
  195. const char *cpu_vendor_name(int vendor);
  196. #define CPU_MAX_NAME_LEN 49
  197. /**
  198. * cpu_get_name() - Get the name of the current cpu
  199. *
  200. * @name: Place to put name, which must be CPU_MAX_NAME_LEN bytes including
  201. * @return pointer to name, which will likely be a few bytes after the start
  202. * of @name
  203. * \0 terminator
  204. */
  205. char *cpu_get_name(char *name);
  206. /**
  207. * cpu_call64() - Jump to a 64-bit Linux kernel (internal function)
  208. *
  209. * The kernel is uncompressed and the 64-bit entry point is expected to be
  210. * at @target.
  211. *
  212. * This function is used internally - see cpu_jump_to_64bit() for a more
  213. * useful function.
  214. *
  215. * @pgtable: Address of 24KB area containing the page table
  216. * @setup_base: Pointer to the setup.bin information for the kernel
  217. * @target: Pointer to the start of the kernel image
  218. */
  219. void cpu_call64(ulong pgtable, ulong setup_base, ulong target);
  220. /**
  221. * cpu_call32() - Jump to a 32-bit entry point
  222. *
  223. * @code_seg32: 32-bit code segment to use (GDT offset, e.g. 0x20)
  224. * @target: Pointer to the start of the 32-bit U-Boot image/entry point
  225. * @table: Pointer to start of info table to pass to U-Boot
  226. */
  227. void cpu_call32(ulong code_seg32, ulong target, ulong table);
  228. /**
  229. * cpu_jump_to_64bit() - Jump to a 64-bit Linux kernel
  230. *
  231. * The kernel is uncompressed and the 64-bit entry point is expected to be
  232. * at @target.
  233. *
  234. * @setup_base: Pointer to the setup.bin information for the kernel
  235. * @target: Pointer to the start of the kernel image
  236. */
  237. int cpu_jump_to_64bit(ulong setup_base, ulong target);
  238. /**
  239. * cpu_jump_to_64bit_uboot() - special function to jump from SPL to U-Boot
  240. *
  241. * This handles calling from 32-bit SPL to 64-bit U-Boot.
  242. *
  243. * @target: Address of U-Boot in RAM
  244. */
  245. int cpu_jump_to_64bit_uboot(ulong target);
  246. /**
  247. * cpu_get_family_model() - Get the family and model for the CPU
  248. *
  249. * @return the CPU ID masked with 0x0fff0ff0
  250. */
  251. u32 cpu_get_family_model(void);
  252. /**
  253. * cpu_get_stepping() - Get the stepping value for the CPU
  254. *
  255. * @return the CPU ID masked with 0xf
  256. */
  257. u32 cpu_get_stepping(void);
  258. #endif