cmos_layout.h 1.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
  4. */
  5. #ifndef __CMOS_LAYOUT_H
  6. #define __CMOS_LAYOUT_H
  7. /*
  8. * The RTC internal registers and RAM is organized as two banks of 128 bytes
  9. * each, called the standard and extended banks. The first 14 bytes of the
  10. * standard bank contain the RTC time and date information along with four
  11. * registers, A - D, that are used for configuration of the RTC. The extended
  12. * bank contains a full 128 bytes of battery backed SRAM.
  13. *
  14. * For simplicity in U-Boot we only support CMOS in the standard bank, and
  15. * its base address starts from offset 0x10, which leaves us 112 bytes space.
  16. */
  17. #define CMOS_BASE 0x10
  18. /*
  19. * The file records all offsets off CMOS_BASE that is currently used by
  20. * U-Boot for various reasons. It is put in such a unified place in order
  21. * to be consistent across platforms.
  22. */
  23. /* stack address for S3 boot in a FSP configuration, 4 bytes */
  24. #define CMOS_FSP_STACK_ADDR CMOS_BASE
  25. #endif /* __CMOS_LAYOUT_H */