southcluster.asl 9.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (c) 2017 Intel Corporation
  4. *
  5. * Partially based on southcluster.asl for other x86 platforms
  6. */
  7. Device (PCI0)
  8. {
  9. Name (_HID, EISAID("PNP0A08")) /* PCIe */
  10. Name (_CID, EISAID("PNP0A03")) /* PCI */
  11. Name (_ADR, 0)
  12. Name (_BBN, 0)
  13. Name (MCRS, ResourceTemplate()
  14. {
  15. /* Bus Numbers */
  16. WordBusNumber(ResourceProducer, MinFixed, MaxFixed, PosDecode,
  17. 0x0000, 0x0000, 0x00ff, 0x0000, 0x0100, , , PB00)
  18. /* IO Region 0 */
  19. WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
  20. 0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8, , , PI00)
  21. /* PCI Config Space */
  22. IO(Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008)
  23. /* IO Region 1 */
  24. WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
  25. 0x0000, 0x0d00, 0xffff, 0x0000, 0xf300, , , PI01)
  26. /* GPIO Low Memory Region */
  27. DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
  28. Cacheable, ReadWrite,
  29. 0x00000000, 0x000ddcc0, 0x000ddccf, 0x00000000,
  30. 0x00000010, , , GP00)
  31. /* PSH Memory Region 0 */
  32. DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
  33. Cacheable, ReadWrite,
  34. 0x00000000, 0x04819000, 0x04898fff, 0x00000000,
  35. 0x00080000, , , PSH0)
  36. /* PSH Memory Region 1 */
  37. DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
  38. Cacheable, ReadWrite,
  39. 0x00000000, 0x04919000, 0x04920fff, 0x00000000,
  40. 0x00008000, , , PSH1)
  41. /* SST Memory Region */
  42. DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
  43. Cacheable, ReadWrite,
  44. 0x00000000, 0x05e00000, 0x05ffffff, 0x00000000,
  45. 0x00200000, , , SST0)
  46. /* PCI Memory Region */
  47. DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
  48. Cacheable, ReadWrite,
  49. 0x00000000, 0x80000000, 0xffffffff, 0x00000000,
  50. 0x80000000, , , PMEM)
  51. })
  52. Method (_CRS, 0, Serialized)
  53. {
  54. Return (MCRS)
  55. }
  56. Method (_OSC, 4)
  57. {
  58. /* Check for proper GUID */
  59. If (LEqual(Arg0, ToUUID("33db4d5b-1ff7-401c-9657-7441c03dd766"))) {
  60. /* Let OS control everything */
  61. Return (Arg3)
  62. } Else {
  63. /* Unrecognized UUID */
  64. CreateDWordField(Arg3, 0, CDW1)
  65. Or(CDW1, 4, CDW1)
  66. Return (Arg3)
  67. }
  68. }
  69. Device (SDHC)
  70. {
  71. Name (_ADR, 0x00010003)
  72. Name (_DEP, Package (0x01)
  73. {
  74. GPIO
  75. })
  76. Name (PSTS, Zero)
  77. Method (_STA)
  78. {
  79. Return (STA_VISIBLE)
  80. }
  81. Method (_PS3, 0, NotSerialized)
  82. {
  83. }
  84. Method (_PS0, 0, NotSerialized)
  85. {
  86. If (PSTS == Zero)
  87. {
  88. If (^^GPIO.AVBL == One)
  89. {
  90. ^^GPIO.WFD3 = One
  91. PSTS = One
  92. }
  93. }
  94. }
  95. /* BCM43340 */
  96. Device (BRC1)
  97. {
  98. Name (_ADR, 0x01)
  99. Name (_DEP, Package (0x01)
  100. {
  101. GPIO
  102. })
  103. Method (_STA)
  104. {
  105. Return (STA_VISIBLE)
  106. }
  107. Method (_RMV, 0, NotSerialized)
  108. {
  109. Return (Zero)
  110. }
  111. Method (_PS3, 0, NotSerialized)
  112. {
  113. If (^^^GPIO.AVBL == One)
  114. {
  115. ^^^GPIO.WFD3 = Zero
  116. PSTS = Zero
  117. }
  118. }
  119. Method (_PS0, 0, NotSerialized)
  120. {
  121. If (PSTS == Zero)
  122. {
  123. If (^^^GPIO.AVBL == One)
  124. {
  125. ^^^GPIO.WFD3 = One
  126. PSTS = One
  127. }
  128. }
  129. }
  130. }
  131. Device (BRC2)
  132. {
  133. Name (_ADR, 0x02)
  134. Method (_STA, 0, NotSerialized)
  135. {
  136. Return (STA_VISIBLE)
  137. }
  138. Method (_RMV, 0, NotSerialized)
  139. {
  140. Return (Zero)
  141. }
  142. }
  143. }
  144. Device (SPI5)
  145. {
  146. Name (_ADR, 0x00070001)
  147. Name (RBUF, ResourceTemplate()
  148. {
  149. GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly,
  150. "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 110 }
  151. GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly,
  152. "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 111 }
  153. GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly,
  154. "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 112 }
  155. GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly,
  156. "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 113 }
  157. })
  158. Method (_CRS, 0, NotSerialized)
  159. {
  160. Return (RBUF)
  161. }
  162. /*
  163. * See
  164. * http://www.kernel.org/doc/Documentation/acpi/gpio-properties.txt
  165. * for more information about GPIO bindings.
  166. */
  167. Name (_DSD, Package () {
  168. ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
  169. Package () {
  170. Package () {
  171. "cs-gpios", Package () {
  172. ^SPI5, 0, 0, 0,
  173. ^SPI5, 1, 0, 0,
  174. ^SPI5, 2, 0, 0,
  175. ^SPI5, 3, 0, 0,
  176. },
  177. },
  178. }
  179. })
  180. Method (_STA, 0, NotSerialized)
  181. {
  182. Return (STA_VISIBLE)
  183. }
  184. }
  185. Device (I2C1)
  186. {
  187. Name (_ADR, 0x00080000)
  188. Method (_STA, 0, NotSerialized)
  189. {
  190. Return (STA_VISIBLE)
  191. }
  192. }
  193. Device (GPIO)
  194. {
  195. Name (_ADR, 0x000c0000)
  196. Method (_STA)
  197. {
  198. Return (STA_VISIBLE)
  199. }
  200. Name (AVBL, Zero)
  201. Method (_REG, 2, NotSerialized)
  202. {
  203. If (Arg0 == 0x08)
  204. {
  205. AVBL = Arg1
  206. }
  207. }
  208. OperationRegion (GPOP, GeneralPurposeIo, 0, 1)
  209. Field (GPOP, ByteAcc, NoLock, Preserve)
  210. {
  211. Connection (
  212. GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly,
  213. "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 96 }
  214. ),
  215. WFD3, 1,
  216. }
  217. }
  218. Device (PWM0)
  219. {
  220. Name (_ADR, 0x00170000)
  221. Method (_STA, 0, NotSerialized)
  222. {
  223. Return (STA_VISIBLE)
  224. }
  225. }
  226. Device (HSU0)
  227. {
  228. Name (_ADR, 0x00040001)
  229. Method (_STA, 0, NotSerialized)
  230. {
  231. Return (STA_VISIBLE)
  232. }
  233. Device (BTH0)
  234. {
  235. Name (_HID, "BCM2E95")
  236. Name (_DEP, Package ()
  237. {
  238. GPIO,
  239. HSU0
  240. })
  241. Method (_STA, 0, NotSerialized)
  242. {
  243. Return (STA_VISIBLE)
  244. }
  245. Method (_CRS, 0, Serialized)
  246. {
  247. Name (RBUF, ResourceTemplate ()
  248. {
  249. UartSerialBus (0x0001C200, DataBitsEight, StopBitsOne,
  250. 0xFC, LittleEndian, ParityTypeNone, FlowControlHardware,
  251. 0x20, 0x20, "\\_SB.PCI0.HSU0", 0, ResourceConsumer, , )
  252. GpioInt (Level, ActiveHigh, Exclusive, PullNone, 0,
  253. "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 185 }
  254. GpioIo (Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly,
  255. "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 184 }
  256. GpioIo (Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly,
  257. "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 71 }
  258. })
  259. Return (RBUF)
  260. }
  261. Name (_DSD, Package () {
  262. ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
  263. Package () {
  264. Package () { "host-wakeup-gpios", Package () { ^BTH0, 0, 0, 0 } },
  265. Package () { "device-wakeup-gpios", Package () { ^BTH0, 1, 0, 0 } },
  266. Package () { "shutdown-gpios", Package () { ^BTH0, 2, 0, 0 } },
  267. }
  268. })
  269. }
  270. }
  271. }
  272. Device (FLIS)
  273. {
  274. Name (_HID, "INTC1002")
  275. Name (_DDN, "Intel Merrifield Family-Level Interface Shim")
  276. Name (RBUF, ResourceTemplate()
  277. {
  278. Memory32Fixed(ReadWrite, 0xFF0C0000, 0x00008000, )
  279. PinGroup("spi5", ResourceProducer, ) { 90, 91, 92, 93, 94, 95, 96 }
  280. PinGroup("uart0", ResourceProducer, ) { 115, 116, 117, 118 }
  281. PinGroup("uart1", ResourceProducer, ) { 119, 120, 121, 122 }
  282. PinGroup("uart2", ResourceProducer, ) { 123, 124, 125, 126 }
  283. PinGroup("pwm0", ResourceProducer, ) { 144 }
  284. PinGroup("pwm1", ResourceProducer, ) { 145 }
  285. PinGroup("pwm2", ResourceProducer, ) { 132 }
  286. PinGroup("pwm3", ResourceProducer, ) { 133 }
  287. })
  288. Method (_CRS, 0, NotSerialized)
  289. {
  290. Return (RBUF)
  291. }
  292. Method (_STA, 0, NotSerialized)
  293. {
  294. Return (STA_VISIBLE)
  295. }
  296. }