iomap.h 1.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com>
  4. */
  5. #ifndef _QUARK_IOMAP_H_
  6. #define _QUARK_IOMAP_H_
  7. /* Memory Mapped IO bases */
  8. /* ESRAM */
  9. #define ESRAM_BASE_ADDRESS CONFIG_ESRAM_BASE
  10. #define ESRAM_BASE_SIZE ESRAM_SIZE
  11. /* PCI Configuration Space */
  12. #define MCFG_BASE_ADDRESS CONFIG_PCIE_ECAM_BASE
  13. #define MCFG_BASE_SIZE 0x10000000
  14. /* High Performance Event Timer */
  15. #define HPET_BASE_ADDRESS 0xfed00000
  16. #define HPET_BASE_SIZE 0x400
  17. /* Root Complex Base Address */
  18. #define RCBA_BASE_ADDRESS CONFIG_RCBA_BASE
  19. #define RCBA_BASE_SIZE 0x4000
  20. /* IO Port bases */
  21. #define ACPI_PM1_BASE_ADDRESS CONFIG_ACPI_PM1_BASE
  22. #define ACPI_PM1_BASE_SIZE 0x10
  23. #define ACPI_PBLK_BASE_ADDRESS CONFIG_ACPI_PBLK_BASE
  24. #define ACPI_PBLK_BASE_SIZE 0x10
  25. #define SPI_DMA_BASE_ADDRESS CONFIG_SPI_DMA_BASE
  26. #define SPI_DMA_BASE_SIZE 0x10
  27. #define GPIO_BASE_ADDRESS CONFIG_GPIO_BASE
  28. #define GPIO_BASE_SIZE 0x80
  29. #define ACPI_GPE0_BASE_ADDRESS CONFIG_ACPI_GPE0_BASE
  30. #define ACPI_GPE0_BASE_SIZE 0x40
  31. #define WDT_BASE_ADDRESS CONFIG_WDT_BASE
  32. #define WDT_BASE_SIZE 0x40
  33. #endif /* _QUARK_IOMAP_H_ */