microcode.c 4.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2014 Google, Inc
  4. * Copyright (C) 2000 Ronald G. Minnich
  5. *
  6. * Microcode update for Intel PIII and later CPUs
  7. */
  8. #include <common.h>
  9. #include <errno.h>
  10. #include <fdtdec.h>
  11. #include <linux/libfdt.h>
  12. #include <asm/cpu.h>
  13. #include <asm/microcode.h>
  14. #include <asm/msr.h>
  15. #include <asm/msr-index.h>
  16. #include <asm/processor.h>
  17. DECLARE_GLOBAL_DATA_PTR;
  18. /**
  19. * struct microcode_update - standard microcode header from Intel
  20. *
  21. * We read this information out of the device tree and use it to determine
  22. * whether the update is applicable or not. We also use the same structure
  23. * to read information from the CPU.
  24. */
  25. struct microcode_update {
  26. uint header_version;
  27. uint update_revision;
  28. uint date_code;
  29. uint processor_signature;
  30. uint checksum;
  31. uint loader_revision;
  32. uint processor_flags;
  33. const void *data;
  34. int size;
  35. };
  36. static int microcode_decode_node(const void *blob, int node,
  37. struct microcode_update *update)
  38. {
  39. update->data = fdt_getprop(blob, node, "data", &update->size);
  40. if (!update->data)
  41. return -ENOENT;
  42. update->header_version = fdtdec_get_int(blob, node,
  43. "intel,header-version", 0);
  44. update->update_revision = fdtdec_get_int(blob, node,
  45. "intel,update-revision", 0);
  46. update->date_code = fdtdec_get_int(blob, node,
  47. "intel,date-code", 0);
  48. update->processor_signature = fdtdec_get_int(blob, node,
  49. "intel,processor-signature", 0);
  50. update->checksum = fdtdec_get_int(blob, node, "intel,checksum", 0);
  51. update->loader_revision = fdtdec_get_int(blob, node,
  52. "intel,loader-revision", 0);
  53. update->processor_flags = fdtdec_get_int(blob, node,
  54. "intel,processor-flags", 0);
  55. return 0;
  56. }
  57. int microcode_read_rev(void)
  58. {
  59. /* Quark does not have microcode MSRs */
  60. #ifdef CONFIG_INTEL_QUARK
  61. return 0;
  62. #else
  63. /*
  64. * Some Intel CPUs can be very finicky about the CPUID sequence used.
  65. * So this is implemented in assembly so that it works reliably.
  66. */
  67. uint32_t low, high;
  68. asm volatile (
  69. "xorl %%eax, %%eax\n"
  70. "xorl %%edx, %%edx\n"
  71. "movl %2, %%ecx\n"
  72. "wrmsr\n"
  73. "movl $0x01, %%eax\n"
  74. "cpuid\n"
  75. "movl %2, %%ecx\n"
  76. "rdmsr\n"
  77. : /* outputs */
  78. "=a" (low), "=d" (high)
  79. : /* inputs */
  80. "i" (MSR_IA32_UCODE_REV)
  81. : /* clobbers */
  82. "ebx", "ecx"
  83. );
  84. return high;
  85. #endif
  86. }
  87. static void microcode_read_cpu(struct microcode_update *cpu)
  88. {
  89. /* CPUID sets MSR 0x8B iff a microcode update has been loaded. */
  90. unsigned int x86_model, x86_family;
  91. struct cpuid_result result;
  92. uint32_t low, high;
  93. wrmsr(MSR_IA32_UCODE_REV, 0, 0);
  94. result = cpuid(1);
  95. rdmsr(MSR_IA32_UCODE_REV, low, cpu->update_revision);
  96. x86_model = (result.eax >> 4) & 0x0f;
  97. x86_family = (result.eax >> 8) & 0x0f;
  98. cpu->processor_signature = result.eax;
  99. cpu->processor_flags = 0;
  100. if ((x86_model >= 5) || (x86_family > 6)) {
  101. rdmsr(0x17, low, high);
  102. cpu->processor_flags = 1 << ((high >> 18) & 7);
  103. }
  104. debug("microcode: sig=%#x pf=%#x revision=%#x\n",
  105. cpu->processor_signature, cpu->processor_flags,
  106. cpu->update_revision);
  107. }
  108. /* Get a microcode update from the device tree and apply it */
  109. int microcode_update_intel(void)
  110. {
  111. struct microcode_update cpu, update;
  112. ulong address;
  113. const void *blob = gd->fdt_blob;
  114. int skipped;
  115. int count;
  116. int node;
  117. int ret;
  118. int rev;
  119. microcode_read_cpu(&cpu);
  120. node = 0;
  121. count = 0;
  122. skipped = 0;
  123. do {
  124. node = fdtdec_next_compatible(blob, node,
  125. COMPAT_INTEL_MICROCODE);
  126. if (node < 0) {
  127. debug("%s: Found %d updates\n", __func__, count);
  128. return count ? 0 : skipped ? -EEXIST : -ENOENT;
  129. }
  130. ret = microcode_decode_node(blob, node, &update);
  131. if (ret == -ENOENT && ucode_base) {
  132. /*
  133. * The microcode has been removed from the device tree
  134. * in the build system. In that case it will have
  135. * already been updated in car_init().
  136. */
  137. debug("%s: Microcode data not available\n", __func__);
  138. skipped++;
  139. continue;
  140. }
  141. if (ret) {
  142. debug("%s: Unable to decode update: %d\n", __func__,
  143. ret);
  144. return ret;
  145. }
  146. if (!(update.processor_signature == cpu.processor_signature &&
  147. (update.processor_flags & cpu.processor_flags))) {
  148. debug("%s: Skipping non-matching update, sig=%x, pf=%x\n",
  149. __func__, update.processor_signature,
  150. update.processor_flags);
  151. skipped++;
  152. continue;
  153. }
  154. address = (ulong)update.data + UCODE_HEADER_LEN;
  155. wrmsr(MSR_IA32_UCODE_WRITE, address, 0);
  156. rev = microcode_read_rev();
  157. debug("microcode: updated to revision 0x%x date=%04x-%02x-%02x\n",
  158. rev, update.date_code & 0xffff,
  159. (update.date_code >> 24) & 0xff,
  160. (update.date_code >> 16) & 0xff);
  161. if (update.update_revision != rev) {
  162. printf("Microcode update failed\n");
  163. return -EFAULT;
  164. }
  165. count++;
  166. if (!ucode_base) {
  167. ucode_base = (ulong)update.data;
  168. ucode_size = update.size;
  169. }
  170. } while (1);
  171. }