cache.c 914 B

123456789101112131415161718192021222324252627282930313233343536
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2002
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. */
  6. #include <common.h>
  7. #include <asm/cache.h>
  8. #include <watchdog.h>
  9. void flush_cache(ulong start_addr, ulong size)
  10. {
  11. #ifndef CONFIG_5xx
  12. ulong addr, start, end;
  13. start = start_addr & ~(CONFIG_SYS_CACHELINE_SIZE - 1);
  14. end = start_addr + size - 1;
  15. for (addr = start; (addr <= end) && (addr >= start);
  16. addr += CONFIG_SYS_CACHELINE_SIZE) {
  17. asm volatile("dcbst 0,%0" : : "r" (addr) : "memory");
  18. WATCHDOG_RESET();
  19. }
  20. /* wait for all dcbst to complete on bus */
  21. asm volatile("sync" : : : "memory");
  22. for (addr = start; (addr <= end) && (addr >= start);
  23. addr += CONFIG_SYS_CACHELINE_SIZE) {
  24. asm volatile("icbi 0,%0" : : "r" (addr) : "memory");
  25. WATCHDOG_RESET();
  26. }
  27. asm volatile("sync" : : : "memory");
  28. /* flush prefetch queue */
  29. asm volatile("isync" : : : "memory");
  30. #endif
  31. }