kwbimage.h 4.1 KB

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  1. /*
  2. * (C) Copyright 2008
  3. * Marvell Semiconductor <www.marvell.com>
  4. * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. #ifndef _KWBIMAGE_H_
  9. #define _KWBIMAGE_H_
  10. #include <stdint.h>
  11. #define KWBIMAGE_MAX_CONFIG ((0x1dc - 0x20)/sizeof(struct reg_config))
  12. #define MAX_TEMPBUF_LEN 32
  13. /* NAND ECC Mode */
  14. #define IBR_HDR_ECC_DEFAULT 0x00
  15. #define IBR_HDR_ECC_FORCED_HAMMING 0x01
  16. #define IBR_HDR_ECC_FORCED_RS 0x02
  17. #define IBR_HDR_ECC_DISABLED 0x03
  18. /* Boot Type - block ID */
  19. #define IBR_HDR_I2C_ID 0x4D
  20. #define IBR_HDR_SPI_ID 0x5A
  21. #define IBR_HDR_NAND_ID 0x8B
  22. #define IBR_HDR_SATA_ID 0x78
  23. #define IBR_HDR_PEX_ID 0x9C
  24. #define IBR_HDR_UART_ID 0x69
  25. #define IBR_DEF_ATTRIB 0x00
  26. #define ALIGN_SUP(x, a) (((x) + (a - 1)) & ~(a - 1))
  27. /* Structure of the main header, version 0 (Kirkwood, Dove) */
  28. struct main_hdr_v0 {
  29. uint8_t blockid; /*0 */
  30. uint8_t nandeccmode; /*1 */
  31. uint16_t nandpagesize; /*2-3 */
  32. uint32_t blocksize; /*4-7 */
  33. uint32_t rsvd1; /*8-11 */
  34. uint32_t srcaddr; /*12-15 */
  35. uint32_t destaddr; /*16-19 */
  36. uint32_t execaddr; /*20-23 */
  37. uint8_t satapiomode; /*24 */
  38. uint8_t rsvd3; /*25 */
  39. uint16_t ddrinitdelay; /*26-27 */
  40. uint16_t rsvd2; /*28-29 */
  41. uint8_t ext; /*30 */
  42. uint8_t checksum; /*31 */
  43. };
  44. struct ext_hdr_v0_reg {
  45. uint32_t raddr;
  46. uint32_t rdata;
  47. };
  48. #define EXT_HDR_V0_REG_COUNT ((0x1dc - 0x20) / sizeof(struct ext_hdr_v0_reg))
  49. struct ext_hdr_v0 {
  50. uint32_t offset;
  51. uint8_t reserved[0x20 - sizeof(uint32_t)];
  52. struct ext_hdr_v0_reg rcfg[EXT_HDR_V0_REG_COUNT];
  53. uint8_t reserved2[7];
  54. uint8_t checksum;
  55. };
  56. struct kwb_header {
  57. struct main_hdr_v0 kwb_hdr;
  58. struct ext_hdr_v0 kwb_exthdr;
  59. };
  60. /* Structure of the main header, version 1 (Armada 370, Armada XP) */
  61. struct main_hdr_v1 {
  62. uint8_t blockid; /* 0 */
  63. uint8_t reserved1; /* 1 */
  64. uint16_t reserved2; /* 2-3 */
  65. uint32_t blocksize; /* 4-7 */
  66. uint8_t version; /* 8 */
  67. uint8_t headersz_msb; /* 9 */
  68. uint16_t headersz_lsb; /* A-B */
  69. uint32_t srcaddr; /* C-F */
  70. uint32_t destaddr; /* 10-13 */
  71. uint32_t execaddr; /* 14-17 */
  72. uint8_t reserved3; /* 18 */
  73. uint8_t nandblocksize; /* 19 */
  74. uint8_t nandbadblklocation; /* 1A */
  75. uint8_t reserved4; /* 1B */
  76. uint16_t reserved5; /* 1C-1D */
  77. uint8_t ext; /* 1E */
  78. uint8_t checksum; /* 1F */
  79. };
  80. /*
  81. * Header for the optional headers, version 1 (Armada 370, Armada XP)
  82. */
  83. struct opt_hdr_v1 {
  84. uint8_t headertype;
  85. uint8_t headersz_msb;
  86. uint16_t headersz_lsb;
  87. char data[0];
  88. };
  89. /*
  90. * Various values for the opt_hdr_v1->headertype field, describing the
  91. * different types of optional headers. The "secure" header contains
  92. * informations related to secure boot (encryption keys, etc.). The
  93. * "binary" header contains ARM binary code to be executed prior to
  94. * executing the main payload (usually the bootloader). This is
  95. * typically used to execute DDR3 training code. The "register" header
  96. * allows to describe a set of (address, value) tuples that are
  97. * generally used to configure the DRAM controller.
  98. */
  99. #define OPT_HDR_V1_SECURE_TYPE 0x1
  100. #define OPT_HDR_V1_BINARY_TYPE 0x2
  101. #define OPT_HDR_V1_REGISTER_TYPE 0x3
  102. #define KWBHEADER_V1_SIZE(hdr) \
  103. (((hdr)->headersz_msb << 16) | (hdr)->headersz_lsb)
  104. enum kwbimage_cmd {
  105. CMD_INVALID,
  106. CMD_BOOT_FROM,
  107. CMD_NAND_ECC_MODE,
  108. CMD_NAND_PAGE_SIZE,
  109. CMD_SATA_PIO_MODE,
  110. CMD_DDR_INIT_DELAY,
  111. CMD_DATA
  112. };
  113. enum kwbimage_cmd_types {
  114. CFG_INVALID = -1,
  115. CFG_COMMAND,
  116. CFG_DATA0,
  117. CFG_DATA1
  118. };
  119. /*
  120. * functions
  121. */
  122. void init_kwb_image_type (void);
  123. /*
  124. * Byte 8 of the image header contains the version number. In the v0
  125. * header, byte 8 was reserved, and always set to 0. In the v1 header,
  126. * byte 8 has been changed to a proper field, set to 1.
  127. */
  128. static inline unsigned int image_version(void *header)
  129. {
  130. unsigned char *ptr = header;
  131. return ptr[8];
  132. }
  133. #endif /* _KWBIMAGE_H_ */