miiphyutil.c 13 KB

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  1. /*
  2. * (C) Copyright 2001
  3. * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. /*
  8. * This provides a bit-banged interface to the ethernet MII management
  9. * channel.
  10. */
  11. #include <common.h>
  12. #include <dm.h>
  13. #include <miiphy.h>
  14. #include <phy.h>
  15. #include <asm/types.h>
  16. #include <linux/list.h>
  17. #include <malloc.h>
  18. #include <net.h>
  19. /* local debug macro */
  20. #undef MII_DEBUG
  21. #undef debug
  22. #ifdef MII_DEBUG
  23. #define debug(fmt, args...) printf(fmt, ##args)
  24. #else
  25. #define debug(fmt, args...)
  26. #endif /* MII_DEBUG */
  27. static struct list_head mii_devs;
  28. static struct mii_dev *current_mii;
  29. /*
  30. * Lookup the mii_dev struct by the registered device name.
  31. */
  32. struct mii_dev *miiphy_get_dev_by_name(const char *devname)
  33. {
  34. struct list_head *entry;
  35. struct mii_dev *dev;
  36. if (!devname) {
  37. printf("NULL device name!\n");
  38. return NULL;
  39. }
  40. list_for_each(entry, &mii_devs) {
  41. dev = list_entry(entry, struct mii_dev, link);
  42. if (strcmp(dev->name, devname) == 0)
  43. return dev;
  44. }
  45. return NULL;
  46. }
  47. /*****************************************************************************
  48. *
  49. * Initialize global data. Need to be called before any other miiphy routine.
  50. */
  51. void miiphy_init(void)
  52. {
  53. INIT_LIST_HEAD(&mii_devs);
  54. current_mii = NULL;
  55. }
  56. static int legacy_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
  57. {
  58. unsigned short val;
  59. int ret;
  60. struct legacy_mii_dev *ldev = bus->priv;
  61. ret = ldev->read(bus->name, addr, reg, &val);
  62. return ret ? -1 : (int)val;
  63. }
  64. static int legacy_miiphy_write(struct mii_dev *bus, int addr, int devad,
  65. int reg, u16 val)
  66. {
  67. struct legacy_mii_dev *ldev = bus->priv;
  68. return ldev->write(bus->name, addr, reg, val);
  69. }
  70. /*****************************************************************************
  71. *
  72. * Register read and write MII access routines for the device <name>.
  73. * This API is now deprecated. Please use mdio_alloc and mdio_register, instead.
  74. */
  75. void miiphy_register(const char *name,
  76. int (*read)(const char *devname, unsigned char addr,
  77. unsigned char reg, unsigned short *value),
  78. int (*write)(const char *devname, unsigned char addr,
  79. unsigned char reg, unsigned short value))
  80. {
  81. struct mii_dev *new_dev;
  82. struct legacy_mii_dev *ldev;
  83. BUG_ON(strlen(name) >= MDIO_NAME_LEN);
  84. /* check if we have unique name */
  85. new_dev = miiphy_get_dev_by_name(name);
  86. if (new_dev) {
  87. printf("miiphy_register: non unique device name '%s'\n", name);
  88. return;
  89. }
  90. /* allocate memory */
  91. new_dev = mdio_alloc();
  92. ldev = malloc(sizeof(*ldev));
  93. if (new_dev == NULL || ldev == NULL) {
  94. printf("miiphy_register: cannot allocate memory for '%s'\n",
  95. name);
  96. return;
  97. }
  98. /* initalize mii_dev struct fields */
  99. new_dev->read = legacy_miiphy_read;
  100. new_dev->write = legacy_miiphy_write;
  101. strncpy(new_dev->name, name, MDIO_NAME_LEN);
  102. new_dev->name[MDIO_NAME_LEN - 1] = 0;
  103. ldev->read = read;
  104. ldev->write = write;
  105. new_dev->priv = ldev;
  106. debug("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
  107. new_dev->name, ldev->read, ldev->write);
  108. /* add it to the list */
  109. list_add_tail(&new_dev->link, &mii_devs);
  110. if (!current_mii)
  111. current_mii = new_dev;
  112. }
  113. struct mii_dev *mdio_alloc(void)
  114. {
  115. struct mii_dev *bus;
  116. bus = malloc(sizeof(*bus));
  117. if (!bus)
  118. return bus;
  119. memset(bus, 0, sizeof(*bus));
  120. /* initalize mii_dev struct fields */
  121. INIT_LIST_HEAD(&bus->link);
  122. return bus;
  123. }
  124. int mdio_register(struct mii_dev *bus)
  125. {
  126. if (!bus || !bus->name || !bus->read || !bus->write)
  127. return -1;
  128. /* check if we have unique name */
  129. if (miiphy_get_dev_by_name(bus->name)) {
  130. printf("mdio_register: non unique device name '%s'\n",
  131. bus->name);
  132. return -1;
  133. }
  134. /* add it to the list */
  135. list_add_tail(&bus->link, &mii_devs);
  136. if (!current_mii)
  137. current_mii = bus;
  138. return 0;
  139. }
  140. void mdio_list_devices(void)
  141. {
  142. struct list_head *entry;
  143. list_for_each(entry, &mii_devs) {
  144. int i;
  145. struct mii_dev *bus = list_entry(entry, struct mii_dev, link);
  146. printf("%s:\n", bus->name);
  147. for (i = 0; i < PHY_MAX_ADDR; i++) {
  148. struct phy_device *phydev = bus->phymap[i];
  149. if (phydev) {
  150. printf("%d - %s", i, phydev->drv->name);
  151. if (phydev->dev)
  152. printf(" <--> %s\n", phydev->dev->name);
  153. else
  154. printf("\n");
  155. }
  156. }
  157. }
  158. }
  159. int miiphy_set_current_dev(const char *devname)
  160. {
  161. struct mii_dev *dev;
  162. dev = miiphy_get_dev_by_name(devname);
  163. if (dev) {
  164. current_mii = dev;
  165. return 0;
  166. }
  167. printf("No such device: %s\n", devname);
  168. return 1;
  169. }
  170. struct mii_dev *mdio_get_current_dev(void)
  171. {
  172. return current_mii;
  173. }
  174. struct phy_device *mdio_phydev_for_ethname(const char *ethname)
  175. {
  176. struct list_head *entry;
  177. struct mii_dev *bus;
  178. list_for_each(entry, &mii_devs) {
  179. int i;
  180. bus = list_entry(entry, struct mii_dev, link);
  181. for (i = 0; i < PHY_MAX_ADDR; i++) {
  182. if (!bus->phymap[i] || !bus->phymap[i]->dev)
  183. continue;
  184. if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
  185. return bus->phymap[i];
  186. }
  187. }
  188. printf("%s is not a known ethernet\n", ethname);
  189. return NULL;
  190. }
  191. const char *miiphy_get_current_dev(void)
  192. {
  193. if (current_mii)
  194. return current_mii->name;
  195. return NULL;
  196. }
  197. static struct mii_dev *miiphy_get_active_dev(const char *devname)
  198. {
  199. /* If the current mii is the one we want, return it */
  200. if (current_mii)
  201. if (strcmp(current_mii->name, devname) == 0)
  202. return current_mii;
  203. /* Otherwise, set the active one to the one we want */
  204. if (miiphy_set_current_dev(devname))
  205. return NULL;
  206. else
  207. return current_mii;
  208. }
  209. /*****************************************************************************
  210. *
  211. * Read to variable <value> from the PHY attached to device <devname>,
  212. * use PHY address <addr> and register <reg>.
  213. *
  214. * This API is deprecated. Use phy_read on a phy_device found via phy_connect
  215. *
  216. * Returns:
  217. * 0 on success
  218. */
  219. int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
  220. unsigned short *value)
  221. {
  222. struct mii_dev *bus;
  223. int ret;
  224. bus = miiphy_get_active_dev(devname);
  225. if (!bus)
  226. return 1;
  227. ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
  228. if (ret < 0)
  229. return 1;
  230. *value = (unsigned short)ret;
  231. return 0;
  232. }
  233. /*****************************************************************************
  234. *
  235. * Write <value> to the PHY attached to device <devname>,
  236. * use PHY address <addr> and register <reg>.
  237. *
  238. * This API is deprecated. Use phy_write on a phy_device found by phy_connect
  239. *
  240. * Returns:
  241. * 0 on success
  242. */
  243. int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
  244. unsigned short value)
  245. {
  246. struct mii_dev *bus;
  247. bus = miiphy_get_active_dev(devname);
  248. if (bus)
  249. return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);
  250. return 1;
  251. }
  252. /*****************************************************************************
  253. *
  254. * Print out list of registered MII capable devices.
  255. */
  256. void miiphy_listdev(void)
  257. {
  258. struct list_head *entry;
  259. struct mii_dev *dev;
  260. puts("MII devices: ");
  261. list_for_each(entry, &mii_devs) {
  262. dev = list_entry(entry, struct mii_dev, link);
  263. printf("'%s' ", dev->name);
  264. }
  265. puts("\n");
  266. if (current_mii)
  267. printf("Current device: '%s'\n", current_mii->name);
  268. }
  269. /*****************************************************************************
  270. *
  271. * Read the OUI, manufacture's model number, and revision number.
  272. *
  273. * OUI: 22 bits (unsigned int)
  274. * Model: 6 bits (unsigned char)
  275. * Revision: 4 bits (unsigned char)
  276. *
  277. * This API is deprecated.
  278. *
  279. * Returns:
  280. * 0 on success
  281. */
  282. int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
  283. unsigned char *model, unsigned char *rev)
  284. {
  285. unsigned int reg = 0;
  286. unsigned short tmp;
  287. if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
  288. debug("PHY ID register 2 read failed\n");
  289. return -1;
  290. }
  291. reg = tmp;
  292. debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);
  293. if (reg == 0xFFFF) {
  294. /* No physical device present at this address */
  295. return -1;
  296. }
  297. if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
  298. debug("PHY ID register 1 read failed\n");
  299. return -1;
  300. }
  301. reg |= tmp << 16;
  302. debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
  303. *oui = (reg >> 10);
  304. *model = (unsigned char)((reg >> 4) & 0x0000003F);
  305. *rev = (unsigned char)(reg & 0x0000000F);
  306. return 0;
  307. }
  308. #ifndef CONFIG_PHYLIB
  309. /*****************************************************************************
  310. *
  311. * Reset the PHY.
  312. *
  313. * This API is deprecated. Use PHYLIB.
  314. *
  315. * Returns:
  316. * 0 on success
  317. */
  318. int miiphy_reset(const char *devname, unsigned char addr)
  319. {
  320. unsigned short reg;
  321. int timeout = 500;
  322. if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
  323. debug("PHY status read failed\n");
  324. return -1;
  325. }
  326. if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) {
  327. debug("PHY reset failed\n");
  328. return -1;
  329. }
  330. #ifdef CONFIG_PHY_RESET_DELAY
  331. udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
  332. #endif
  333. /*
  334. * Poll the control register for the reset bit to go to 0 (it is
  335. * auto-clearing). This should happen within 0.5 seconds per the
  336. * IEEE spec.
  337. */
  338. reg = 0x8000;
  339. while (((reg & 0x8000) != 0) && timeout--) {
  340. if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
  341. debug("PHY status read failed\n");
  342. return -1;
  343. }
  344. udelay(1000);
  345. }
  346. if ((reg & 0x8000) == 0) {
  347. return 0;
  348. } else {
  349. puts("PHY reset timed out\n");
  350. return -1;
  351. }
  352. return 0;
  353. }
  354. #endif /* !PHYLIB */
  355. /*****************************************************************************
  356. *
  357. * Determine the ethernet speed (10/100/1000). Return 10 on error.
  358. */
  359. int miiphy_speed(const char *devname, unsigned char addr)
  360. {
  361. u16 bmcr, anlpar;
  362. #if defined(CONFIG_PHY_GIGE)
  363. u16 btsr;
  364. /*
  365. * Check for 1000BASE-X. If it is supported, then assume that the speed
  366. * is 1000.
  367. */
  368. if (miiphy_is_1000base_x(devname, addr))
  369. return _1000BASET;
  370. /*
  371. * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
  372. */
  373. /* Check for 1000BASE-T. */
  374. if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
  375. printf("PHY 1000BT status");
  376. goto miiphy_read_failed;
  377. }
  378. if (btsr != 0xFFFF &&
  379. (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)))
  380. return _1000BASET;
  381. #endif /* CONFIG_PHY_GIGE */
  382. /* Check Basic Management Control Register first. */
  383. if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
  384. printf("PHY speed");
  385. goto miiphy_read_failed;
  386. }
  387. /* Check if auto-negotiation is on. */
  388. if (bmcr & BMCR_ANENABLE) {
  389. /* Get auto-negotiation results. */
  390. if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
  391. printf("PHY AN speed");
  392. goto miiphy_read_failed;
  393. }
  394. return (anlpar & LPA_100) ? _100BASET : _10BASET;
  395. }
  396. /* Get speed from basic control settings. */
  397. return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;
  398. miiphy_read_failed:
  399. printf(" read failed, assuming 10BASE-T\n");
  400. return _10BASET;
  401. }
  402. /*****************************************************************************
  403. *
  404. * Determine full/half duplex. Return half on error.
  405. */
  406. int miiphy_duplex(const char *devname, unsigned char addr)
  407. {
  408. u16 bmcr, anlpar;
  409. #if defined(CONFIG_PHY_GIGE)
  410. u16 btsr;
  411. /* Check for 1000BASE-X. */
  412. if (miiphy_is_1000base_x(devname, addr)) {
  413. /* 1000BASE-X */
  414. if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
  415. printf("1000BASE-X PHY AN duplex");
  416. goto miiphy_read_failed;
  417. }
  418. }
  419. /*
  420. * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
  421. */
  422. /* Check for 1000BASE-T. */
  423. if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
  424. printf("PHY 1000BT status");
  425. goto miiphy_read_failed;
  426. }
  427. if (btsr != 0xFFFF) {
  428. if (btsr & PHY_1000BTSR_1000FD) {
  429. return FULL;
  430. } else if (btsr & PHY_1000BTSR_1000HD) {
  431. return HALF;
  432. }
  433. }
  434. #endif /* CONFIG_PHY_GIGE */
  435. /* Check Basic Management Control Register first. */
  436. if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
  437. puts("PHY duplex");
  438. goto miiphy_read_failed;
  439. }
  440. /* Check if auto-negotiation is on. */
  441. if (bmcr & BMCR_ANENABLE) {
  442. /* Get auto-negotiation results. */
  443. if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
  444. puts("PHY AN duplex");
  445. goto miiphy_read_failed;
  446. }
  447. return (anlpar & (LPA_10FULL | LPA_100FULL)) ?
  448. FULL : HALF;
  449. }
  450. /* Get speed from basic control settings. */
  451. return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;
  452. miiphy_read_failed:
  453. printf(" read failed, assuming half duplex\n");
  454. return HALF;
  455. }
  456. /*****************************************************************************
  457. *
  458. * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
  459. * 1000BASE-T, or on error.
  460. */
  461. int miiphy_is_1000base_x(const char *devname, unsigned char addr)
  462. {
  463. #if defined(CONFIG_PHY_GIGE)
  464. u16 exsr;
  465. if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
  466. printf("PHY extended status read failed, assuming no "
  467. "1000BASE-X\n");
  468. return 0;
  469. }
  470. return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH));
  471. #else
  472. return 0;
  473. #endif
  474. }
  475. #ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  476. /*****************************************************************************
  477. *
  478. * Determine link status
  479. */
  480. int miiphy_link(const char *devname, unsigned char addr)
  481. {
  482. unsigned short reg;
  483. /* dummy read; needed to latch some phys */
  484. (void)miiphy_read(devname, addr, MII_BMSR, &reg);
  485. if (miiphy_read(devname, addr, MII_BMSR, &reg)) {
  486. puts("MII_BMSR read failed, assuming no link\n");
  487. return 0;
  488. }
  489. /* Determine if a link is active */
  490. if ((reg & BMSR_LSTATUS) != 0) {
  491. return 1;
  492. } else {
  493. return 0;
  494. }
  495. }
  496. #endif