uniphier-ph1-sld3.dtsi 2.6 KB

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  1. /*
  2. * Device Tree Source for UniPhier PH1-sLD3 SoC
  3. *
  4. * Copyright (C) 2014-2015 Panasonic Corporation
  5. * Copyright (C) 2015 Socionext Inc.
  6. * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  7. *
  8. * SPDX-License-Identifier: GPL-2.0+
  9. */
  10. /include/ "skeleton.dtsi"
  11. / {
  12. compatible = "socionext,ph1-sld3";
  13. cpus {
  14. #address-cells = <1>;
  15. #size-cells = <0>;
  16. cpu@0 {
  17. device_type = "cpu";
  18. compatible = "arm,cortex-a9";
  19. reg = <0>;
  20. };
  21. cpu@1 {
  22. device_type = "cpu";
  23. compatible = "arm,cortex-a9";
  24. reg = <1>;
  25. };
  26. };
  27. soc {
  28. compatible = "simple-bus";
  29. #address-cells = <1>;
  30. #size-cells = <1>;
  31. ranges;
  32. uart0: serial@54006800 {
  33. compatible = "socionext,uniphier-uart";
  34. status = "disabled";
  35. reg = <0x54006800 0x20>;
  36. clock-frequency = <36864000>;
  37. };
  38. uart1: serial@54006900 {
  39. compatible = "socionext,uniphier-uart";
  40. status = "disabled";
  41. reg = <0x54006900 0x20>;
  42. clock-frequency = <36864000>;
  43. };
  44. uart2: serial@54006a00 {
  45. compatible = "socionext,uniphier-uart";
  46. status = "disabled";
  47. reg = <0x54006a00 0x20>;
  48. clock-frequency = <36864000>;
  49. };
  50. i2c0: i2c@58400000 {
  51. compatible = "socionext,uniphier-i2c";
  52. #address-cells = <1>;
  53. #size-cells = <0>;
  54. reg = <0x58400000 0x40>;
  55. clock-frequency = <100000>;
  56. status = "disabled";
  57. };
  58. i2c1: i2c@58480000 {
  59. compatible = "socionext,uniphier-i2c";
  60. #address-cells = <1>;
  61. #size-cells = <0>;
  62. reg = <0x58480000 0x40>;
  63. clock-frequency = <100000>;
  64. status = "disabled";
  65. };
  66. i2c2: i2c@58500000 {
  67. compatible = "socionext,uniphier-i2c";
  68. #address-cells = <1>;
  69. #size-cells = <0>;
  70. reg = <0x58500000 0x40>;
  71. clock-frequency = <100000>;
  72. status = "disabled";
  73. };
  74. i2c3: i2c@58580000 {
  75. compatible = "socionext,uniphier-i2c";
  76. #address-cells = <1>;
  77. #size-cells = <0>;
  78. reg = <0x58580000 0x40>;
  79. clock-frequency = <100000>;
  80. status = "disabled";
  81. };
  82. usb0: usb@5a800100 {
  83. compatible = "socionext,uniphier-ehci", "generic-ehci";
  84. status = "disabled";
  85. reg = <0x5a800100 0x100>;
  86. };
  87. usb1: usb@5a810100 {
  88. compatible = "socionext,uniphier-ehci", "generic-ehci";
  89. status = "disabled";
  90. reg = <0x5a810100 0x100>;
  91. };
  92. usb2: usb@5a820100 {
  93. compatible = "socionext,uniphier-ehci", "generic-ehci";
  94. status = "disabled";
  95. reg = <0x5a820100 0x100>;
  96. };
  97. usb3: usb@5a830100 {
  98. compatible = "socionext,uniphier-ehci", "generic-ehci";
  99. status = "disabled";
  100. reg = <0x5a830100 0x100>;
  101. };
  102. nand: nand@f8000000 {
  103. compatible = "denali,denali-nand-dt";
  104. reg = <0xf8000000 0x20>, <0xf8100000 0x1000>;
  105. reg-names = "nand_data", "denali_reg";
  106. };
  107. };
  108. };