hab.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516
  1. /*
  2. * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <config.h>
  8. #include <fuse.h>
  9. #include <asm/io.h>
  10. #include <asm/system.h>
  11. #include <asm/arch/clock.h>
  12. #include <asm/arch/sys_proto.h>
  13. #include <asm/imx-common/hab.h>
  14. /* -------- start of HAB API updates ------------*/
  15. #define hab_rvt_report_event_p \
  16. ( \
  17. (is_mx6dqp()) ? \
  18. ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
  19. (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
  20. ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
  21. (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
  22. ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
  23. ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT) \
  24. )
  25. #define hab_rvt_report_status_p \
  26. ( \
  27. (is_mx6dqp()) ? \
  28. ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
  29. (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
  30. ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
  31. (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
  32. ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
  33. ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS) \
  34. )
  35. #define hab_rvt_authenticate_image_p \
  36. ( \
  37. (is_mx6dqp()) ? \
  38. ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
  39. (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
  40. ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
  41. (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
  42. ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
  43. ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE) \
  44. )
  45. #define hab_rvt_entry_p \
  46. ( \
  47. (is_mx6dqp()) ? \
  48. ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
  49. (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
  50. ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
  51. (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
  52. ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
  53. ((hab_rvt_entry_t *)HAB_RVT_ENTRY) \
  54. )
  55. #define hab_rvt_exit_p \
  56. ( \
  57. (is_mx6dqp()) ? \
  58. ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
  59. (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
  60. ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
  61. (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
  62. ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
  63. ((hab_rvt_exit_t *)HAB_RVT_EXIT) \
  64. )
  65. #define IVT_SIZE 0x20
  66. #define ALIGN_SIZE 0x1000
  67. #define CSF_PAD_SIZE 0x2000
  68. #define MX6DQ_PU_IROM_MMU_EN_VAR 0x009024a8
  69. #define MX6DLS_PU_IROM_MMU_EN_VAR 0x00901dd0
  70. #define MX6SL_PU_IROM_MMU_EN_VAR 0x00900a18
  71. #define IS_HAB_ENABLED_BIT \
  72. (is_soc_type(MXC_SOC_MX7ULP) ? 0x80000000 : \
  73. (is_soc_type(MXC_SOC_MX7) ? 0x2000000 : 0x2))
  74. /*
  75. * +------------+ 0x0 (DDR_UIMAGE_START) -
  76. * | Header | |
  77. * +------------+ 0x40 |
  78. * | | |
  79. * | | |
  80. * | | |
  81. * | | |
  82. * | Image Data | |
  83. * . | |
  84. * . | > Stuff to be authenticated ----+
  85. * . | | |
  86. * | | | |
  87. * | | | |
  88. * +------------+ | |
  89. * | | | |
  90. * | Fill Data | | |
  91. * | | | |
  92. * +------------+ Align to ALIGN_SIZE | |
  93. * | IVT | | |
  94. * +------------+ + IVT_SIZE - |
  95. * | | |
  96. * | CSF DATA | <---------------------------------------------------------+
  97. * | |
  98. * +------------+
  99. * | |
  100. * | Fill Data |
  101. * | |
  102. * +------------+ + CSF_PAD_SIZE
  103. */
  104. static bool is_hab_enabled(void);
  105. #if !defined(CONFIG_SPL_BUILD)
  106. #define MAX_RECORD_BYTES (8*1024) /* 4 kbytes */
  107. struct record {
  108. uint8_t tag; /* Tag */
  109. uint8_t len[2]; /* Length */
  110. uint8_t par; /* Version */
  111. uint8_t contents[MAX_RECORD_BYTES];/* Record Data */
  112. bool any_rec_flag;
  113. };
  114. char *rsn_str[] = {"RSN = HAB_RSN_ANY (0x00)\n",
  115. "RSN = HAB_ENG_FAIL (0x30)\n",
  116. "RSN = HAB_INV_ADDRESS (0x22)\n",
  117. "RSN = HAB_INV_ASSERTION (0x0C)\n",
  118. "RSN = HAB_INV_CALL (0x28)\n",
  119. "RSN = HAB_INV_CERTIFICATE (0x21)\n",
  120. "RSN = HAB_INV_COMMAND (0x06)\n",
  121. "RSN = HAB_INV_CSF (0x11)\n",
  122. "RSN = HAB_INV_DCD (0x27)\n",
  123. "RSN = HAB_INV_INDEX (0x0F)\n",
  124. "RSN = HAB_INV_IVT (0x05)\n",
  125. "RSN = HAB_INV_KEY (0x1D)\n",
  126. "RSN = HAB_INV_RETURN (0x1E)\n",
  127. "RSN = HAB_INV_SIGNATURE (0x18)\n",
  128. "RSN = HAB_INV_SIZE (0x17)\n",
  129. "RSN = HAB_MEM_FAIL (0x2E)\n",
  130. "RSN = HAB_OVR_COUNT (0x2B)\n",
  131. "RSN = HAB_OVR_STORAGE (0x2D)\n",
  132. "RSN = HAB_UNS_ALGORITHM (0x12)\n",
  133. "RSN = HAB_UNS_COMMAND (0x03)\n",
  134. "RSN = HAB_UNS_ENGINE (0x0A)\n",
  135. "RSN = HAB_UNS_ITEM (0x24)\n",
  136. "RSN = HAB_UNS_KEY (0x1B)\n",
  137. "RSN = HAB_UNS_PROTOCOL (0x14)\n",
  138. "RSN = HAB_UNS_STATE (0x09)\n",
  139. "RSN = INVALID\n",
  140. NULL};
  141. char *sts_str[] = {"STS = HAB_SUCCESS (0xF0)\n",
  142. "STS = HAB_FAILURE (0x33)\n",
  143. "STS = HAB_WARNING (0x69)\n",
  144. "STS = INVALID\n",
  145. NULL};
  146. char *eng_str[] = {"ENG = HAB_ENG_ANY (0x00)\n",
  147. "ENG = HAB_ENG_SCC (0x03)\n",
  148. "ENG = HAB_ENG_RTIC (0x05)\n",
  149. "ENG = HAB_ENG_SAHARA (0x06)\n",
  150. "ENG = HAB_ENG_CSU (0x0A)\n",
  151. "ENG = HAB_ENG_SRTC (0x0C)\n",
  152. "ENG = HAB_ENG_DCP (0x1B)\n",
  153. "ENG = HAB_ENG_CAAM (0x1D)\n",
  154. "ENG = HAB_ENG_SNVS (0x1E)\n",
  155. "ENG = HAB_ENG_OCOTP (0x21)\n",
  156. "ENG = HAB_ENG_DTCP (0x22)\n",
  157. "ENG = HAB_ENG_ROM (0x36)\n",
  158. "ENG = HAB_ENG_HDCP (0x24)\n",
  159. "ENG = HAB_ENG_RTL (0x77)\n",
  160. "ENG = HAB_ENG_SW (0xFF)\n",
  161. "ENG = INVALID\n",
  162. NULL};
  163. char *ctx_str[] = {"CTX = HAB_CTX_ANY(0x00)\n",
  164. "CTX = HAB_CTX_FAB (0xFF)\n",
  165. "CTX = HAB_CTX_ENTRY (0xE1)\n",
  166. "CTX = HAB_CTX_TARGET (0x33)\n",
  167. "CTX = HAB_CTX_AUTHENTICATE (0x0A)\n",
  168. "CTX = HAB_CTX_DCD (0xDD)\n",
  169. "CTX = HAB_CTX_CSF (0xCF)\n",
  170. "CTX = HAB_CTX_COMMAND (0xC0)\n",
  171. "CTX = HAB_CTX_AUT_DAT (0xDB)\n",
  172. "CTX = HAB_CTX_ASSERT (0xA0)\n",
  173. "CTX = HAB_CTX_EXIT (0xEE)\n",
  174. "CTX = INVALID\n",
  175. NULL};
  176. uint8_t hab_statuses[5] = {
  177. HAB_STS_ANY,
  178. HAB_FAILURE,
  179. HAB_WARNING,
  180. HAB_SUCCESS,
  181. -1
  182. };
  183. uint8_t hab_reasons[26] = {
  184. HAB_RSN_ANY,
  185. HAB_ENG_FAIL,
  186. HAB_INV_ADDRESS,
  187. HAB_INV_ASSERTION,
  188. HAB_INV_CALL,
  189. HAB_INV_CERTIFICATE,
  190. HAB_INV_COMMAND,
  191. HAB_INV_CSF,
  192. HAB_INV_DCD,
  193. HAB_INV_INDEX,
  194. HAB_INV_IVT,
  195. HAB_INV_KEY,
  196. HAB_INV_RETURN,
  197. HAB_INV_SIGNATURE,
  198. HAB_INV_SIZE,
  199. HAB_MEM_FAIL,
  200. HAB_OVR_COUNT,
  201. HAB_OVR_STORAGE,
  202. HAB_UNS_ALGORITHM,
  203. HAB_UNS_COMMAND,
  204. HAB_UNS_ENGINE,
  205. HAB_UNS_ITEM,
  206. HAB_UNS_KEY,
  207. HAB_UNS_PROTOCOL,
  208. HAB_UNS_STATE,
  209. -1
  210. };
  211. uint8_t hab_contexts[12] = {
  212. HAB_CTX_ANY,
  213. HAB_CTX_FAB,
  214. HAB_CTX_ENTRY,
  215. HAB_CTX_TARGET,
  216. HAB_CTX_AUTHENTICATE,
  217. HAB_CTX_DCD,
  218. HAB_CTX_CSF,
  219. HAB_CTX_COMMAND,
  220. HAB_CTX_AUT_DAT,
  221. HAB_CTX_ASSERT,
  222. HAB_CTX_EXIT,
  223. -1
  224. };
  225. uint8_t hab_engines[16] = {
  226. HAB_ENG_ANY,
  227. HAB_ENG_SCC,
  228. HAB_ENG_RTIC,
  229. HAB_ENG_SAHARA,
  230. HAB_ENG_CSU,
  231. HAB_ENG_SRTC,
  232. HAB_ENG_DCP,
  233. HAB_ENG_CAAM,
  234. HAB_ENG_SNVS,
  235. HAB_ENG_OCOTP,
  236. HAB_ENG_DTCP,
  237. HAB_ENG_ROM,
  238. HAB_ENG_HDCP,
  239. HAB_ENG_RTL,
  240. HAB_ENG_SW,
  241. -1
  242. };
  243. static inline uint8_t get_idx(uint8_t *list, uint8_t tgt)
  244. {
  245. uint8_t idx = 0;
  246. uint8_t element = list[idx];
  247. while (element != -1) {
  248. if (element == tgt)
  249. return idx;
  250. element = list[++idx];
  251. }
  252. return -1;
  253. }
  254. void process_event_record(uint8_t *event_data, size_t bytes)
  255. {
  256. struct record *rec = (struct record *)event_data;
  257. printf("\n\n%s", sts_str[get_idx(hab_statuses, rec->contents[0])]);
  258. printf("%s", rsn_str[get_idx(hab_reasons, rec->contents[1])]);
  259. printf("%s", ctx_str[get_idx(hab_contexts, rec->contents[2])]);
  260. printf("%s", eng_str[get_idx(hab_engines, rec->contents[3])]);
  261. }
  262. void display_event(uint8_t *event_data, size_t bytes)
  263. {
  264. uint32_t i;
  265. if (!(event_data && bytes > 0))
  266. return;
  267. for (i = 0; i < bytes; i++) {
  268. if (i == 0)
  269. printf("\t0x%02x", event_data[i]);
  270. else if ((i % 8) == 0)
  271. printf("\n\t0x%02x", event_data[i]);
  272. else
  273. printf(" 0x%02x", event_data[i]);
  274. }
  275. process_event_record(event_data, bytes);
  276. }
  277. int get_hab_status(void)
  278. {
  279. uint32_t index = 0; /* Loop index */
  280. uint8_t event_data[128]; /* Event data buffer */
  281. size_t bytes = sizeof(event_data); /* Event size in bytes */
  282. enum hab_config config = 0;
  283. enum hab_state state = 0;
  284. hab_rvt_report_event_t *hab_rvt_report_event;
  285. hab_rvt_report_status_t *hab_rvt_report_status;
  286. hab_rvt_report_event = hab_rvt_report_event_p;
  287. hab_rvt_report_status = hab_rvt_report_status_p;
  288. if (is_hab_enabled())
  289. puts("\nSecure boot enabled\n");
  290. else
  291. puts("\nSecure boot disabled\n");
  292. /* Check HAB status */
  293. if (hab_rvt_report_status(&config, &state) != HAB_SUCCESS) {
  294. printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
  295. config, state);
  296. /* Display HAB Error events */
  297. while (hab_rvt_report_event(HAB_FAILURE, index, event_data,
  298. &bytes) == HAB_SUCCESS) {
  299. puts("\n");
  300. printf("--------- HAB Event %d -----------------\n",
  301. index + 1);
  302. puts("event data:\n");
  303. display_event(event_data, bytes);
  304. puts("\n");
  305. bytes = sizeof(event_data);
  306. index++;
  307. }
  308. }
  309. /* Display message if no HAB events are found */
  310. else {
  311. printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
  312. config, state);
  313. puts("No HAB Events Found!\n\n");
  314. }
  315. return 0;
  316. }
  317. int do_hab_status(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  318. {
  319. if ((argc != 1)) {
  320. cmd_usage(cmdtp);
  321. return 1;
  322. }
  323. get_hab_status();
  324. return 0;
  325. }
  326. static int do_authenticate_image(cmd_tbl_t *cmdtp, int flag, int argc,
  327. char * const argv[])
  328. {
  329. ulong addr, ivt_offset;
  330. int rcode = 0;
  331. if (argc < 3)
  332. return CMD_RET_USAGE;
  333. addr = simple_strtoul(argv[1], NULL, 16);
  334. ivt_offset = simple_strtoul(argv[2], NULL, 16);
  335. rcode = authenticate_image(addr, ivt_offset);
  336. return rcode;
  337. }
  338. U_BOOT_CMD(
  339. hab_status, CONFIG_SYS_MAXARGS, 1, do_hab_status,
  340. "display HAB status",
  341. ""
  342. );
  343. U_BOOT_CMD(
  344. hab_auth_img, 3, 0, do_authenticate_image,
  345. "authenticate image via HAB",
  346. "addr ivt_offset\n"
  347. "addr - image hex address\n"
  348. "ivt_offset - hex offset of IVT in the image"
  349. );
  350. #endif /* !defined(CONFIG_SPL_BUILD) */
  351. static bool is_hab_enabled(void)
  352. {
  353. struct imx_sec_config_fuse_t *fuse =
  354. (struct imx_sec_config_fuse_t *)&imx_sec_config_fuse;
  355. uint32_t reg;
  356. int ret;
  357. ret = fuse_read(fuse->bank, fuse->word, &reg);
  358. if (ret) {
  359. puts("\nSecure boot fuse read error\n");
  360. return ret;
  361. }
  362. return (reg & IS_HAB_ENABLED_BIT) == IS_HAB_ENABLED_BIT;
  363. }
  364. uint32_t authenticate_image(uint32_t ddr_start, uint32_t image_size)
  365. {
  366. uint32_t load_addr = 0;
  367. size_t bytes;
  368. ptrdiff_t ivt_offset = 0;
  369. int result = 0;
  370. ulong start;
  371. hab_rvt_authenticate_image_t *hab_rvt_authenticate_image;
  372. hab_rvt_entry_t *hab_rvt_entry;
  373. hab_rvt_exit_t *hab_rvt_exit;
  374. hab_rvt_authenticate_image = hab_rvt_authenticate_image_p;
  375. hab_rvt_entry = hab_rvt_entry_p;
  376. hab_rvt_exit = hab_rvt_exit_p;
  377. if (is_hab_enabled()) {
  378. printf("\nAuthenticate image from DDR location 0x%x...\n",
  379. ddr_start);
  380. hab_caam_clock_enable(1);
  381. if (hab_rvt_entry() == HAB_SUCCESS) {
  382. /* If not already aligned, Align to ALIGN_SIZE */
  383. ivt_offset = (image_size + ALIGN_SIZE - 1) &
  384. ~(ALIGN_SIZE - 1);
  385. start = ddr_start;
  386. bytes = ivt_offset + IVT_SIZE + CSF_PAD_SIZE;
  387. #ifdef DEBUG
  388. printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n",
  389. ivt_offset, ddr_start + ivt_offset);
  390. puts("Dumping IVT\n");
  391. print_buffer(ddr_start + ivt_offset,
  392. (void *)(ddr_start + ivt_offset),
  393. 4, 0x8, 0);
  394. puts("Dumping CSF Header\n");
  395. print_buffer(ddr_start + ivt_offset+IVT_SIZE,
  396. (void *)(ddr_start + ivt_offset+IVT_SIZE),
  397. 4, 0x10, 0);
  398. #if !defined(CONFIG_SPL_BUILD)
  399. get_hab_status();
  400. #endif
  401. puts("\nCalling authenticate_image in ROM\n");
  402. printf("\tivt_offset = 0x%x\n", ivt_offset);
  403. printf("\tstart = 0x%08lx\n", start);
  404. printf("\tbytes = 0x%x\n", bytes);
  405. #endif
  406. /*
  407. * If the MMU is enabled, we have to notify the ROM
  408. * code, or it won't flush the caches when needed.
  409. * This is done, by setting the "pu_irom_mmu_enabled"
  410. * word to 1. You can find its address by looking in
  411. * the ROM map. This is critical for
  412. * authenticate_image(). If MMU is enabled, without
  413. * setting this bit, authentication will fail and may
  414. * crash.
  415. */
  416. /* Check MMU enabled */
  417. if (is_soc_type(MXC_SOC_MX6) && get_cr() & CR_M) {
  418. if (is_mx6dq()) {
  419. /*
  420. * This won't work on Rev 1.0.0 of
  421. * i.MX6Q/D, since their ROM doesn't
  422. * do cache flushes. don't think any
  423. * exist, so we ignore them.
  424. */
  425. if (!is_mx6dqp())
  426. writel(1, MX6DQ_PU_IROM_MMU_EN_VAR);
  427. } else if (is_mx6sdl()) {
  428. writel(1, MX6DLS_PU_IROM_MMU_EN_VAR);
  429. } else if (is_mx6sl()) {
  430. writel(1, MX6SL_PU_IROM_MMU_EN_VAR);
  431. }
  432. }
  433. load_addr = (uint32_t)hab_rvt_authenticate_image(
  434. HAB_CID_UBOOT,
  435. ivt_offset, (void **)&start,
  436. (size_t *)&bytes, NULL);
  437. if (hab_rvt_exit() != HAB_SUCCESS) {
  438. puts("hab exit function fail\n");
  439. load_addr = 0;
  440. }
  441. } else {
  442. puts("hab entry function fail\n");
  443. }
  444. hab_caam_clock_enable(0);
  445. #if !defined(CONFIG_SPL_BUILD)
  446. get_hab_status();
  447. #endif
  448. } else {
  449. puts("hab fuse not enabled\n");
  450. }
  451. if ((!is_hab_enabled()) || (load_addr != 0))
  452. result = 1;
  453. return result;
  454. }