start.S 2.6 KB

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  1. /*
  2. * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <asm-offsets.h>
  7. #include <config.h>
  8. #include <linux/linkage.h>
  9. #include <asm/arcregs.h>
  10. ENTRY(_start)
  11. /* Setup interrupt vector base that matches "__text_start" */
  12. sr __ivt_start, [ARC_AUX_INTR_VEC_BASE]
  13. ; Disable/enable I-cache according to configuration
  14. lr r5, [ARC_BCR_IC_BUILD]
  15. breq r5, 0, 1f ; I$ doesn't exist
  16. lr r5, [ARC_AUX_IC_CTRL]
  17. #ifndef CONFIG_SYS_ICACHE_OFF
  18. bclr r5, r5, 0 ; 0 - Enable, 1 is Disable
  19. #else
  20. bset r5, r5, 0 ; I$ exists, but is not used
  21. #endif
  22. sr r5, [ARC_AUX_IC_CTRL]
  23. mov r5, 1
  24. sr r5, [ARC_AUX_IC_IVIC]
  25. ; As per ARC HS databook (see chapter 5.3.3.2)
  26. ; it is required to add 3 NOPs after each write to IC_IVIC.
  27. nop
  28. nop
  29. nop
  30. 1:
  31. ; Disable/enable D-cache according to configuration
  32. lr r5, [ARC_BCR_DC_BUILD]
  33. breq r5, 0, 1f ; D$ doesn't exist
  34. lr r5, [ARC_AUX_DC_CTRL]
  35. bclr r5, r5, 6 ; Invalidate (discard w/o wback)
  36. #ifndef CONFIG_SYS_DCACHE_OFF
  37. bclr r5, r5, 0 ; Enable (+Inv)
  38. #else
  39. bset r5, r5, 0 ; Disable (+Inv)
  40. #endif
  41. sr r5, [ARC_AUX_DC_CTRL]
  42. mov r5, 1
  43. sr r5, [ARC_AUX_DC_IVDC]
  44. 1:
  45. #ifdef CONFIG_ISA_ARCV2
  46. ; Disable System-Level Cache (SLC)
  47. lr r5, [ARC_BCR_SLC]
  48. breq r5, 0, 1f ; SLC doesn't exist
  49. lr r5, [ARC_AUX_SLC_CTRL]
  50. bclr r5, r5, 6 ; Invalidate (discard w/o wback)
  51. bclr r5, r5, 0 ; Enable (+Inv)
  52. sr r5, [ARC_AUX_SLC_CTRL]
  53. 1:
  54. #endif
  55. /* Establish C runtime stack and frame */
  56. mov %sp, CONFIG_SYS_INIT_SP_ADDR
  57. mov %fp, %sp
  58. /* Allocate reserved area from current top of stack */
  59. mov %r0, %sp
  60. bl board_init_f_alloc_reserve
  61. /* Set stack below reserved area, adjust frame pointer accordingly */
  62. mov %sp, %r0
  63. mov %fp, %sp
  64. /* Initialize reserved area - note: r0 already contains address */
  65. bl board_init_f_init_reserve
  66. /* Zero the one and only argument of "board_init_f" */
  67. mov_s %r0, 0
  68. bl board_init_f
  69. /* We only get here if relocation is disabled by GD_FLG_SKIP_RELOC */
  70. /* Make sure we don't lose GD overwritten by zero new GD */
  71. mov %r0, %r25
  72. mov %r1, 0
  73. bl board_init_r
  74. ENDPROC(_start)
  75. /*
  76. * void board_init_f_r_trampoline(stack-pointer address)
  77. *
  78. * This "function" does not return, instead it continues in RAM
  79. * after relocating the monitor code.
  80. *
  81. * r0 = new stack-pointer
  82. */
  83. ENTRY(board_init_f_r_trampoline)
  84. /* Set up the stack- and frame-pointers */
  85. mov %sp, %r0
  86. mov %fp, %sp
  87. /* Update position of intterupt vector table */
  88. lr %r0, [ARC_AUX_INTR_VEC_BASE]
  89. ld %r1, [%r25, GD_RELOC_OFF]
  90. add %r0, %r0, %r1
  91. sr %r0, [ARC_AUX_INTR_VEC_BASE]
  92. /* Re-enter U-Boot by calling board_init_f_r */
  93. j board_init_f_r
  94. ENDPROC(board_init_f_r_trampoline)