init.c 8.9 KB

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  1. /*
  2. * Copyright 2011 Freescale Semiconductor, Inc.
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <asm/io.h>
  8. #include <asm/fsl_serdes.h>
  9. #include <fsl_mdio.h>
  10. #include "fm.h"
  11. struct fm_eth_info fm_info[] = {
  12. #if (CONFIG_SYS_NUM_FM1_DTSEC >= 1)
  13. FM_DTSEC_INFO_INITIALIZER(1, 1),
  14. #endif
  15. #if (CONFIG_SYS_NUM_FM1_DTSEC >= 2)
  16. FM_DTSEC_INFO_INITIALIZER(1, 2),
  17. #endif
  18. #if (CONFIG_SYS_NUM_FM1_DTSEC >= 3)
  19. FM_DTSEC_INFO_INITIALIZER(1, 3),
  20. #endif
  21. #if (CONFIG_SYS_NUM_FM1_DTSEC >= 4)
  22. FM_DTSEC_INFO_INITIALIZER(1, 4),
  23. #endif
  24. #if (CONFIG_SYS_NUM_FM1_DTSEC >= 5)
  25. FM_DTSEC_INFO_INITIALIZER(1, 5),
  26. #endif
  27. #if (CONFIG_SYS_NUM_FM1_DTSEC >= 6)
  28. FM_DTSEC_INFO_INITIALIZER(1, 6),
  29. #endif
  30. #if (CONFIG_SYS_NUM_FM1_DTSEC >= 7)
  31. FM_DTSEC_INFO_INITIALIZER(1, 9),
  32. #endif
  33. #if (CONFIG_SYS_NUM_FM1_DTSEC >= 8)
  34. FM_DTSEC_INFO_INITIALIZER(1, 10),
  35. #endif
  36. #if (CONFIG_SYS_NUM_FM2_DTSEC >= 1)
  37. FM_DTSEC_INFO_INITIALIZER(2, 1),
  38. #endif
  39. #if (CONFIG_SYS_NUM_FM2_DTSEC >= 2)
  40. FM_DTSEC_INFO_INITIALIZER(2, 2),
  41. #endif
  42. #if (CONFIG_SYS_NUM_FM2_DTSEC >= 3)
  43. FM_DTSEC_INFO_INITIALIZER(2, 3),
  44. #endif
  45. #if (CONFIG_SYS_NUM_FM2_DTSEC >= 4)
  46. FM_DTSEC_INFO_INITIALIZER(2, 4),
  47. #endif
  48. #if (CONFIG_SYS_NUM_FM2_DTSEC >= 5)
  49. FM_DTSEC_INFO_INITIALIZER(2, 5),
  50. #endif
  51. #if (CONFIG_SYS_NUM_FM2_DTSEC >= 6)
  52. FM_DTSEC_INFO_INITIALIZER(2, 6),
  53. #endif
  54. #if (CONFIG_SYS_NUM_FM2_DTSEC >= 7)
  55. FM_DTSEC_INFO_INITIALIZER(2, 9),
  56. #endif
  57. #if (CONFIG_SYS_NUM_FM2_DTSEC >= 8)
  58. FM_DTSEC_INFO_INITIALIZER(2, 10),
  59. #endif
  60. #if (CONFIG_SYS_NUM_FM1_10GEC >= 1)
  61. FM_TGEC_INFO_INITIALIZER(1, 1),
  62. #endif
  63. #if (CONFIG_SYS_NUM_FM1_10GEC >= 2)
  64. FM_TGEC_INFO_INITIALIZER(1, 2),
  65. #endif
  66. #if (CONFIG_SYS_NUM_FM1_10GEC >= 3)
  67. FM_TGEC_INFO_INITIALIZER2(1, 3),
  68. #endif
  69. #if (CONFIG_SYS_NUM_FM1_10GEC >= 4)
  70. FM_TGEC_INFO_INITIALIZER2(1, 4),
  71. #endif
  72. #if (CONFIG_SYS_NUM_FM2_10GEC >= 1)
  73. FM_TGEC_INFO_INITIALIZER(2, 1),
  74. #endif
  75. #if (CONFIG_SYS_NUM_FM2_10GEC >= 2)
  76. FM_TGEC_INFO_INITIALIZER(2, 2),
  77. #endif
  78. };
  79. int fm_standard_init(bd_t *bis)
  80. {
  81. int i;
  82. struct ccsr_fman *reg;
  83. reg = (void *)CONFIG_SYS_FSL_FM1_ADDR;
  84. if (fm_init_common(0, reg))
  85. return 0;
  86. for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
  87. if ((fm_info[i].enabled) && (fm_info[i].index == 1))
  88. fm_eth_initialize(reg, &fm_info[i]);
  89. }
  90. #if (CONFIG_SYS_NUM_FMAN == 2)
  91. reg = (void *)CONFIG_SYS_FSL_FM2_ADDR;
  92. if (fm_init_common(1, reg))
  93. return 0;
  94. for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
  95. if ((fm_info[i].enabled) && (fm_info[i].index == 2))
  96. fm_eth_initialize(reg, &fm_info[i]);
  97. }
  98. #endif
  99. return 1;
  100. }
  101. /* simple linear search to map from port to array index */
  102. static int fm_port_to_index(enum fm_port port)
  103. {
  104. int i;
  105. for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
  106. if (fm_info[i].port == port)
  107. return i;
  108. }
  109. return -1;
  110. }
  111. /*
  112. * Determine if an interface is actually active based on HW config
  113. * we expect fman_port_enet_if() to report PHY_INTERFACE_MODE_NONE if
  114. * the interface is not active based on HW cfg of the SoC
  115. */
  116. void fman_enet_init(void)
  117. {
  118. int i;
  119. for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
  120. phy_interface_t enet_if;
  121. enet_if = fman_port_enet_if(fm_info[i].port);
  122. if (enet_if != PHY_INTERFACE_MODE_NONE) {
  123. fm_info[i].enabled = 1;
  124. fm_info[i].enet_if = enet_if;
  125. } else {
  126. fm_info[i].enabled = 0;
  127. }
  128. }
  129. return ;
  130. }
  131. void fm_disable_port(enum fm_port port)
  132. {
  133. int i = fm_port_to_index(port);
  134. if (i == -1)
  135. return;
  136. fm_info[i].enabled = 0;
  137. fman_disable_port(port);
  138. }
  139. void fm_enable_port(enum fm_port port)
  140. {
  141. int i = fm_port_to_index(port);
  142. if (i == -1)
  143. return;
  144. fm_info[i].enabled = 1;
  145. fman_enable_port(port);
  146. }
  147. void fm_info_set_mdio(enum fm_port port, struct mii_dev *bus)
  148. {
  149. int i = fm_port_to_index(port);
  150. if (i == -1)
  151. return;
  152. fm_info[i].bus = bus;
  153. }
  154. void fm_info_set_phy_address(enum fm_port port, int address)
  155. {
  156. int i = fm_port_to_index(port);
  157. if (i == -1)
  158. return;
  159. fm_info[i].phy_addr = address;
  160. }
  161. /*
  162. * Returns the PHY address for a given Fman port
  163. *
  164. * The port must be set via a prior call to fm_info_set_phy_address().
  165. * A negative error code is returned if the port is invalid.
  166. */
  167. int fm_info_get_phy_address(enum fm_port port)
  168. {
  169. int i = fm_port_to_index(port);
  170. if (i == -1)
  171. return -1;
  172. return fm_info[i].phy_addr;
  173. }
  174. /*
  175. * Returns the type of the data interface between the given MAC and its PHY.
  176. * This is typically determined by the RCW.
  177. */
  178. phy_interface_t fm_info_get_enet_if(enum fm_port port)
  179. {
  180. int i = fm_port_to_index(port);
  181. if (i == -1)
  182. return PHY_INTERFACE_MODE_NONE;
  183. if (fm_info[i].enabled)
  184. return fm_info[i].enet_if;
  185. return PHY_INTERFACE_MODE_NONE;
  186. }
  187. static void
  188. __def_board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa,
  189. enum fm_port port, int offset)
  190. {
  191. return ;
  192. }
  193. void board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa,
  194. enum fm_port port, int offset)
  195. __attribute__((weak, alias("__def_board_ft_fman_fixup_port")));
  196. static void ft_fixup_port(void *blob, struct fm_eth_info *info, char *prop)
  197. {
  198. int off;
  199. uint32_t ph;
  200. phys_addr_t paddr = CONFIG_SYS_CCSRBAR_PHYS + info->compat_offset;
  201. u64 dtsec1_addr = (u64)CONFIG_SYS_CCSRBAR_PHYS +
  202. CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET;
  203. off = fdt_node_offset_by_compat_reg(blob, prop, paddr);
  204. if (info->enabled) {
  205. fdt_fixup_phy_connection(blob, off, info->enet_if);
  206. board_ft_fman_fixup_port(blob, prop, paddr, info->port, off);
  207. return ;
  208. }
  209. #ifdef CONFIG_SYS_FMAN_V3
  210. #ifndef CONFIG_FSL_FM_10GEC_REGULAR_NOTATION
  211. /*
  212. * On T2/T4 SoCs, physically FM1_DTSEC9 and FM1_10GEC1 use the same
  213. * dual-role MAC, when FM1_10GEC1 is enabled and FM1_DTSEC9
  214. * is disabled, ensure that the dual-role MAC is not disabled,
  215. * ditto for other dual-role MACs.
  216. */
  217. if (((info->port == FM1_DTSEC9) && (PORT_IS_ENABLED(FM1_10GEC1))) ||
  218. ((info->port == FM1_DTSEC10) && (PORT_IS_ENABLED(FM1_10GEC2))) ||
  219. ((info->port == FM1_DTSEC1) && (PORT_IS_ENABLED(FM1_10GEC3))) ||
  220. ((info->port == FM1_DTSEC2) && (PORT_IS_ENABLED(FM1_10GEC4))) ||
  221. ((info->port == FM1_10GEC1) && (PORT_IS_ENABLED(FM1_DTSEC9))) ||
  222. ((info->port == FM1_10GEC2) && (PORT_IS_ENABLED(FM1_DTSEC10))) ||
  223. ((info->port == FM1_10GEC3) && (PORT_IS_ENABLED(FM1_DTSEC1))) ||
  224. ((info->port == FM1_10GEC4) && (PORT_IS_ENABLED(FM1_DTSEC2)))
  225. #if (CONFIG_SYS_NUM_FMAN == 2)
  226. ||
  227. ((info->port == FM2_DTSEC9) && (PORT_IS_ENABLED(FM2_10GEC1))) ||
  228. ((info->port == FM2_DTSEC10) && (PORT_IS_ENABLED(FM2_10GEC2))) ||
  229. ((info->port == FM2_10GEC1) && (PORT_IS_ENABLED(FM2_DTSEC9))) ||
  230. ((info->port == FM2_10GEC2) && (PORT_IS_ENABLED(FM2_DTSEC10)))
  231. #endif
  232. #else
  233. /* FM1_DTSECx and FM1_10GECx use the same dual-role MAC */
  234. if (((info->port == FM1_DTSEC1) && (PORT_IS_ENABLED(FM1_10GEC1))) ||
  235. ((info->port == FM1_DTSEC2) && (PORT_IS_ENABLED(FM1_10GEC2))) ||
  236. ((info->port == FM1_DTSEC3) && (PORT_IS_ENABLED(FM1_10GEC3))) ||
  237. ((info->port == FM1_DTSEC4) && (PORT_IS_ENABLED(FM1_10GEC4))) ||
  238. ((info->port == FM1_10GEC1) && (PORT_IS_ENABLED(FM1_DTSEC1))) ||
  239. ((info->port == FM1_10GEC2) && (PORT_IS_ENABLED(FM1_DTSEC2))) ||
  240. ((info->port == FM1_10GEC3) && (PORT_IS_ENABLED(FM1_DTSEC3))) ||
  241. ((info->port == FM1_10GEC4) && (PORT_IS_ENABLED(FM1_DTSEC4)))
  242. #endif
  243. )
  244. return;
  245. #endif
  246. /* board code might have caused offset to change */
  247. off = fdt_node_offset_by_compat_reg(blob, prop, paddr);
  248. /* Don't disable FM1-DTSEC1 MAC as its used for MDIO */
  249. if (paddr != dtsec1_addr)
  250. fdt_status_disabled(blob, off); /* disable the MAC node */
  251. /* disable the fsl,dpa-ethernet node that points to the MAC */
  252. ph = fdt_get_phandle(blob, off);
  253. do_fixup_by_prop(blob, "fsl,fman-mac", &ph, sizeof(ph),
  254. "status", "disabled", strlen("disabled") + 1, 1);
  255. }
  256. void fdt_fixup_fman_ethernet(void *blob)
  257. {
  258. int i;
  259. #ifdef CONFIG_SYS_FMAN_V3
  260. for (i = 0; i < ARRAY_SIZE(fm_info); i++)
  261. ft_fixup_port(blob, &fm_info[i], "fsl,fman-memac");
  262. #else
  263. for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
  264. if (fm_info[i].type == FM_ETH_1G_E)
  265. ft_fixup_port(blob, &fm_info[i], "fsl,fman-1g-mac");
  266. else
  267. ft_fixup_port(blob, &fm_info[i], "fsl,fman-10g-mac");
  268. }
  269. #endif
  270. }
  271. /*QSGMII Riser Card can work in SGMII mode, but the PHY address is different.
  272. *This function scans which Riser Card being used(QSGMII or SGMII Riser Card),
  273. *then set the correct PHY address
  274. */
  275. void set_sgmii_phy(struct mii_dev *bus, enum fm_port base_port,
  276. unsigned int port_num, int phy_base_addr)
  277. {
  278. unsigned int regnum = 0;
  279. int qsgmii;
  280. int i;
  281. int phy_real_addr;
  282. qsgmii = is_qsgmii_riser_card(bus, phy_base_addr, port_num, regnum);
  283. if (!qsgmii)
  284. return;
  285. for (i = base_port; i < base_port + port_num; i++) {
  286. if (fm_info_get_enet_if(i) == PHY_INTERFACE_MODE_SGMII) {
  287. phy_real_addr = phy_base_addr + i - base_port;
  288. fm_info_set_phy_address(i, phy_real_addr);
  289. }
  290. }
  291. }
  292. /*to check whether qsgmii riser card is used*/
  293. int is_qsgmii_riser_card(struct mii_dev *bus, int phy_base_addr,
  294. unsigned int port_num, unsigned regnum)
  295. {
  296. int i;
  297. int val;
  298. if (!bus)
  299. return 0;
  300. for (i = phy_base_addr; i < phy_base_addr + port_num; i++) {
  301. val = bus->read(bus, i, MDIO_DEVAD_NONE, regnum);
  302. if (val != MIIM_TIMEOUT)
  303. return 1;
  304. }
  305. return 0;
  306. }