cpu.c 2.6 KB

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  1. /*
  2. * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
  3. * Scott McNutt <smcnutt@psyent.com>
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #include <common.h>
  8. #include <cpu.h>
  9. #include <dm.h>
  10. #include <errno.h>
  11. #include <asm/cache.h>
  12. DECLARE_GLOBAL_DATA_PTR;
  13. #ifdef CONFIG_DISPLAY_CPUINFO
  14. int print_cpuinfo(void)
  15. {
  16. printf("CPU: Nios-II\n");
  17. return 0;
  18. }
  19. #endif /* CONFIG_DISPLAY_CPUINFO */
  20. int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  21. {
  22. disable_interrupts();
  23. /* indirect call to go beyond 256MB limitation of toolchain */
  24. nios2_callr(gd->arch.reset_addr);
  25. return 0;
  26. }
  27. int arch_cpu_init_dm(void)
  28. {
  29. struct udevice *dev;
  30. int ret;
  31. ret = uclass_first_device(UCLASS_CPU, &dev);
  32. if (ret)
  33. return ret;
  34. if (!dev)
  35. return -ENODEV;
  36. gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
  37. return 0;
  38. }
  39. static int altera_nios2_get_desc(struct udevice *dev, char *buf, int size)
  40. {
  41. const char *cpu_name = "Nios-II";
  42. if (size < strlen(cpu_name))
  43. return -ENOSPC;
  44. strcpy(buf, cpu_name);
  45. return 0;
  46. }
  47. static int altera_nios2_get_info(struct udevice *dev, struct cpu_info *info)
  48. {
  49. info->cpu_freq = gd->cpu_clk;
  50. info->features = (1 << CPU_FEAT_L1_CACHE) |
  51. (gd->arch.has_mmu ? (1 << CPU_FEAT_MMU) : 0);
  52. return 0;
  53. }
  54. static int altera_nios2_get_count(struct udevice *dev)
  55. {
  56. return 1;
  57. }
  58. static int altera_nios2_probe(struct udevice *dev)
  59. {
  60. const void *blob = gd->fdt_blob;
  61. int node = dev->of_offset;
  62. gd->cpu_clk = fdtdec_get_int(blob, node,
  63. "clock-frequency", 0);
  64. gd->arch.dcache_line_size = fdtdec_get_int(blob, node,
  65. "dcache-line-size", 0);
  66. gd->arch.icache_line_size = fdtdec_get_int(blob, node,
  67. "icache-line-size", 0);
  68. gd->arch.dcache_size = fdtdec_get_int(blob, node,
  69. "dcache-size", 0);
  70. gd->arch.icache_size = fdtdec_get_int(blob, node,
  71. "icache-size", 0);
  72. gd->arch.reset_addr = fdtdec_get_int(blob, node,
  73. "altr,reset-addr", 0);
  74. gd->arch.exception_addr = fdtdec_get_int(blob, node,
  75. "altr,exception-addr", 0);
  76. gd->arch.has_initda = fdtdec_get_int(blob, node,
  77. "altr,has-initda", 0);
  78. gd->arch.has_mmu = fdtdec_get_int(blob, node,
  79. "altr,has-mmu", 0);
  80. gd->arch.io_region_base = gd->arch.has_mmu ? 0xe0000000 : 0x8000000;
  81. return 0;
  82. }
  83. static const struct cpu_ops altera_nios2_ops = {
  84. .get_desc = altera_nios2_get_desc,
  85. .get_info = altera_nios2_get_info,
  86. .get_count = altera_nios2_get_count,
  87. };
  88. static const struct udevice_id altera_nios2_ids[] = {
  89. { .compatible = "altr,nios2-1.0" },
  90. { .compatible = "altr,nios2-1.1" },
  91. { }
  92. };
  93. U_BOOT_DRIVER(altera_nios2) = {
  94. .name = "altera_nios2",
  95. .id = UCLASS_CPU,
  96. .of_match = altera_nios2_ids,
  97. .probe = altera_nios2_probe,
  98. .ops = &altera_nios2_ops,
  99. .flags = DM_FLAG_PRE_RELOC,
  100. };