fsl_usb.h 2.1 KB

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  1. /*
  2. * Freescale USB Controller
  3. *
  4. * Copyright 2013 Freescale Semiconductor, Inc.
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. #ifndef _ASM_FSL_USB_H_
  9. #define _ASM_FSL_USB_H_
  10. #ifdef CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
  11. struct ccsr_usb_port_ctrl {
  12. u32 ctrl;
  13. u32 drvvbuscfg;
  14. u32 pwrfltcfg;
  15. u32 sts;
  16. u8 res_14[0xc];
  17. u32 bistcfg;
  18. u32 biststs;
  19. u32 abistcfg;
  20. u32 abiststs;
  21. u8 res_30[0x10];
  22. u32 xcvrprg;
  23. u32 anaprg;
  24. u32 anadrv;
  25. u32 anasts;
  26. };
  27. struct ccsr_usb_phy {
  28. u32 id;
  29. struct ccsr_usb_port_ctrl port1;
  30. u8 res_50[0xc];
  31. u32 tvr;
  32. u32 pllprg[4];
  33. u8 res_70[0x4];
  34. u32 anaccfg;
  35. u32 dbg;
  36. u8 res_7c[0x4];
  37. struct ccsr_usb_port_ctrl port2;
  38. u8 res_dc[0x334];
  39. };
  40. #define CONFIG_SYS_FSL_USB_CTRL_PHY_EN (1 << 0)
  41. #define CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN (1 << 1)
  42. #define CONFIG_SYS_FSL_USB_PWRFLT_CR_EN (1 << 1)
  43. #define CONFIG_SYS_FSL_USB_PLLPRG1_PHY_DIV (1 << 0)
  44. #define CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN (1 << 0)
  45. #define CONFIG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN (1 << 1)
  46. #define CONFIG_SYS_FSL_USB_PLLPRG2_FRAC_LPF_EN (1 << 13)
  47. #define CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV (1 << 4)
  48. #define CONFIG_SYS_FSL_USB_PLLPRG2_MFI (5 << 16)
  49. #define CONFIG_SYS_FSL_USB_PLLPRG2_PLL_EN (1 << 21)
  50. #define CONFIG_SYS_FSL_USB_SYS_CLK_VALID (1 << 0)
  51. #define CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_EN (1 << 7)
  52. #define CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_MASK (3 << 4)
  53. #define INC_DCNT_THRESHOLD_25MV (0 << 4)
  54. #define INC_DCNT_THRESHOLD_50MV (1 << 4)
  55. #define DEC_DCNT_THRESHOLD_25MV (2 << 4)
  56. #define DEC_DCNT_THRESHOLD_50MV (3 << 4)
  57. #else
  58. struct ccsr_usb_phy {
  59. u32 config1;
  60. u32 config2;
  61. u32 config3;
  62. u32 config4;
  63. u32 config5;
  64. u32 status1;
  65. u32 usb_enable_override;
  66. u8 res[0xe4];
  67. };
  68. #define CONFIG_SYS_FSL_USB_HS_DISCNCT_INC (3 << 22)
  69. #define CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL (1 << 20)
  70. #define CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0 13
  71. #define CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3 16
  72. #define CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_0 0
  73. #define CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_3 3
  74. #define CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE 1
  75. #define CONFIG_SYS_FSL_USB_SQUELCH_PROG_MASK 0x07
  76. #endif
  77. #endif /*_ASM_FSL_USB_H_ */