fsl_serdes.h 2.2 KB

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  1. /*
  2. * Copyright 2010 Freescale Semiconductor, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License as
  6. * published by the Free Software Foundation; either version 2 of
  7. * the License, or (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  17. * MA 02111-1307 USA
  18. */
  19. #ifndef __FSL_SERDES_H
  20. #define __FSL_SERDES_H
  21. #include <config.h>
  22. enum srds_prtcl {
  23. NONE = 0,
  24. PCIE1,
  25. PCIE2,
  26. PCIE3,
  27. PCIE4,
  28. SATA1,
  29. SATA2,
  30. SRIO1,
  31. SRIO2,
  32. SGMII_FM1_DTSEC1,
  33. SGMII_FM1_DTSEC2,
  34. SGMII_FM1_DTSEC3,
  35. SGMII_FM1_DTSEC4,
  36. SGMII_FM1_DTSEC5,
  37. SGMII_FM1_DTSEC6,
  38. SGMII_FM1_DTSEC9,
  39. SGMII_FM1_DTSEC10,
  40. SGMII_FM2_DTSEC1,
  41. SGMII_FM2_DTSEC2,
  42. SGMII_FM2_DTSEC3,
  43. SGMII_FM2_DTSEC4,
  44. SGMII_FM2_DTSEC5,
  45. SGMII_FM2_DTSEC6,
  46. SGMII_FM2_DTSEC9,
  47. SGMII_FM2_DTSEC10,
  48. SGMII_TSEC1,
  49. SGMII_TSEC2,
  50. SGMII_TSEC3,
  51. SGMII_TSEC4,
  52. XAUI_FM1,
  53. XAUI_FM2,
  54. AURORA,
  55. CPRI1,
  56. CPRI2,
  57. CPRI3,
  58. CPRI4,
  59. CPRI5,
  60. CPRI6,
  61. CPRI7,
  62. CPRI8,
  63. XAUI_FM1_MAC9,
  64. XAUI_FM1_MAC10,
  65. XAUI_FM2_MAC9,
  66. XAUI_FM2_MAC10,
  67. HIGIG_FM1_MAC9,
  68. HIGIG_FM1_MAC10,
  69. HIGIG_FM2_MAC9,
  70. HIGIG_FM2_MAC10,
  71. QSGMII_FM1_A, /* A indicates MACs 1-4 */
  72. QSGMII_FM1_B, /* B indicates MACs 5,6,9,10 */
  73. QSGMII_FM2_A,
  74. QSGMII_FM2_B,
  75. XFI_FM1_MAC9,
  76. XFI_FM1_MAC10,
  77. XFI_FM2_MAC9,
  78. XFI_FM2_MAC10,
  79. INTERLAKEN,
  80. };
  81. enum srds {
  82. FSL_SRDS_1 = 0,
  83. FSL_SRDS_2 = 1,
  84. FSL_SRDS_3 = 2,
  85. FSL_SRDS_4 = 3,
  86. };
  87. int is_serdes_configured(enum srds_prtcl device);
  88. void fsl_serdes_init(void);
  89. #ifdef CONFIG_FSL_CORENET
  90. #ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2
  91. int serdes_get_first_lane(u32 sd, enum srds_prtcl device);
  92. #else
  93. int serdes_get_first_lane(enum srds_prtcl device);
  94. #endif
  95. #ifdef CONFIG_SYS_P4080_ERRATUM_SERDES9
  96. void serdes_reset_rx(enum srds_prtcl device);
  97. #endif
  98. #endif
  99. #endif /* __FSL_SERDES_H */