tegra2-seaboard.dts 1.2 KB

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  1. /dts-v1/;
  2. /memreserve/ 0x1c000000 0x04000000;
  3. /include/ ARCH_CPU_DTS
  4. / {
  5. model = "NVIDIA Seaboard";
  6. compatible = "nvidia,seaboard", "nvidia,tegra20";
  7. chosen {
  8. bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk1p3 rw rootwait";
  9. };
  10. aliases {
  11. /* This defines the order of our USB ports */
  12. usb0 = "/usb@c5008000";
  13. usb1 = "/usb@c5000000";
  14. };
  15. memory {
  16. device_type = "memory";
  17. reg = < 0x00000000 0x40000000 >;
  18. };
  19. /* This is not used in U-Boot, but is expected to be in kernel .dts */
  20. i2c@7000d000 {
  21. pmic@34 {
  22. compatible = "ti,tps6586x";
  23. reg = <0x34>;
  24. clk_32k: clock {
  25. compatible = "fixed-clock";
  26. /*
  27. * leave out for now due to CPP:
  28. * #clock-cells = <0>;
  29. */
  30. clock-frequency = <32768>;
  31. };
  32. };
  33. };
  34. clocks {
  35. osc {
  36. clock-frequency = <12000000>;
  37. };
  38. };
  39. clock@60006000 {
  40. clocks = <&clk_32k &osc>;
  41. };
  42. serial@70006300 {
  43. clock-frequency = < 216000000 >;
  44. };
  45. sdhci@c8000400 {
  46. cd-gpios = <&gpio 69 0>; /* gpio PI5 */
  47. wp-gpios = <&gpio 57 0>; /* gpio PH1 */
  48. power-gpios = <&gpio 70 0>; /* gpio PI6 */
  49. };
  50. sdhci@c8000600 {
  51. support-8bit;
  52. };
  53. usb@c5000000 {
  54. nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
  55. dr_mode = "otg";
  56. };
  57. usb@c5004000 {
  58. status = "disabled";
  59. };
  60. };