cpu.c 2.3 KB

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  1. /*
  2. * (C) Copyright 2007
  3. * Sascha Hauer, Pengutronix
  4. *
  5. * (C) Copyright 2009 Freescale Semiconductor, Inc.
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. #include <common.h>
  26. #include <asm/errno.h>
  27. #include <asm/io.h>
  28. #include <asm/arch/imx-regs.h>
  29. #include <asm/arch/clock.h>
  30. #include <asm/arch/sys_proto.h>
  31. #ifdef CONFIG_FSL_ESDHC
  32. #include <fsl_esdhc.h>
  33. #endif
  34. static char *get_reset_cause(void)
  35. {
  36. u32 cause;
  37. struct src *src_regs = (struct src *)SRC_BASE_ADDR;
  38. cause = readl(&src_regs->srsr);
  39. writel(cause, &src_regs->srsr);
  40. switch (cause) {
  41. case 0x00001:
  42. return "POR";
  43. case 0x00004:
  44. return "CSU";
  45. case 0x00008:
  46. return "IPP USER";
  47. case 0x00010:
  48. return "WDOG";
  49. case 0x00020:
  50. return "JTAG HIGH-Z";
  51. case 0x00040:
  52. return "JTAG SW";
  53. case 0x10000:
  54. return "WARM BOOT";
  55. default:
  56. return "unknown reset";
  57. }
  58. }
  59. #if defined(CONFIG_DISPLAY_CPUINFO)
  60. int print_cpuinfo(void)
  61. {
  62. u32 cpurev;
  63. cpurev = get_cpu_rev();
  64. printf("CPU: Freescale i.MX%x family rev%d.%d at %d MHz\n",
  65. (cpurev & 0xFF000) >> 12,
  66. (cpurev & 0x000F0) >> 4,
  67. (cpurev & 0x0000F) >> 0,
  68. mxc_get_clock(MXC_ARM_CLK) / 1000000);
  69. printf("Reset cause: %s\n", get_reset_cause());
  70. return 0;
  71. }
  72. #endif
  73. int cpu_eth_init(bd_t *bis)
  74. {
  75. int rc = -ENODEV;
  76. #if defined(CONFIG_FEC_MXC)
  77. rc = fecmxc_initialize(bis);
  78. #endif
  79. return rc;
  80. }
  81. /*
  82. * Initializes on-chip MMC controllers.
  83. * to override, implement board_mmc_init()
  84. */
  85. int cpu_mmc_init(bd_t *bis)
  86. {
  87. #ifdef CONFIG_FSL_ESDHC
  88. return fsl_esdhc_mmc_init(bis);
  89. #else
  90. return 0;
  91. #endif
  92. }
  93. void reset_cpu(ulong addr)
  94. {
  95. __raw_writew(4, WDOG1_BASE_ADDR);
  96. }