ldpaa_wriop.c 2.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166
  1. /*
  2. * Copyright (C) 2015 Freescale Semiconductor
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <asm/io.h>
  8. #include <asm/types.h>
  9. #include <malloc.h>
  10. #include <net.h>
  11. #include <linux/compat.h>
  12. #include <asm/arch/fsl_serdes.h>
  13. #include <fsl-mc/ldpaa_wriop.h>
  14. struct wriop_dpmac_info dpmac_info[NUM_WRIOP_PORTS];
  15. __weak phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtc)
  16. {
  17. return PHY_INTERFACE_MODE_NONE;
  18. }
  19. void wriop_init_dpmac(int sd, int dpmac_id, int lane_prtcl)
  20. {
  21. phy_interface_t enet_if;
  22. dpmac_info[dpmac_id].enabled = 0;
  23. dpmac_info[dpmac_id].id = 0;
  24. dpmac_info[dpmac_id].phy_addr = -1;
  25. dpmac_info[dpmac_id].enet_if = PHY_INTERFACE_MODE_NONE;
  26. enet_if = wriop_dpmac_enet_if(dpmac_id, lane_prtcl);
  27. if (enet_if != PHY_INTERFACE_MODE_NONE) {
  28. dpmac_info[dpmac_id].enabled = 1;
  29. dpmac_info[dpmac_id].id = dpmac_id;
  30. dpmac_info[dpmac_id].enet_if = enet_if;
  31. }
  32. }
  33. void wriop_init_dpmac_enet_if(int dpmac_id, phy_interface_t enet_if)
  34. {
  35. dpmac_info[dpmac_id].enabled = 1;
  36. dpmac_info[dpmac_id].id = dpmac_id;
  37. dpmac_info[dpmac_id].phy_addr = -1;
  38. dpmac_info[dpmac_id].enet_if = enet_if;
  39. }
  40. /*TODO what it do */
  41. static int wriop_dpmac_to_index(int dpmac_id)
  42. {
  43. int i;
  44. for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) {
  45. if (dpmac_info[i].id == dpmac_id)
  46. return i;
  47. }
  48. return -1;
  49. }
  50. void wriop_disable_dpmac(int dpmac_id)
  51. {
  52. int i = wriop_dpmac_to_index(dpmac_id);
  53. if (i == -1)
  54. return;
  55. dpmac_info[i].enabled = 0;
  56. wriop_dpmac_disable(dpmac_id);
  57. }
  58. void wriop_enable_dpmac(int dpmac_id)
  59. {
  60. int i = wriop_dpmac_to_index(dpmac_id);
  61. if (i == -1)
  62. return;
  63. dpmac_info[i].enabled = 1;
  64. wriop_dpmac_enable(dpmac_id);
  65. }
  66. u8 wriop_is_enabled_dpmac(int dpmac_id)
  67. {
  68. int i = wriop_dpmac_to_index(dpmac_id);
  69. if (i == -1)
  70. return -1;
  71. return dpmac_info[i].enabled;
  72. }
  73. void wriop_set_mdio(int dpmac_id, struct mii_dev *bus)
  74. {
  75. int i = wriop_dpmac_to_index(dpmac_id);
  76. if (i == -1)
  77. return;
  78. dpmac_info[i].bus = bus;
  79. }
  80. struct mii_dev *wriop_get_mdio(int dpmac_id)
  81. {
  82. int i = wriop_dpmac_to_index(dpmac_id);
  83. if (i == -1)
  84. return NULL;
  85. return dpmac_info[i].bus;
  86. }
  87. void wriop_set_phy_address(int dpmac_id, int address)
  88. {
  89. int i = wriop_dpmac_to_index(dpmac_id);
  90. if (i == -1)
  91. return;
  92. dpmac_info[i].phy_addr = address;
  93. }
  94. int wriop_get_phy_address(int dpmac_id)
  95. {
  96. int i = wriop_dpmac_to_index(dpmac_id);
  97. if (i == -1)
  98. return -1;
  99. return dpmac_info[i].phy_addr;
  100. }
  101. void wriop_set_phy_dev(int dpmac_id, struct phy_device *phydev)
  102. {
  103. int i = wriop_dpmac_to_index(dpmac_id);
  104. if (i == -1)
  105. return;
  106. dpmac_info[i].phydev = phydev;
  107. }
  108. struct phy_device *wriop_get_phy_dev(int dpmac_id)
  109. {
  110. int i = wriop_dpmac_to_index(dpmac_id);
  111. if (i == -1)
  112. return NULL;
  113. return dpmac_info[i].phydev;
  114. }
  115. phy_interface_t wriop_get_enet_if(int dpmac_id)
  116. {
  117. int i = wriop_dpmac_to_index(dpmac_id);
  118. if (i == -1)
  119. return PHY_INTERFACE_MODE_NONE;
  120. if (dpmac_info[i].enabled)
  121. return dpmac_info[i].enet_if;
  122. return PHY_INTERFACE_MODE_NONE;
  123. }