sysreset_rk3188.c 1.3 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162
  1. /*
  2. * (C) Copyright 2015 Google, Inc
  3. *
  4. * SPDX-License-Identifier: GPL-2.0
  5. */
  6. #include <common.h>
  7. #include <dm.h>
  8. #include <errno.h>
  9. #include <syscon.h>
  10. #include <sysreset.h>
  11. #include <asm/io.h>
  12. #include <asm/arch/clock.h>
  13. #include <asm/arch/cru_rk3188.h>
  14. #include <asm/arch/grf_rk3188.h>
  15. #include <asm/arch/hardware.h>
  16. #include <linux/err.h>
  17. int rk3188_sysreset_request(struct udevice *dev, enum sysreset_t type)
  18. {
  19. struct rk3188_cru *cru = rockchip_get_cru();
  20. struct rk3188_grf *grf;
  21. if (IS_ERR(cru))
  22. return PTR_ERR(cru);
  23. switch (type) {
  24. case SYSRESET_WARM:
  25. grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
  26. if (IS_ERR(grf))
  27. return -EPROTONOSUPPORT;
  28. /*
  29. * warm-reset keeps the remap value,
  30. * so make sure it's disabled.
  31. */
  32. rk_clrsetreg(&grf->soc_con0,
  33. NOC_REMAP_MASK << NOC_REMAP_SHIFT,
  34. 0 << NOC_REMAP_SHIFT);
  35. rk_clrreg(&cru->cru_mode_con, 0xffff);
  36. writel(0xeca8, &cru->cru_glb_srst_snd_value);
  37. break;
  38. case SYSRESET_COLD:
  39. rk_clrreg(&cru->cru_mode_con, 0xffff);
  40. writel(0xfdb9, &cru->cru_glb_srst_fst_value);
  41. break;
  42. default:
  43. return -EPROTONOSUPPORT;
  44. }
  45. return -EINPROGRESS;
  46. }
  47. static struct sysreset_ops rk3188_sysreset = {
  48. .request = rk3188_sysreset_request,
  49. };
  50. U_BOOT_DRIVER(sysreset_rk3188) = {
  51. .name = "rk3188_sysreset",
  52. .id = UCLASS_SYSRESET,
  53. .ops = &rk3188_sysreset,
  54. };