ohci-s3c24xx.c 45 KB

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  1. /*
  2. * URB OHCI HCD (Host Controller Driver) for USB on the S3C2400.
  3. *
  4. * (C) Copyright 2003
  5. * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
  6. *
  7. * Note: Much of this code has been derived from Linux 2.4
  8. * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  9. * (C) Copyright 2000-2002 David Brownell
  10. *
  11. * SPDX-License-Identifier: GPL-2.0+
  12. */
  13. /*
  14. * IMPORTANT NOTES
  15. * 1 - this driver is intended for use with USB Mass Storage Devices
  16. * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
  17. */
  18. #include <common.h>
  19. /* #include <pci.h> no PCI on the S3C24X0 */
  20. #if defined(CONFIG_USB_OHCI) && defined(CONFIG_S3C24X0)
  21. #include <asm/arch/s3c24x0_cpu.h>
  22. #include <asm/io.h>
  23. #include <malloc.h>
  24. #include <usb.h>
  25. #include "ohci-s3c24xx.h"
  26. #define OHCI_USE_NPS /* force NoPowerSwitching mode */
  27. #undef OHCI_VERBOSE_DEBUG /* not always helpful */
  28. /* For initializing controller (mask in an HCFS mode too) */
  29. #define OHCI_CONTROL_INIT \
  30. (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  31. #define min_t(type, x, y) \
  32. ({ type __x = (x); type __y = (y); __x < __y ? __x : __y; })
  33. #undef DEBUG
  34. #ifdef DEBUG
  35. #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
  36. #else
  37. #define dbg(format, arg...) do {} while(0)
  38. #endif /* DEBUG */
  39. #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
  40. #undef SHOW_INFO
  41. #ifdef SHOW_INFO
  42. #define info(format, arg...) printf("INFO: " format "\n", ## arg)
  43. #else
  44. #define info(format, arg...) do {} while(0)
  45. #endif
  46. #define m16_swap(x) swap_16(x)
  47. #define m32_swap(x) swap_32(x)
  48. /* global struct ohci */
  49. static struct ohci gohci;
  50. /* this must be aligned to a 256 byte boundary */
  51. struct ohci_hcca ghcca[1];
  52. /* a pointer to the aligned storage */
  53. struct ohci_hcca *phcca;
  54. /* this allocates EDs for all possible endpoints */
  55. struct ohci_device ohci_dev;
  56. /* urb_priv */
  57. struct urb_priv urb_priv;
  58. /* RHSC flag */
  59. int got_rhsc;
  60. /* device which was disconnected */
  61. struct usb_device *devgone;
  62. /* flag guarding URB transation */
  63. int urb_finished = 0;
  64. /*-------------------------------------------------------------------------*/
  65. /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
  66. * The erratum (#4) description is incorrect. AMD's workaround waits
  67. * till some bits (mostly reserved) are clear; ok for all revs.
  68. */
  69. #define OHCI_QUIRK_AMD756 0xabcd
  70. #define read_roothub(hc, register, mask) ({ \
  71. u32 temp = readl (&hc->regs->roothub.register); \
  72. if (hc->flags & OHCI_QUIRK_AMD756) \
  73. while (temp & mask) \
  74. temp = readl (&hc->regs->roothub.register); \
  75. temp; })
  76. static u32 roothub_a(struct ohci *hc)
  77. {
  78. return read_roothub(hc, a, 0xfc0fe000);
  79. }
  80. static inline u32 roothub_b(struct ohci *hc)
  81. {
  82. return readl(&hc->regs->roothub.b);
  83. }
  84. static inline u32 roothub_status(struct ohci *hc)
  85. {
  86. return readl(&hc->regs->roothub.status);
  87. }
  88. static u32 roothub_portstatus(struct ohci *hc, int i)
  89. {
  90. return read_roothub(hc, portstatus[i], 0xffe0fce0);
  91. }
  92. /* forward declaration */
  93. static int hc_interrupt(void);
  94. static void td_submit_job(struct usb_device *dev, unsigned long pipe,
  95. void *buffer, int transfer_len,
  96. struct devrequest *setup, struct urb_priv *urb,
  97. int interval);
  98. /*-------------------------------------------------------------------------*
  99. * URB support functions
  100. *-------------------------------------------------------------------------*/
  101. /* free HCD-private data associated with this URB */
  102. static void urb_free_priv(struct urb_priv *urb)
  103. {
  104. int i;
  105. int last;
  106. struct td *td;
  107. last = urb->length - 1;
  108. if (last >= 0) {
  109. for (i = 0; i <= last; i++) {
  110. td = urb->td[i];
  111. if (td) {
  112. td->usb_dev = NULL;
  113. urb->td[i] = NULL;
  114. }
  115. }
  116. }
  117. }
  118. /*-------------------------------------------------------------------------*/
  119. #ifdef DEBUG
  120. static int sohci_get_current_frame_number(struct usb_device *dev);
  121. /* debug| print the main components of an URB
  122. * small: 0) header + data packets 1) just header */
  123. static void pkt_print(struct usb_device *dev, unsigned long pipe, void *buffer,
  124. int transfer_len, struct devrequest *setup, char *str,
  125. int small)
  126. {
  127. struct urb_priv *purb = &urb_priv;
  128. dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
  129. str,
  130. sohci_get_current_frame_number(dev),
  131. usb_pipedevice(pipe),
  132. usb_pipeendpoint(pipe),
  133. usb_pipeout(pipe) ? 'O' : 'I',
  134. usb_pipetype(pipe) < 2 ?
  135. (usb_pipeint(pipe) ? "INTR" : "ISOC") :
  136. (usb_pipecontrol(pipe) ? "CTRL" : "BULK"),
  137. purb->actual_length, transfer_len, dev->status);
  138. #ifdef OHCI_VERBOSE_DEBUG
  139. if (!small) {
  140. int i, len;
  141. if (usb_pipecontrol(pipe)) {
  142. printf(__FILE__ ": cmd(8):");
  143. for (i = 0; i < 8; i++)
  144. printf(" %02x", ((__u8 *) setup)[i]);
  145. printf("\n");
  146. }
  147. if (transfer_len > 0 && buffer) {
  148. printf(__FILE__ ": data(%d/%d):",
  149. purb->actual_length, transfer_len);
  150. len = usb_pipeout(pipe) ?
  151. transfer_len : purb->actual_length;
  152. for (i = 0; i < 16 && i < len; i++)
  153. printf(" %02x", ((__u8 *) buffer)[i]);
  154. printf("%s\n", i < len ? "..." : "");
  155. }
  156. }
  157. #endif
  158. }
  159. /* just for debugging; prints non-empty branches of the
  160. int ed tree inclusive iso eds*/
  161. void ep_print_int_eds(struct ohci *ohci, char *str)
  162. {
  163. int i, j;
  164. __u32 *ed_p;
  165. for (i = 0; i < 32; i++) {
  166. j = 5;
  167. ed_p = &(ohci->hcca->int_table[i]);
  168. if (*ed_p == 0)
  169. continue;
  170. printf(__FILE__ ": %s branch int %2d(%2x):", str, i, i);
  171. while (*ed_p != 0 && j--) {
  172. struct ed *ed = (struct ed *) m32_swap(ed_p);
  173. printf(" ed: %4x;", ed->hwINFO);
  174. ed_p = &ed->hwNextED;
  175. }
  176. printf("\n");
  177. }
  178. }
  179. static void ohci_dump_intr_mask(char *label, __u32 mask)
  180. {
  181. dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
  182. label,
  183. mask,
  184. (mask & OHCI_INTR_MIE) ? " MIE" : "",
  185. (mask & OHCI_INTR_OC) ? " OC" : "",
  186. (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
  187. (mask & OHCI_INTR_FNO) ? " FNO" : "",
  188. (mask & OHCI_INTR_UE) ? " UE" : "",
  189. (mask & OHCI_INTR_RD) ? " RD" : "",
  190. (mask & OHCI_INTR_SF) ? " SF" : "",
  191. (mask & OHCI_INTR_WDH) ? " WDH" : "",
  192. (mask & OHCI_INTR_SO) ? " SO" : "");
  193. }
  194. static void maybe_print_eds(char *label, __u32 value)
  195. {
  196. struct ed *edp = (struct ed *) value;
  197. if (value) {
  198. dbg("%s %08x", label, value);
  199. dbg("%08x", edp->hwINFO);
  200. dbg("%08x", edp->hwTailP);
  201. dbg("%08x", edp->hwHeadP);
  202. dbg("%08x", edp->hwNextED);
  203. }
  204. }
  205. static char *hcfs2string(int state)
  206. {
  207. switch (state) {
  208. case OHCI_USB_RESET:
  209. return "reset";
  210. case OHCI_USB_RESUME:
  211. return "resume";
  212. case OHCI_USB_OPER:
  213. return "operational";
  214. case OHCI_USB_SUSPEND:
  215. return "suspend";
  216. }
  217. return "?";
  218. }
  219. /* dump control and status registers */
  220. static void ohci_dump_status(struct ohci *controller)
  221. {
  222. struct ohci_regs *regs = controller->regs;
  223. __u32 temp;
  224. temp = readl(&regs->revision) & 0xff;
  225. if (temp != 0x10)
  226. dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
  227. temp = readl(&regs->control);
  228. dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
  229. (temp & OHCI_CTRL_RWE) ? " RWE" : "",
  230. (temp & OHCI_CTRL_RWC) ? " RWC" : "",
  231. (temp & OHCI_CTRL_IR) ? " IR" : "",
  232. hcfs2string(temp & OHCI_CTRL_HCFS),
  233. (temp & OHCI_CTRL_BLE) ? " BLE" : "",
  234. (temp & OHCI_CTRL_CLE) ? " CLE" : "",
  235. (temp & OHCI_CTRL_IE) ? " IE" : "",
  236. (temp & OHCI_CTRL_PLE) ? " PLE" : "", temp & OHCI_CTRL_CBSR);
  237. temp = readl(&regs->cmdstatus);
  238. dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
  239. (temp & OHCI_SOC) >> 16,
  240. (temp & OHCI_OCR) ? " OCR" : "",
  241. (temp & OHCI_BLF) ? " BLF" : "",
  242. (temp & OHCI_CLF) ? " CLF" : "", (temp & OHCI_HCR) ? " HCR" : "");
  243. ohci_dump_intr_mask("intrstatus", readl(&regs->intrstatus));
  244. ohci_dump_intr_mask("intrenable", readl(&regs->intrenable));
  245. maybe_print_eds("ed_periodcurrent", readl(&regs->ed_periodcurrent));
  246. maybe_print_eds("ed_controlhead", readl(&regs->ed_controlhead));
  247. maybe_print_eds("ed_controlcurrent", readl(&regs->ed_controlcurrent));
  248. maybe_print_eds("ed_bulkhead", readl(&regs->ed_bulkhead));
  249. maybe_print_eds("ed_bulkcurrent", readl(&regs->ed_bulkcurrent));
  250. maybe_print_eds("donehead", readl(&regs->donehead));
  251. }
  252. static void ohci_dump_roothub(struct ohci *controller, int verbose)
  253. {
  254. __u32 temp, ndp, i;
  255. temp = roothub_a(controller);
  256. ndp = (temp & RH_A_NDP);
  257. if (verbose) {
  258. dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
  259. ((temp & RH_A_POTPGT) >> 24) & 0xff,
  260. (temp & RH_A_NOCP) ? " NOCP" : "",
  261. (temp & RH_A_OCPM) ? " OCPM" : "",
  262. (temp & RH_A_DT) ? " DT" : "",
  263. (temp & RH_A_NPS) ? " NPS" : "",
  264. (temp & RH_A_PSM) ? " PSM" : "", ndp);
  265. temp = roothub_b(controller);
  266. dbg("roothub.b: %08x PPCM=%04x DR=%04x",
  267. temp, (temp & RH_B_PPCM) >> 16, (temp & RH_B_DR)
  268. );
  269. temp = roothub_status(controller);
  270. dbg("roothub.status: %08x%s%s%s%s%s%s",
  271. temp,
  272. (temp & RH_HS_CRWE) ? " CRWE" : "",
  273. (temp & RH_HS_OCIC) ? " OCIC" : "",
  274. (temp & RH_HS_LPSC) ? " LPSC" : "",
  275. (temp & RH_HS_DRWE) ? " DRWE" : "",
  276. (temp & RH_HS_OCI) ? " OCI" : "",
  277. (temp & RH_HS_LPS) ? " LPS" : "");
  278. }
  279. for (i = 0; i < ndp; i++) {
  280. temp = roothub_portstatus(controller, i);
  281. dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
  282. i,
  283. temp,
  284. (temp & RH_PS_PRSC) ? " PRSC" : "",
  285. (temp & RH_PS_OCIC) ? " OCIC" : "",
  286. (temp & RH_PS_PSSC) ? " PSSC" : "",
  287. (temp & RH_PS_PESC) ? " PESC" : "",
  288. (temp & RH_PS_CSC) ? " CSC" : "",
  289. (temp & RH_PS_LSDA) ? " LSDA" : "",
  290. (temp & RH_PS_PPS) ? " PPS" : "",
  291. (temp & RH_PS_PRS) ? " PRS" : "",
  292. (temp & RH_PS_POCI) ? " POCI" : "",
  293. (temp & RH_PS_PSS) ? " PSS" : "",
  294. (temp & RH_PS_PES) ? " PES" : "",
  295. (temp & RH_PS_CCS) ? " CCS" : "");
  296. }
  297. }
  298. static void ohci_dump(struct ohci *controller, int verbose)
  299. {
  300. dbg("OHCI controller usb-%s state", controller->slot_name);
  301. /* dumps some of the state we know about */
  302. ohci_dump_status(controller);
  303. if (verbose)
  304. ep_print_int_eds(controller, "hcca");
  305. dbg("hcca frame #%04x", controller->hcca->frame_no);
  306. ohci_dump_roothub(controller, 1);
  307. }
  308. #endif /* DEBUG */
  309. /*-------------------------------------------------------------------------*
  310. * Interface functions (URB)
  311. *-------------------------------------------------------------------------*/
  312. /* get a transfer request */
  313. int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
  314. int transfer_len, struct devrequest *setup, int interval)
  315. {
  316. struct ohci *ohci;
  317. struct ed *ed;
  318. struct urb_priv *purb_priv;
  319. int i, size = 0;
  320. ohci = &gohci;
  321. /* when controller's hung, permit only roothub cleanup attempts
  322. * such as powering down ports */
  323. if (ohci->disabled) {
  324. err("sohci_submit_job: EPIPE");
  325. return -1;
  326. }
  327. /* if we have an unfinished URB from previous transaction let's
  328. * fail and scream as quickly as possible so as not to corrupt
  329. * further communication */
  330. if (!urb_finished) {
  331. err("sohci_submit_job: URB NOT FINISHED");
  332. return -1;
  333. }
  334. /* we're about to begin a new transaction here
  335. so mark the URB unfinished */
  336. urb_finished = 0;
  337. /* every endpoint has a ed, locate and fill it */
  338. ed = ep_add_ed(dev, pipe);
  339. if (!ed) {
  340. err("sohci_submit_job: ENOMEM");
  341. return -1;
  342. }
  343. /* for the private part of the URB we need the number of TDs (size) */
  344. switch (usb_pipetype(pipe)) {
  345. case PIPE_BULK:
  346. /* one TD for every 4096 Byte */
  347. size = (transfer_len - 1) / 4096 + 1;
  348. break;
  349. case PIPE_CONTROL:
  350. /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
  351. size = (transfer_len == 0) ? 2 : (transfer_len - 1) / 4096 + 3;
  352. break;
  353. }
  354. if (size >= (N_URB_TD - 1)) {
  355. err("need %d TDs, only have %d", size, N_URB_TD);
  356. return -1;
  357. }
  358. purb_priv = &urb_priv;
  359. purb_priv->pipe = pipe;
  360. /* fill the private part of the URB */
  361. purb_priv->length = size;
  362. purb_priv->ed = ed;
  363. purb_priv->actual_length = 0;
  364. /* allocate the TDs */
  365. /* note that td[0] was allocated in ep_add_ed */
  366. for (i = 0; i < size; i++) {
  367. purb_priv->td[i] = td_alloc(dev);
  368. if (!purb_priv->td[i]) {
  369. purb_priv->length = i;
  370. urb_free_priv(purb_priv);
  371. err("sohci_submit_job: ENOMEM");
  372. return -1;
  373. }
  374. }
  375. if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
  376. urb_free_priv(purb_priv);
  377. err("sohci_submit_job: EINVAL");
  378. return -1;
  379. }
  380. /* link the ed into a chain if is not already */
  381. if (ed->state != ED_OPER)
  382. ep_link(ohci, ed);
  383. /* fill the TDs and link it to the ed */
  384. td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv,
  385. interval);
  386. return 0;
  387. }
  388. /*-------------------------------------------------------------------------*/
  389. #ifdef DEBUG
  390. /* tell us the current USB frame number */
  391. static int sohci_get_current_frame_number(struct usb_device *usb_dev)
  392. {
  393. struct ohci *ohci = &gohci;
  394. return m16_swap(ohci->hcca->frame_no);
  395. }
  396. #endif
  397. /*-------------------------------------------------------------------------*
  398. * ED handling functions
  399. *-------------------------------------------------------------------------*/
  400. /* link an ed into one of the HC chains */
  401. static int ep_link(struct ohci *ohci, struct ed *edi)
  402. {
  403. struct ed *ed = edi;
  404. ed->state = ED_OPER;
  405. switch (ed->type) {
  406. case PIPE_CONTROL:
  407. ed->hwNextED = 0;
  408. if (ohci->ed_controltail == NULL) {
  409. writel((u32)ed, &ohci->regs->ed_controlhead);
  410. } else {
  411. ohci->ed_controltail->hwNextED = (__u32) m32_swap(ed);
  412. }
  413. ed->ed_prev = ohci->ed_controltail;
  414. if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
  415. !ohci->ed_rm_list[1] && !ohci->sleeping) {
  416. ohci->hc_control |= OHCI_CTRL_CLE;
  417. writel(ohci->hc_control, &ohci->regs->control);
  418. }
  419. ohci->ed_controltail = edi;
  420. break;
  421. case PIPE_BULK:
  422. ed->hwNextED = 0;
  423. if (ohci->ed_bulktail == NULL) {
  424. writel((u32)ed, &ohci->regs->ed_bulkhead);
  425. } else {
  426. ohci->ed_bulktail->hwNextED = (__u32) m32_swap(ed);
  427. }
  428. ed->ed_prev = ohci->ed_bulktail;
  429. if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
  430. !ohci->ed_rm_list[1] && !ohci->sleeping) {
  431. ohci->hc_control |= OHCI_CTRL_BLE;
  432. writel(ohci->hc_control, &ohci->regs->control);
  433. }
  434. ohci->ed_bulktail = edi;
  435. break;
  436. }
  437. return 0;
  438. }
  439. /*-------------------------------------------------------------------------*/
  440. /* unlink an ed from one of the HC chains.
  441. * just the link to the ed is unlinked.
  442. * the link from the ed still points to another operational ed or 0
  443. * so the HC can eventually finish the processing of the unlinked ed */
  444. static int ep_unlink(struct ohci *ohci, struct ed *ed)
  445. {
  446. struct ed *next;
  447. ed->hwINFO |= m32_swap(OHCI_ED_SKIP);
  448. switch (ed->type) {
  449. case PIPE_CONTROL:
  450. if (ed->ed_prev == NULL) {
  451. if (!ed->hwNextED) {
  452. ohci->hc_control &= ~OHCI_CTRL_CLE;
  453. writel(ohci->hc_control, &ohci->regs->control);
  454. }
  455. writel(m32_swap(*((__u32 *) &ed->hwNextED)),
  456. &ohci->regs->ed_controlhead);
  457. } else {
  458. ed->ed_prev->hwNextED = ed->hwNextED;
  459. }
  460. if (ohci->ed_controltail == ed) {
  461. ohci->ed_controltail = ed->ed_prev;
  462. } else {
  463. next = (struct ed *)m32_swap(*((__u32 *)&ed->hwNextED));
  464. next->ed_prev = ed->ed_prev;
  465. }
  466. break;
  467. case PIPE_BULK:
  468. if (ed->ed_prev == NULL) {
  469. if (!ed->hwNextED) {
  470. ohci->hc_control &= ~OHCI_CTRL_BLE;
  471. writel(ohci->hc_control, &ohci->regs->control);
  472. }
  473. writel(m32_swap(*((__u32 *) &ed->hwNextED)),
  474. &ohci->regs->ed_bulkhead);
  475. } else {
  476. ed->ed_prev->hwNextED = ed->hwNextED;
  477. }
  478. if (ohci->ed_bulktail == ed) {
  479. ohci->ed_bulktail = ed->ed_prev;
  480. } else {
  481. next = (struct ed *)m32_swap(*((__u32 *)&ed->hwNextED));
  482. next->ed_prev = ed->ed_prev;
  483. }
  484. break;
  485. }
  486. ed->state = ED_UNLINK;
  487. return 0;
  488. }
  489. /*-------------------------------------------------------------------------*/
  490. /* add/reinit an endpoint; this should be done once at the usb_set_configuration
  491. * command, but the USB stack is a little bit stateless so we do it at every
  492. * transaction. If the state of the ed is ED_NEW then a dummy td is added and
  493. * the state is changed to ED_UNLINK. In all other cases the state is left
  494. * unchanged. The ed info fields are setted anyway even though most of them
  495. * should not change */
  496. static struct ed *ep_add_ed(struct usb_device *usb_dev, unsigned long pipe)
  497. {
  498. struct td *td;
  499. struct ed *ed_ret;
  500. struct ed *ed;
  501. ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint(pipe) << 1) |
  502. (usb_pipecontrol(pipe) ? 0 :
  503. usb_pipeout(pipe))];
  504. if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
  505. err("ep_add_ed: pending delete");
  506. /* pending delete request */
  507. return NULL;
  508. }
  509. if (ed->state == ED_NEW) {
  510. ed->hwINFO = m32_swap(OHCI_ED_SKIP); /* skip ed */
  511. /* dummy td; end of td list for ed */
  512. td = td_alloc(usb_dev);
  513. ed->hwTailP = (__u32) m32_swap(td);
  514. ed->hwHeadP = ed->hwTailP;
  515. ed->state = ED_UNLINK;
  516. ed->type = usb_pipetype(pipe);
  517. ohci_dev.ed_cnt++;
  518. }
  519. ed->hwINFO = m32_swap(usb_pipedevice(pipe)
  520. | usb_pipeendpoint(pipe) << 7
  521. | (usb_pipeisoc(pipe) ? 0x8000 : 0)
  522. | (usb_pipecontrol(pipe) ? 0 :
  523. (usb_pipeout(pipe) ? 0x800 : 0x1000))
  524. | (usb_dev->speed == USB_SPEED_LOW) << 13 |
  525. usb_maxpacket(usb_dev, pipe) << 16);
  526. return ed_ret;
  527. }
  528. /*-------------------------------------------------------------------------*
  529. * TD handling functions
  530. *-------------------------------------------------------------------------*/
  531. /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
  532. static void td_fill(struct ohci *ohci, unsigned int info, void *data, int len,
  533. struct usb_device *dev, int index,
  534. struct urb_priv *urb_priv)
  535. {
  536. struct td *td, *td_pt;
  537. #ifdef OHCI_FILL_TRACE
  538. int i;
  539. #endif
  540. if (index > urb_priv->length) {
  541. err("index > length");
  542. return;
  543. }
  544. /* use this td as the next dummy */
  545. td_pt = urb_priv->td[index];
  546. td_pt->hwNextTD = 0;
  547. /* fill the old dummy TD */
  548. td = urb_priv->td[index] =
  549. (struct td *) (m32_swap(urb_priv->ed->hwTailP) & ~0xf);
  550. td->ed = urb_priv->ed;
  551. td->next_dl_td = NULL;
  552. td->index = index;
  553. td->data = (__u32) data;
  554. #ifdef OHCI_FILL_TRACE
  555. if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
  556. for (i = 0; i < len; i++)
  557. printf("td->data[%d] %#2x ", i,
  558. ((unsigned char *)td->data)[i]);
  559. printf("\n");
  560. }
  561. #endif
  562. if (!len)
  563. data = 0;
  564. td->hwINFO = (__u32) m32_swap(info);
  565. td->hwCBP = (__u32) m32_swap(data);
  566. if (data)
  567. td->hwBE = (__u32) m32_swap(data + len - 1);
  568. else
  569. td->hwBE = 0;
  570. td->hwNextTD = (__u32) m32_swap(td_pt);
  571. /* append to queue */
  572. td->ed->hwTailP = td->hwNextTD;
  573. }
  574. /*-------------------------------------------------------------------------*/
  575. /* prepare all TDs of a transfer */
  576. static void td_submit_job(struct usb_device *dev, unsigned long pipe,
  577. void *buffer, int transfer_len,
  578. struct devrequest *setup, struct urb_priv *urb,
  579. int interval)
  580. {
  581. struct ohci *ohci = &gohci;
  582. int data_len = transfer_len;
  583. void *data;
  584. int cnt = 0;
  585. __u32 info = 0;
  586. unsigned int toggle = 0;
  587. /* OHCI handles the DATA-toggles itself, we just
  588. use the USB-toggle bits for reseting */
  589. if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
  590. toggle = TD_T_TOGGLE;
  591. } else {
  592. toggle = TD_T_DATA0;
  593. usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe),
  594. 1);
  595. }
  596. urb->td_cnt = 0;
  597. if (data_len)
  598. data = buffer;
  599. else
  600. data = 0;
  601. switch (usb_pipetype(pipe)) {
  602. case PIPE_BULK:
  603. info = usb_pipeout(pipe) ? TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN;
  604. while (data_len > 4096) {
  605. td_fill(ohci, info | (cnt ? TD_T_TOGGLE : toggle), data,
  606. 4096, dev, cnt, urb);
  607. data += 4096;
  608. data_len -= 4096;
  609. cnt++;
  610. }
  611. info = usb_pipeout(pipe) ?
  612. TD_CC | TD_DP_OUT :
  613. TD_CC | TD_R | TD_DP_IN;
  614. td_fill(ohci, info | (cnt ? TD_T_TOGGLE : toggle), data,
  615. data_len, dev, cnt, urb);
  616. cnt++;
  617. if (!ohci->sleeping)
  618. /* start bulk list */
  619. writel(OHCI_BLF, &ohci->regs->cmdstatus);
  620. break;
  621. case PIPE_CONTROL:
  622. info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
  623. td_fill(ohci, info, setup, 8, dev, cnt++, urb);
  624. if (data_len > 0) {
  625. info = usb_pipeout(pipe) ?
  626. TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 :
  627. TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
  628. /* NOTE: mishandles transfers >8K, some >4K */
  629. td_fill(ohci, info, data, data_len, dev, cnt++, urb);
  630. }
  631. info = usb_pipeout(pipe) ?
  632. TD_CC | TD_DP_IN | TD_T_DATA1 :
  633. TD_CC | TD_DP_OUT | TD_T_DATA1;
  634. td_fill(ohci, info, data, 0, dev, cnt++, urb);
  635. if (!ohci->sleeping)
  636. /* start Control list */
  637. writel(OHCI_CLF, &ohci->regs->cmdstatus);
  638. break;
  639. }
  640. if (urb->length != cnt)
  641. dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
  642. }
  643. /*-------------------------------------------------------------------------*
  644. * Done List handling functions
  645. *-------------------------------------------------------------------------*/
  646. /* calculate the transfer length and update the urb */
  647. static void dl_transfer_length(struct td *td)
  648. {
  649. __u32 tdBE, tdCBP;
  650. struct urb_priv *lurb_priv = &urb_priv;
  651. tdBE = m32_swap(td->hwBE);
  652. tdCBP = m32_swap(td->hwCBP);
  653. if (!(usb_pipecontrol(lurb_priv->pipe) &&
  654. ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
  655. if (tdBE != 0) {
  656. if (td->hwCBP == 0)
  657. lurb_priv->actual_length += tdBE - td->data + 1;
  658. else
  659. lurb_priv->actual_length += tdCBP - td->data;
  660. }
  661. }
  662. }
  663. /*-------------------------------------------------------------------------*/
  664. /* replies to the request have to be on a FIFO basis so
  665. * we reverse the reversed done-list */
  666. static struct td *dl_reverse_done_list(struct ohci *ohci)
  667. {
  668. __u32 td_list_hc;
  669. __u32 tmp;
  670. struct td *td_rev = NULL;
  671. struct td *td_list = NULL;
  672. struct urb_priv *lurb_priv = NULL;
  673. td_list_hc = m32_swap(ohci->hcca->done_head) & 0xfffffff0;
  674. ohci->hcca->done_head = 0;
  675. while (td_list_hc) {
  676. td_list = (struct td *) td_list_hc;
  677. if (TD_CC_GET(m32_swap(td_list->hwINFO))) {
  678. lurb_priv = &urb_priv;
  679. dbg(" USB-error/status: %x : %p",
  680. TD_CC_GET(m32_swap(td_list->hwINFO)), td_list);
  681. if (td_list->ed->hwHeadP & m32_swap(0x1)) {
  682. if (lurb_priv &&
  683. ((td_list->index+1) < lurb_priv->length)) {
  684. tmp = lurb_priv->length - 1;
  685. td_list->ed->hwHeadP =
  686. (lurb_priv->td[tmp]->hwNextTD &
  687. m32_swap(0xfffffff0)) |
  688. (td_list->ed->hwHeadP &
  689. m32_swap(0x2));
  690. lurb_priv->td_cnt += lurb_priv->length -
  691. td_list->index - 1;
  692. } else
  693. td_list->ed->hwHeadP &=
  694. m32_swap(0xfffffff2);
  695. }
  696. }
  697. td_list->next_dl_td = td_rev;
  698. td_rev = td_list;
  699. td_list_hc = m32_swap(td_list->hwNextTD) & 0xfffffff0;
  700. }
  701. return td_list;
  702. }
  703. /*-------------------------------------------------------------------------*/
  704. /* td done list */
  705. static int dl_done_list(struct ohci *ohci, struct td *td_list)
  706. {
  707. struct td *td_list_next = NULL;
  708. struct ed *ed;
  709. int cc = 0;
  710. int stat = 0;
  711. /* urb_t *urb; */
  712. struct urb_priv *lurb_priv;
  713. __u32 tdINFO, edHeadP, edTailP;
  714. while (td_list) {
  715. td_list_next = td_list->next_dl_td;
  716. lurb_priv = &urb_priv;
  717. tdINFO = m32_swap(td_list->hwINFO);
  718. ed = td_list->ed;
  719. dl_transfer_length(td_list);
  720. /* error code of transfer */
  721. cc = TD_CC_GET(tdINFO);
  722. if (cc != 0) {
  723. dbg("ConditionCode %#x", cc);
  724. stat = cc_to_error[cc];
  725. }
  726. /* see if this done list makes for all TD's of current URB,
  727. * and mark the URB finished if so */
  728. if (++(lurb_priv->td_cnt) == lurb_priv->length) {
  729. if ((ed->state & (ED_OPER | ED_UNLINK)))
  730. urb_finished = 1;
  731. else
  732. dbg("dl_done_list: strange.., ED state %x, "
  733. "ed->state\n");
  734. } else
  735. dbg("dl_done_list: processing TD %x, len %x\n",
  736. lurb_priv->td_cnt, lurb_priv->length);
  737. if (ed->state != ED_NEW) {
  738. edHeadP = m32_swap(ed->hwHeadP) & 0xfffffff0;
  739. edTailP = m32_swap(ed->hwTailP);
  740. /* unlink eds if they are not busy */
  741. if ((edHeadP == edTailP) && (ed->state == ED_OPER))
  742. ep_unlink(ohci, ed);
  743. }
  744. td_list = td_list_next;
  745. }
  746. return stat;
  747. }
  748. /*-------------------------------------------------------------------------*
  749. * Virtual Root Hub
  750. *-------------------------------------------------------------------------*/
  751. /* Device descriptor */
  752. static __u8 root_hub_dev_des[] = {
  753. 0x12, /* __u8 bLength; */
  754. 0x01, /* __u8 bDescriptorType; Device */
  755. 0x10, /* __u16 bcdUSB; v1.1 */
  756. 0x01,
  757. 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
  758. 0x00, /* __u8 bDeviceSubClass; */
  759. 0x00, /* __u8 bDeviceProtocol; */
  760. 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
  761. 0x00, /* __u16 idVendor; */
  762. 0x00,
  763. 0x00, /* __u16 idProduct; */
  764. 0x00,
  765. 0x00, /* __u16 bcdDevice; */
  766. 0x00,
  767. 0x00, /* __u8 iManufacturer; */
  768. 0x01, /* __u8 iProduct; */
  769. 0x00, /* __u8 iSerialNumber; */
  770. 0x01 /* __u8 bNumConfigurations; */
  771. };
  772. /* Configuration descriptor */
  773. static __u8 root_hub_config_des[] = {
  774. 0x09, /* __u8 bLength; */
  775. 0x02, /* __u8 bDescriptorType; Configuration */
  776. 0x19, /* __u16 wTotalLength; */
  777. 0x00,
  778. 0x01, /* __u8 bNumInterfaces; */
  779. 0x01, /* __u8 bConfigurationValue; */
  780. 0x00, /* __u8 iConfiguration; */
  781. 0x40, /* __u8 bmAttributes;
  782. Bit 7: Bus-powered, 6: Self-powered,
  783. 5 Remote-wakwup, 4..0: resvd */
  784. 0x00, /* __u8 MaxPower; */
  785. /* interface */
  786. 0x09, /* __u8 if_bLength; */
  787. 0x04, /* __u8 if_bDescriptorType; Interface */
  788. 0x00, /* __u8 if_bInterfaceNumber; */
  789. 0x00, /* __u8 if_bAlternateSetting; */
  790. 0x01, /* __u8 if_bNumEndpoints; */
  791. 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
  792. 0x00, /* __u8 if_bInterfaceSubClass; */
  793. 0x00, /* __u8 if_bInterfaceProtocol; */
  794. 0x00, /* __u8 if_iInterface; */
  795. /* endpoint */
  796. 0x07, /* __u8 ep_bLength; */
  797. 0x05, /* __u8 ep_bDescriptorType; Endpoint */
  798. 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
  799. 0x03, /* __u8 ep_bmAttributes; Interrupt */
  800. 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
  801. 0x00,
  802. 0xff /* __u8 ep_bInterval; 255 ms */
  803. };
  804. static unsigned char root_hub_str_index0[] = {
  805. 0x04, /* __u8 bLength; */
  806. 0x03, /* __u8 bDescriptorType; String-descriptor */
  807. 0x09, /* __u8 lang ID */
  808. 0x04, /* __u8 lang ID */
  809. };
  810. static unsigned char root_hub_str_index1[] = {
  811. 28, /* __u8 bLength; */
  812. 0x03, /* __u8 bDescriptorType; String-descriptor */
  813. 'O', /* __u8 Unicode */
  814. 0, /* __u8 Unicode */
  815. 'H', /* __u8 Unicode */
  816. 0, /* __u8 Unicode */
  817. 'C', /* __u8 Unicode */
  818. 0, /* __u8 Unicode */
  819. 'I', /* __u8 Unicode */
  820. 0, /* __u8 Unicode */
  821. ' ', /* __u8 Unicode */
  822. 0, /* __u8 Unicode */
  823. 'R', /* __u8 Unicode */
  824. 0, /* __u8 Unicode */
  825. 'o', /* __u8 Unicode */
  826. 0, /* __u8 Unicode */
  827. 'o', /* __u8 Unicode */
  828. 0, /* __u8 Unicode */
  829. 't', /* __u8 Unicode */
  830. 0, /* __u8 Unicode */
  831. ' ', /* __u8 Unicode */
  832. 0, /* __u8 Unicode */
  833. 'H', /* __u8 Unicode */
  834. 0, /* __u8 Unicode */
  835. 'u', /* __u8 Unicode */
  836. 0, /* __u8 Unicode */
  837. 'b', /* __u8 Unicode */
  838. 0, /* __u8 Unicode */
  839. };
  840. /* Hub class-specific descriptor is constructed dynamically */
  841. /*-------------------------------------------------------------------------*/
  842. #define OK(x) len = (x); break
  843. #ifdef DEBUG
  844. #define WR_RH_STAT(x) \
  845. { \
  846. info("WR:status %#8x", (x)); \
  847. writel((x), &gohci.regs->roothub.status); \
  848. }
  849. #define WR_RH_PORTSTAT(x) \
  850. { \
  851. info("WR:portstatus[%d] %#8x", wIndex-1, (x)); \
  852. writel((x), &gohci.regs->roothub.portstatus[wIndex-1]); \
  853. }
  854. #else
  855. #define WR_RH_STAT(x) \
  856. writel((x), &gohci.regs->roothub.status)
  857. #define WR_RH_PORTSTAT(x)\
  858. writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
  859. #endif
  860. #define RD_RH_STAT roothub_status(&gohci)
  861. #define RD_RH_PORTSTAT roothub_portstatus(&gohci, wIndex-1)
  862. /* request to virtual root hub */
  863. int rh_check_port_status(struct ohci *controller)
  864. {
  865. __u32 temp, ndp, i;
  866. int res;
  867. res = -1;
  868. temp = roothub_a(controller);
  869. ndp = (temp & RH_A_NDP);
  870. for (i = 0; i < ndp; i++) {
  871. temp = roothub_portstatus(controller, i);
  872. /* check for a device disconnect */
  873. if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
  874. (RH_PS_PESC | RH_PS_CSC)) && ((temp & RH_PS_CCS) == 0)) {
  875. res = i;
  876. break;
  877. }
  878. }
  879. return res;
  880. }
  881. static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
  882. void *buffer, int transfer_len,
  883. struct devrequest *cmd)
  884. {
  885. void *data = buffer;
  886. int leni = transfer_len;
  887. int len = 0;
  888. int stat = 0;
  889. union {
  890. __u32 word[4];
  891. __u16 hword[8];
  892. __u8 byte[16];
  893. } datab;
  894. __u8 *data_buf = datab.byte;
  895. __u16 bmRType_bReq;
  896. __u16 wValue;
  897. __u16 wIndex;
  898. __u16 wLength;
  899. #ifdef DEBUG
  900. urb_priv.actual_length = 0;
  901. pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)",
  902. usb_pipein(pipe));
  903. #else
  904. mdelay(1);
  905. #endif
  906. if (usb_pipeint(pipe)) {
  907. info("Root-Hub submit IRQ: NOT implemented");
  908. return 0;
  909. }
  910. bmRType_bReq = cmd->requesttype | (cmd->request << 8);
  911. wValue = m16_swap(cmd->value);
  912. wIndex = m16_swap(cmd->index);
  913. wLength = m16_swap(cmd->length);
  914. info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
  915. dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
  916. switch (bmRType_bReq) {
  917. /* Request Destination:
  918. without flags: Device,
  919. RH_INTERFACE: interface,
  920. RH_ENDPOINT: endpoint,
  921. RH_CLASS means HUB here,
  922. RH_OTHER | RH_CLASS almost ever means HUB_PORT here
  923. */
  924. case RH_GET_STATUS:
  925. datab.hword[0] = m16_swap(1);
  926. OK(2);
  927. case RH_GET_STATUS | RH_INTERFACE:
  928. datab.hword[0] = m16_swap(0);
  929. OK(2);
  930. case RH_GET_STATUS | RH_ENDPOINT:
  931. datab.hword[0] = m16_swap(0);
  932. OK(2);
  933. case RH_GET_STATUS | RH_CLASS:
  934. datab.word[0] =
  935. m32_swap(RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
  936. OK(4);
  937. case RH_GET_STATUS | RH_OTHER | RH_CLASS:
  938. datab.word[0] = m32_swap(RD_RH_PORTSTAT);
  939. OK(4);
  940. case RH_CLEAR_FEATURE | RH_ENDPOINT:
  941. switch (wValue) {
  942. case (RH_ENDPOINT_STALL):
  943. OK(0);
  944. }
  945. break;
  946. case RH_CLEAR_FEATURE | RH_CLASS:
  947. switch (wValue) {
  948. case RH_C_HUB_LOCAL_POWER:
  949. OK(0);
  950. case (RH_C_HUB_OVER_CURRENT):
  951. WR_RH_STAT(RH_HS_OCIC);
  952. OK(0);
  953. }
  954. break;
  955. case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
  956. switch (wValue) {
  957. case (RH_PORT_ENABLE):
  958. WR_RH_PORTSTAT(RH_PS_CCS);
  959. OK(0);
  960. case (RH_PORT_SUSPEND):
  961. WR_RH_PORTSTAT(RH_PS_POCI);
  962. OK(0);
  963. case (RH_PORT_POWER):
  964. WR_RH_PORTSTAT(RH_PS_LSDA);
  965. OK(0);
  966. case (RH_C_PORT_CONNECTION):
  967. WR_RH_PORTSTAT(RH_PS_CSC);
  968. OK(0);
  969. case (RH_C_PORT_ENABLE):
  970. WR_RH_PORTSTAT(RH_PS_PESC);
  971. OK(0);
  972. case (RH_C_PORT_SUSPEND):
  973. WR_RH_PORTSTAT(RH_PS_PSSC);
  974. OK(0);
  975. case (RH_C_PORT_OVER_CURRENT):
  976. WR_RH_PORTSTAT(RH_PS_OCIC);
  977. OK(0);
  978. case (RH_C_PORT_RESET):
  979. WR_RH_PORTSTAT(RH_PS_PRSC);
  980. OK(0);
  981. }
  982. break;
  983. case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
  984. switch (wValue) {
  985. case (RH_PORT_SUSPEND):
  986. WR_RH_PORTSTAT(RH_PS_PSS);
  987. OK(0);
  988. case (RH_PORT_RESET): /* BUG IN HUP CODE ******** */
  989. if (RD_RH_PORTSTAT & RH_PS_CCS)
  990. WR_RH_PORTSTAT(RH_PS_PRS);
  991. OK(0);
  992. case (RH_PORT_POWER):
  993. WR_RH_PORTSTAT(RH_PS_PPS);
  994. OK(0);
  995. case (RH_PORT_ENABLE): /* BUG IN HUP CODE ******** */
  996. if (RD_RH_PORTSTAT & RH_PS_CCS)
  997. WR_RH_PORTSTAT(RH_PS_PES);
  998. OK(0);
  999. }
  1000. break;
  1001. case RH_SET_ADDRESS:
  1002. gohci.rh.devnum = wValue;
  1003. OK(0);
  1004. case RH_GET_DESCRIPTOR:
  1005. switch ((wValue & 0xff00) >> 8) {
  1006. case (0x01): /* device descriptor */
  1007. len = min_t(unsigned int,
  1008. leni,
  1009. min_t(unsigned int,
  1010. sizeof(root_hub_dev_des), wLength));
  1011. data_buf = root_hub_dev_des;
  1012. OK(len);
  1013. case (0x02): /* configuration descriptor */
  1014. len = min_t(unsigned int,
  1015. leni,
  1016. min_t(unsigned int,
  1017. sizeof(root_hub_config_des),
  1018. wLength));
  1019. data_buf = root_hub_config_des;
  1020. OK(len);
  1021. case (0x03): /* string descriptors */
  1022. if (wValue == 0x0300) {
  1023. len = min_t(unsigned int,
  1024. leni,
  1025. min_t(unsigned int,
  1026. sizeof(root_hub_str_index0),
  1027. wLength));
  1028. data_buf = root_hub_str_index0;
  1029. OK(len);
  1030. }
  1031. if (wValue == 0x0301) {
  1032. len = min_t(unsigned int,
  1033. leni,
  1034. min_t(unsigned int,
  1035. sizeof(root_hub_str_index1),
  1036. wLength));
  1037. data_buf = root_hub_str_index1;
  1038. OK(len);
  1039. }
  1040. default:
  1041. stat = USB_ST_STALLED;
  1042. }
  1043. break;
  1044. case RH_GET_DESCRIPTOR | RH_CLASS:
  1045. {
  1046. __u32 temp = roothub_a(&gohci);
  1047. data_buf[0] = 9; /* min length; */
  1048. data_buf[1] = 0x29;
  1049. data_buf[2] = temp & RH_A_NDP;
  1050. data_buf[3] = 0;
  1051. if (temp & RH_A_PSM)
  1052. /* per-port power switching? */
  1053. data_buf[3] |= 0x1;
  1054. if (temp & RH_A_NOCP)
  1055. /* no overcurrent reporting? */
  1056. data_buf[3] |= 0x10;
  1057. else if (temp & RH_A_OCPM)
  1058. /* per-port overcurrent reporting? */
  1059. data_buf[3] |= 0x8;
  1060. /* corresponds to data_buf[4-7] */
  1061. datab.word[1] = 0;
  1062. data_buf[5] = (temp & RH_A_POTPGT) >> 24;
  1063. temp = roothub_b(&gohci);
  1064. data_buf[7] = temp & RH_B_DR;
  1065. if (data_buf[2] < 7) {
  1066. data_buf[8] = 0xff;
  1067. } else {
  1068. data_buf[0] += 2;
  1069. data_buf[8] = (temp & RH_B_DR) >> 8;
  1070. data_buf[10] = data_buf[9] = 0xff;
  1071. }
  1072. len = min_t(unsigned int, leni,
  1073. min_t(unsigned int, data_buf[0], wLength));
  1074. OK(len);
  1075. }
  1076. case RH_GET_CONFIGURATION:
  1077. *(__u8 *) data_buf = 0x01;
  1078. OK(1);
  1079. case RH_SET_CONFIGURATION:
  1080. WR_RH_STAT(0x10000);
  1081. OK(0);
  1082. default:
  1083. dbg("unsupported root hub command");
  1084. stat = USB_ST_STALLED;
  1085. }
  1086. #ifdef DEBUG
  1087. ohci_dump_roothub(&gohci, 1);
  1088. #else
  1089. mdelay(1);
  1090. #endif
  1091. len = min_t(int, len, leni);
  1092. if (data != data_buf)
  1093. memcpy(data, data_buf, len);
  1094. dev->act_len = len;
  1095. dev->status = stat;
  1096. #ifdef DEBUG
  1097. if (transfer_len)
  1098. urb_priv.actual_length = transfer_len;
  1099. pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)",
  1100. 0 /*usb_pipein(pipe) */);
  1101. #else
  1102. mdelay(1);
  1103. #endif
  1104. return stat;
  1105. }
  1106. /*-------------------------------------------------------------------------*/
  1107. /* common code for handling submit messages - used for all but root hub */
  1108. /* accesses. */
  1109. int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1110. int transfer_len, struct devrequest *setup, int interval)
  1111. {
  1112. int stat = 0;
  1113. int maxsize = usb_maxpacket(dev, pipe);
  1114. int timeout;
  1115. /* device pulled? Shortcut the action. */
  1116. if (devgone == dev) {
  1117. dev->status = USB_ST_CRC_ERR;
  1118. return 0;
  1119. }
  1120. #ifdef DEBUG
  1121. urb_priv.actual_length = 0;
  1122. pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB",
  1123. usb_pipein(pipe));
  1124. #else
  1125. mdelay(1);
  1126. #endif
  1127. if (!maxsize) {
  1128. err("submit_common_message: pipesize for pipe %lx is zero",
  1129. pipe);
  1130. return -1;
  1131. }
  1132. if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) <
  1133. 0) {
  1134. err("sohci_submit_job failed");
  1135. return -1;
  1136. }
  1137. mdelay(10);
  1138. /* ohci_dump_status(&gohci); */
  1139. /* allow more time for a BULK device to react - some are slow */
  1140. #define BULK_TO 5000 /* timeout in milliseconds */
  1141. if (usb_pipebulk(pipe))
  1142. timeout = BULK_TO;
  1143. else
  1144. timeout = 100;
  1145. /* wait for it to complete */
  1146. for (;;) {
  1147. /* check whether the controller is done */
  1148. stat = hc_interrupt();
  1149. if (stat < 0) {
  1150. stat = USB_ST_CRC_ERR;
  1151. break;
  1152. }
  1153. /* NOTE: since we are not interrupt driven in U-Boot and always
  1154. * handle only one URB at a time, we cannot assume the
  1155. * transaction finished on the first successful return from
  1156. * hc_interrupt().. unless the flag for current URB is set,
  1157. * meaning that all TD's to/from device got actually
  1158. * transferred and processed. If the current URB is not
  1159. * finished we need to re-iterate this loop so as
  1160. * hc_interrupt() gets called again as there needs to be some
  1161. * more TD's to process still */
  1162. if ((stat >= 0) && (stat != 0xff) && (urb_finished)) {
  1163. /* 0xff is returned for an SF-interrupt */
  1164. break;
  1165. }
  1166. if (--timeout) {
  1167. mdelay(1);
  1168. if (!urb_finished)
  1169. dbg("\%");
  1170. } else {
  1171. err("CTL:TIMEOUT ");
  1172. dbg("submit_common_msg: TO status %x\n", stat);
  1173. stat = USB_ST_CRC_ERR;
  1174. urb_finished = 1;
  1175. break;
  1176. }
  1177. }
  1178. #if 0
  1179. /* we got an Root Hub Status Change interrupt */
  1180. if (got_rhsc) {
  1181. #ifdef DEBUG
  1182. ohci_dump_roothub(&gohci, 1);
  1183. #endif
  1184. got_rhsc = 0;
  1185. /* abuse timeout */
  1186. timeout = rh_check_port_status(&gohci);
  1187. if (timeout >= 0) {
  1188. #if 0 /* this does nothing useful, but leave it here
  1189. in case that changes */
  1190. /* the called routine adds 1 to the passed value */
  1191. usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
  1192. #endif
  1193. /*
  1194. * XXX
  1195. * This is potentially dangerous because it assumes
  1196. * that only one device is ever plugged in!
  1197. */
  1198. devgone = dev;
  1199. }
  1200. }
  1201. #endif
  1202. dev->status = stat;
  1203. dev->act_len = transfer_len;
  1204. #ifdef DEBUG
  1205. pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)",
  1206. usb_pipein(pipe));
  1207. #else
  1208. mdelay(1);
  1209. #endif
  1210. /* free TDs in urb_priv */
  1211. urb_free_priv(&urb_priv);
  1212. return 0;
  1213. }
  1214. /* submit routines called from usb.c */
  1215. int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1216. int transfer_len)
  1217. {
  1218. info("submit_bulk_msg");
  1219. return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
  1220. }
  1221. int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1222. int transfer_len, struct devrequest *setup)
  1223. {
  1224. int maxsize = usb_maxpacket(dev, pipe);
  1225. info("submit_control_msg");
  1226. #ifdef DEBUG
  1227. urb_priv.actual_length = 0;
  1228. pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB",
  1229. usb_pipein(pipe));
  1230. #else
  1231. mdelay(1);
  1232. #endif
  1233. if (!maxsize) {
  1234. err("submit_control_message: pipesize for pipe %lx is zero",
  1235. pipe);
  1236. return -1;
  1237. }
  1238. if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
  1239. gohci.rh.dev = dev;
  1240. /* root hub - redirect */
  1241. return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
  1242. setup);
  1243. }
  1244. return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
  1245. }
  1246. int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1247. int transfer_len, int interval)
  1248. {
  1249. info("submit_int_msg");
  1250. return -1;
  1251. }
  1252. /*-------------------------------------------------------------------------*
  1253. * HC functions
  1254. *-------------------------------------------------------------------------*/
  1255. /* reset the HC and BUS */
  1256. static int hc_reset(struct ohci *ohci)
  1257. {
  1258. int timeout = 30;
  1259. int smm_timeout = 50; /* 0,5 sec */
  1260. if (readl(&ohci->regs->control) & OHCI_CTRL_IR) {
  1261. /* SMM owns the HC - request ownership */
  1262. writel(OHCI_OCR, &ohci->regs->cmdstatus);
  1263. info("USB HC TakeOver from SMM");
  1264. while (readl(&ohci->regs->control) & OHCI_CTRL_IR) {
  1265. mdelay(10);
  1266. if (--smm_timeout == 0) {
  1267. err("USB HC TakeOver failed!");
  1268. return -1;
  1269. }
  1270. }
  1271. }
  1272. /* Disable HC interrupts */
  1273. writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
  1274. dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
  1275. ohci->slot_name, readl(&ohci->regs->control));
  1276. /* Reset USB (needed by some controllers) */
  1277. writel(0, &ohci->regs->control);
  1278. /* HC Reset requires max 10 us delay */
  1279. writel(OHCI_HCR, &ohci->regs->cmdstatus);
  1280. while ((readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
  1281. if (--timeout == 0) {
  1282. err("USB HC reset timed out!");
  1283. return -1;
  1284. }
  1285. udelay(1);
  1286. }
  1287. return 0;
  1288. }
  1289. /*-------------------------------------------------------------------------*/
  1290. /* Start an OHCI controller, set the BUS operational
  1291. * enable interrupts
  1292. * connect the virtual root hub */
  1293. static int hc_start(struct ohci *ohci)
  1294. {
  1295. __u32 mask;
  1296. unsigned int fminterval;
  1297. ohci->disabled = 1;
  1298. /* Tell the controller where the control and bulk lists are
  1299. * The lists are empty now. */
  1300. writel(0, &ohci->regs->ed_controlhead);
  1301. writel(0, &ohci->regs->ed_bulkhead);
  1302. /* a reset clears this */
  1303. writel((__u32) ohci->hcca, &ohci->regs->hcca);
  1304. fminterval = 0x2edf;
  1305. writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
  1306. fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
  1307. writel(fminterval, &ohci->regs->fminterval);
  1308. writel(0x628, &ohci->regs->lsthresh);
  1309. /* start controller operations */
  1310. ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
  1311. ohci->disabled = 0;
  1312. writel(ohci->hc_control, &ohci->regs->control);
  1313. /* disable all interrupts */
  1314. mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
  1315. OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
  1316. OHCI_INTR_OC | OHCI_INTR_MIE);
  1317. writel(mask, &ohci->regs->intrdisable);
  1318. /* clear all interrupts */
  1319. mask &= ~OHCI_INTR_MIE;
  1320. writel(mask, &ohci->regs->intrstatus);
  1321. /* Choose the interrupts we care about now - but w/o MIE */
  1322. mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
  1323. writel(mask, &ohci->regs->intrenable);
  1324. #ifdef OHCI_USE_NPS
  1325. /* required for AMD-756 and some Mac platforms */
  1326. writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
  1327. &ohci->regs->roothub.a);
  1328. writel(RH_HS_LPSC, &ohci->regs->roothub.status);
  1329. #endif /* OHCI_USE_NPS */
  1330. /* POTPGT delay is bits 24-31, in 2 ms units. */
  1331. mdelay((roothub_a(ohci) >> 23) & 0x1fe);
  1332. /* connect the virtual root hub */
  1333. ohci->rh.devnum = 0;
  1334. return 0;
  1335. }
  1336. /*-------------------------------------------------------------------------*/
  1337. /* an interrupt happens */
  1338. static int hc_interrupt(void)
  1339. {
  1340. struct ohci *ohci = &gohci;
  1341. struct ohci_regs *regs = ohci->regs;
  1342. int ints;
  1343. int stat = -1;
  1344. if ((ohci->hcca->done_head != 0) &&
  1345. !(m32_swap(ohci->hcca->done_head) & 0x01)) {
  1346. ints = OHCI_INTR_WDH;
  1347. } else {
  1348. ints = readl(&regs->intrstatus);
  1349. if (ints == ~(u32) 0) {
  1350. ohci->disabled++;
  1351. err("%s device removed!", ohci->slot_name);
  1352. return -1;
  1353. }
  1354. ints &= readl(&regs->intrenable);
  1355. if (ints == 0) {
  1356. dbg("hc_interrupt: returning..\n");
  1357. return 0xff;
  1358. }
  1359. }
  1360. /* dbg("Interrupt: %x frame: %x", ints,
  1361. le16_to_cpu(ohci->hcca->frame_no)); */
  1362. if (ints & OHCI_INTR_RHSC) {
  1363. got_rhsc = 1;
  1364. stat = 0xff;
  1365. }
  1366. if (ints & OHCI_INTR_UE) {
  1367. ohci->disabled++;
  1368. err("OHCI Unrecoverable Error, controller usb-%s disabled",
  1369. ohci->slot_name);
  1370. /* e.g. due to PCI Master/Target Abort */
  1371. #ifdef DEBUG
  1372. ohci_dump(ohci, 1);
  1373. #else
  1374. mdelay(1);
  1375. #endif
  1376. /* FIXME: be optimistic, hope that bug won't repeat often. */
  1377. /* Make some non-interrupt context restart the controller. */
  1378. /* Count and limit the retries though; either hardware or */
  1379. /* software errors can go forever... */
  1380. hc_reset(ohci);
  1381. return -1;
  1382. }
  1383. if (ints & OHCI_INTR_WDH) {
  1384. mdelay(1);
  1385. writel(OHCI_INTR_WDH, &regs->intrdisable);
  1386. stat = dl_done_list(&gohci, dl_reverse_done_list(&gohci));
  1387. writel(OHCI_INTR_WDH, &regs->intrenable);
  1388. }
  1389. if (ints & OHCI_INTR_SO) {
  1390. dbg("USB Schedule overrun\n");
  1391. writel(OHCI_INTR_SO, &regs->intrenable);
  1392. stat = -1;
  1393. }
  1394. /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
  1395. if (ints & OHCI_INTR_SF) {
  1396. unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1;
  1397. mdelay(1);
  1398. writel(OHCI_INTR_SF, &regs->intrdisable);
  1399. if (ohci->ed_rm_list[frame] != NULL)
  1400. writel(OHCI_INTR_SF, &regs->intrenable);
  1401. stat = 0xff;
  1402. }
  1403. writel(ints, &regs->intrstatus);
  1404. return stat;
  1405. }
  1406. /*-------------------------------------------------------------------------*/
  1407. /*-------------------------------------------------------------------------*/
  1408. /* De-allocate all resources.. */
  1409. static void hc_release_ohci(struct ohci *ohci)
  1410. {
  1411. dbg("USB HC release ohci usb-%s", ohci->slot_name);
  1412. if (!ohci->disabled)
  1413. hc_reset(ohci);
  1414. }
  1415. /*-------------------------------------------------------------------------*/
  1416. /*
  1417. * low level initalisation routine, called from usb.c
  1418. */
  1419. static char ohci_inited = 0;
  1420. int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
  1421. {
  1422. struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
  1423. struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
  1424. /*
  1425. * Set the 48 MHz UPLL clocking. Values are taken from
  1426. * "PLL value selection guide", 6-23, s3c2400_UM.pdf.
  1427. */
  1428. clk_power->upllcon = ((40 << 12) + (1 << 4) + 2);
  1429. gpio->misccr |= 0x8; /* 1 = use pads related USB for USB host */
  1430. /*
  1431. * Enable USB host clock.
  1432. */
  1433. clk_power->clkcon |= (1 << 4);
  1434. memset(&gohci, 0, sizeof(struct ohci));
  1435. memset(&urb_priv, 0, sizeof(struct urb_priv));
  1436. /* align the storage */
  1437. if ((__u32) &ghcca[0] & 0xff) {
  1438. err("HCCA not aligned!!");
  1439. return -1;
  1440. }
  1441. phcca = &ghcca[0];
  1442. info("aligned ghcca %p", phcca);
  1443. memset(&ohci_dev, 0, sizeof(struct ohci_device));
  1444. if ((__u32) &ohci_dev.ed[0] & 0x7) {
  1445. err("EDs not aligned!!");
  1446. return -1;
  1447. }
  1448. memset(gtd, 0, sizeof(struct td) * (NUM_TD + 1));
  1449. if ((__u32) gtd & 0x7) {
  1450. err("TDs not aligned!!");
  1451. return -1;
  1452. }
  1453. ptd = gtd;
  1454. gohci.hcca = phcca;
  1455. memset(phcca, 0, sizeof(struct ohci_hcca));
  1456. gohci.disabled = 1;
  1457. gohci.sleeping = 0;
  1458. gohci.irq = -1;
  1459. gohci.regs = (struct ohci_regs *)S3C24X0_USB_HOST_BASE;
  1460. gohci.flags = 0;
  1461. gohci.slot_name = "s3c2400";
  1462. if (hc_reset(&gohci) < 0) {
  1463. hc_release_ohci(&gohci);
  1464. /* Initialization failed */
  1465. clk_power->clkcon &= ~(1 << 4);
  1466. return -1;
  1467. }
  1468. /* FIXME this is a second HC reset; why?? */
  1469. gohci.hc_control = OHCI_USB_RESET;
  1470. writel(gohci.hc_control, &gohci.regs->control);
  1471. mdelay(10);
  1472. if (hc_start(&gohci) < 0) {
  1473. err("can't start usb-%s", gohci.slot_name);
  1474. hc_release_ohci(&gohci);
  1475. /* Initialization failed */
  1476. clk_power->clkcon &= ~(1 << 4);
  1477. return -1;
  1478. }
  1479. #ifdef DEBUG
  1480. ohci_dump(&gohci, 1);
  1481. #else
  1482. mdelay(1);
  1483. #endif
  1484. ohci_inited = 1;
  1485. urb_finished = 1;
  1486. return 0;
  1487. }
  1488. int usb_lowlevel_stop(int index)
  1489. {
  1490. struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
  1491. /* this gets called really early - before the controller has */
  1492. /* even been initialized! */
  1493. if (!ohci_inited)
  1494. return 0;
  1495. /* TODO release any interrupts, etc. */
  1496. /* call hc_release_ohci() here ? */
  1497. hc_reset(&gohci);
  1498. /* may not want to do this */
  1499. clk_power->clkcon &= ~(1 << 4);
  1500. return 0;
  1501. }
  1502. #endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_S3C24X0) */
  1503. #if defined(CONFIG_USB_OHCI_NEW) && \
  1504. defined(CONFIG_SYS_USB_OHCI_CPU_INIT) && \
  1505. defined(CONFIG_S3C24X0)
  1506. int usb_cpu_init(void)
  1507. {
  1508. struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
  1509. struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
  1510. /*
  1511. * Set the 48 MHz UPLL clocking. Values are taken from
  1512. * "PLL value selection guide", 6-23, s3c2400_UM.pdf.
  1513. */
  1514. writel((40 << 12) + (1 << 4) + 2, &clk_power->upllcon);
  1515. /* 1 = use pads related USB for USB host */
  1516. writel(readl(&gpio->misccr) | 0x8, &gpio->misccr);
  1517. /*
  1518. * Enable USB host clock.
  1519. */
  1520. writel(readl(&clk_power->clkcon) | (1 << 4), &clk_power->clkcon);
  1521. return 0;
  1522. }
  1523. int usb_cpu_stop(void)
  1524. {
  1525. struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
  1526. /* may not want to do this */
  1527. writel(readl(&clk_power->clkcon) & ~(1 << 4), &clk_power->clkcon);
  1528. return 0;
  1529. }
  1530. int usb_cpu_init_fail(void)
  1531. {
  1532. struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
  1533. writel(readl(&clk_power->clkcon) & ~(1 << 4), &clk_power->clkcon);
  1534. return 0;
  1535. }
  1536. #endif /* defined(CONFIG_USB_OHCI_NEW) && \
  1537. defined(CONFIG_SYS_USB_OHCI_CPU_INIT) && \
  1538. defined(CONFIG_S3C24X0) */