phy.c 21 KB

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  1. /*
  2. * Generic PHY Management code
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. *
  6. * Copyright 2011 Freescale Semiconductor, Inc.
  7. * author Andy Fleming
  8. *
  9. * Based loosely off of Linux's PHY Lib
  10. */
  11. #include <config.h>
  12. #include <common.h>
  13. #include <console.h>
  14. #include <dm.h>
  15. #include <malloc.h>
  16. #include <net.h>
  17. #include <command.h>
  18. #include <miiphy.h>
  19. #include <phy.h>
  20. #include <errno.h>
  21. #include <linux/err.h>
  22. #include <linux/compiler.h>
  23. DECLARE_GLOBAL_DATA_PTR;
  24. /* Generic PHY support and helper functions */
  25. /**
  26. * genphy_config_advert - sanitize and advertise auto-negotation parameters
  27. * @phydev: target phy_device struct
  28. *
  29. * Description: Writes MII_ADVERTISE with the appropriate values,
  30. * after sanitizing the values to make sure we only advertise
  31. * what is supported. Returns < 0 on error, 0 if the PHY's advertisement
  32. * hasn't changed, and > 0 if it has changed.
  33. */
  34. static int genphy_config_advert(struct phy_device *phydev)
  35. {
  36. u32 advertise;
  37. int oldadv, adv, bmsr;
  38. int err, changed = 0;
  39. /* Only allow advertising what this PHY supports */
  40. phydev->advertising &= phydev->supported;
  41. advertise = phydev->advertising;
  42. /* Setup standard advertisement */
  43. adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
  44. oldadv = adv;
  45. if (adv < 0)
  46. return adv;
  47. adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
  48. ADVERTISE_PAUSE_ASYM);
  49. if (advertise & ADVERTISED_10baseT_Half)
  50. adv |= ADVERTISE_10HALF;
  51. if (advertise & ADVERTISED_10baseT_Full)
  52. adv |= ADVERTISE_10FULL;
  53. if (advertise & ADVERTISED_100baseT_Half)
  54. adv |= ADVERTISE_100HALF;
  55. if (advertise & ADVERTISED_100baseT_Full)
  56. adv |= ADVERTISE_100FULL;
  57. if (advertise & ADVERTISED_Pause)
  58. adv |= ADVERTISE_PAUSE_CAP;
  59. if (advertise & ADVERTISED_Asym_Pause)
  60. adv |= ADVERTISE_PAUSE_ASYM;
  61. if (advertise & ADVERTISED_1000baseX_Half)
  62. adv |= ADVERTISE_1000XHALF;
  63. if (advertise & ADVERTISED_1000baseX_Full)
  64. adv |= ADVERTISE_1000XFULL;
  65. if (adv != oldadv) {
  66. err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
  67. if (err < 0)
  68. return err;
  69. changed = 1;
  70. }
  71. bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  72. if (bmsr < 0)
  73. return bmsr;
  74. /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all
  75. * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a
  76. * logical 1.
  77. */
  78. if (!(bmsr & BMSR_ESTATEN))
  79. return changed;
  80. /* Configure gigabit if it's supported */
  81. adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
  82. oldadv = adv;
  83. if (adv < 0)
  84. return adv;
  85. adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
  86. if (phydev->supported & (SUPPORTED_1000baseT_Half |
  87. SUPPORTED_1000baseT_Full)) {
  88. if (advertise & SUPPORTED_1000baseT_Half)
  89. adv |= ADVERTISE_1000HALF;
  90. if (advertise & SUPPORTED_1000baseT_Full)
  91. adv |= ADVERTISE_1000FULL;
  92. }
  93. if (adv != oldadv)
  94. changed = 1;
  95. err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv);
  96. if (err < 0)
  97. return err;
  98. return changed;
  99. }
  100. /**
  101. * genphy_setup_forced - configures/forces speed/duplex from @phydev
  102. * @phydev: target phy_device struct
  103. *
  104. * Description: Configures MII_BMCR to force speed/duplex
  105. * to the values in phydev. Assumes that the values are valid.
  106. */
  107. static int genphy_setup_forced(struct phy_device *phydev)
  108. {
  109. int err;
  110. int ctl = BMCR_ANRESTART;
  111. phydev->pause = phydev->asym_pause = 0;
  112. if (SPEED_1000 == phydev->speed)
  113. ctl |= BMCR_SPEED1000;
  114. else if (SPEED_100 == phydev->speed)
  115. ctl |= BMCR_SPEED100;
  116. if (DUPLEX_FULL == phydev->duplex)
  117. ctl |= BMCR_FULLDPLX;
  118. err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
  119. return err;
  120. }
  121. /**
  122. * genphy_restart_aneg - Enable and Restart Autonegotiation
  123. * @phydev: target phy_device struct
  124. */
  125. int genphy_restart_aneg(struct phy_device *phydev)
  126. {
  127. int ctl;
  128. ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
  129. if (ctl < 0)
  130. return ctl;
  131. ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
  132. /* Don't isolate the PHY if we're negotiating */
  133. ctl &= ~(BMCR_ISOLATE);
  134. ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
  135. return ctl;
  136. }
  137. /**
  138. * genphy_config_aneg - restart auto-negotiation or write BMCR
  139. * @phydev: target phy_device struct
  140. *
  141. * Description: If auto-negotiation is enabled, we configure the
  142. * advertising, and then restart auto-negotiation. If it is not
  143. * enabled, then we write the BMCR.
  144. */
  145. int genphy_config_aneg(struct phy_device *phydev)
  146. {
  147. int result;
  148. if (AUTONEG_ENABLE != phydev->autoneg)
  149. return genphy_setup_forced(phydev);
  150. result = genphy_config_advert(phydev);
  151. if (result < 0) /* error */
  152. return result;
  153. if (result == 0) {
  154. /* Advertisment hasn't changed, but maybe aneg was never on to
  155. * begin with? Or maybe phy was isolated? */
  156. int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
  157. if (ctl < 0)
  158. return ctl;
  159. if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
  160. result = 1; /* do restart aneg */
  161. }
  162. /* Only restart aneg if we are advertising something different
  163. * than we were before. */
  164. if (result > 0)
  165. result = genphy_restart_aneg(phydev);
  166. return result;
  167. }
  168. /**
  169. * genphy_update_link - update link status in @phydev
  170. * @phydev: target phy_device struct
  171. *
  172. * Description: Update the value in phydev->link to reflect the
  173. * current link value. In order to do this, we need to read
  174. * the status register twice, keeping the second value.
  175. */
  176. int genphy_update_link(struct phy_device *phydev)
  177. {
  178. unsigned int mii_reg;
  179. /*
  180. * Wait if the link is up, and autonegotiation is in progress
  181. * (ie - we're capable and it's not done)
  182. */
  183. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  184. /*
  185. * If we already saw the link up, and it hasn't gone down, then
  186. * we don't need to wait for autoneg again
  187. */
  188. if (phydev->link && mii_reg & BMSR_LSTATUS)
  189. return 0;
  190. if ((phydev->autoneg == AUTONEG_ENABLE) &&
  191. !(mii_reg & BMSR_ANEGCOMPLETE)) {
  192. int i = 0;
  193. printf("%s Waiting for PHY auto negotiation to complete",
  194. phydev->dev->name);
  195. while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
  196. /*
  197. * Timeout reached ?
  198. */
  199. if (i > PHY_ANEG_TIMEOUT) {
  200. printf(" TIMEOUT !\n");
  201. phydev->link = 0;
  202. return -ETIMEDOUT;
  203. }
  204. if (ctrlc()) {
  205. puts("user interrupt!\n");
  206. phydev->link = 0;
  207. return -EINTR;
  208. }
  209. if ((i++ % 500) == 0)
  210. printf(".");
  211. udelay(1000); /* 1 ms */
  212. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  213. }
  214. printf(" done\n");
  215. phydev->link = 1;
  216. } else {
  217. /* Read the link a second time to clear the latched state */
  218. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  219. if (mii_reg & BMSR_LSTATUS)
  220. phydev->link = 1;
  221. else
  222. phydev->link = 0;
  223. }
  224. return 0;
  225. }
  226. /*
  227. * Generic function which updates the speed and duplex. If
  228. * autonegotiation is enabled, it uses the AND of the link
  229. * partner's advertised capabilities and our advertised
  230. * capabilities. If autonegotiation is disabled, we use the
  231. * appropriate bits in the control register.
  232. *
  233. * Stolen from Linux's mii.c and phy_device.c
  234. */
  235. int genphy_parse_link(struct phy_device *phydev)
  236. {
  237. int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  238. /* We're using autonegotiation */
  239. if (phydev->autoneg == AUTONEG_ENABLE) {
  240. u32 lpa = 0;
  241. int gblpa = 0;
  242. u32 estatus = 0;
  243. /* Check for gigabit capability */
  244. if (phydev->supported & (SUPPORTED_1000baseT_Full |
  245. SUPPORTED_1000baseT_Half)) {
  246. /* We want a list of states supported by
  247. * both PHYs in the link
  248. */
  249. gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
  250. if (gblpa < 0) {
  251. debug("Could not read MII_STAT1000. Ignoring gigabit capability\n");
  252. gblpa = 0;
  253. }
  254. gblpa &= phy_read(phydev,
  255. MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
  256. }
  257. /* Set the baseline so we only have to set them
  258. * if they're different
  259. */
  260. phydev->speed = SPEED_10;
  261. phydev->duplex = DUPLEX_HALF;
  262. /* Check the gigabit fields */
  263. if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
  264. phydev->speed = SPEED_1000;
  265. if (gblpa & PHY_1000BTSR_1000FD)
  266. phydev->duplex = DUPLEX_FULL;
  267. /* We're done! */
  268. return 0;
  269. }
  270. lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
  271. lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
  272. if (lpa & (LPA_100FULL | LPA_100HALF)) {
  273. phydev->speed = SPEED_100;
  274. if (lpa & LPA_100FULL)
  275. phydev->duplex = DUPLEX_FULL;
  276. } else if (lpa & LPA_10FULL)
  277. phydev->duplex = DUPLEX_FULL;
  278. /*
  279. * Extended status may indicate that the PHY supports
  280. * 1000BASE-T/X even though the 1000BASE-T registers
  281. * are missing. In this case we can't tell whether the
  282. * peer also supports it, so we only check extended
  283. * status if the 1000BASE-T registers are actually
  284. * missing.
  285. */
  286. if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
  287. estatus = phy_read(phydev, MDIO_DEVAD_NONE,
  288. MII_ESTATUS);
  289. if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
  290. ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
  291. phydev->speed = SPEED_1000;
  292. if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
  293. phydev->duplex = DUPLEX_FULL;
  294. }
  295. } else {
  296. u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
  297. phydev->speed = SPEED_10;
  298. phydev->duplex = DUPLEX_HALF;
  299. if (bmcr & BMCR_FULLDPLX)
  300. phydev->duplex = DUPLEX_FULL;
  301. if (bmcr & BMCR_SPEED1000)
  302. phydev->speed = SPEED_1000;
  303. else if (bmcr & BMCR_SPEED100)
  304. phydev->speed = SPEED_100;
  305. }
  306. return 0;
  307. }
  308. int genphy_config(struct phy_device *phydev)
  309. {
  310. int val;
  311. u32 features;
  312. features = (SUPPORTED_TP | SUPPORTED_MII
  313. | SUPPORTED_AUI | SUPPORTED_FIBRE |
  314. SUPPORTED_BNC);
  315. /* Do we support autonegotiation? */
  316. val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  317. if (val < 0)
  318. return val;
  319. if (val & BMSR_ANEGCAPABLE)
  320. features |= SUPPORTED_Autoneg;
  321. if (val & BMSR_100FULL)
  322. features |= SUPPORTED_100baseT_Full;
  323. if (val & BMSR_100HALF)
  324. features |= SUPPORTED_100baseT_Half;
  325. if (val & BMSR_10FULL)
  326. features |= SUPPORTED_10baseT_Full;
  327. if (val & BMSR_10HALF)
  328. features |= SUPPORTED_10baseT_Half;
  329. if (val & BMSR_ESTATEN) {
  330. val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
  331. if (val < 0)
  332. return val;
  333. if (val & ESTATUS_1000_TFULL)
  334. features |= SUPPORTED_1000baseT_Full;
  335. if (val & ESTATUS_1000_THALF)
  336. features |= SUPPORTED_1000baseT_Half;
  337. if (val & ESTATUS_1000_XFULL)
  338. features |= SUPPORTED_1000baseX_Full;
  339. if (val & ESTATUS_1000_XHALF)
  340. features |= SUPPORTED_1000baseX_Half;
  341. }
  342. phydev->supported &= features;
  343. phydev->advertising &= features;
  344. genphy_config_aneg(phydev);
  345. return 0;
  346. }
  347. int genphy_startup(struct phy_device *phydev)
  348. {
  349. int ret;
  350. ret = genphy_update_link(phydev);
  351. if (ret)
  352. return ret;
  353. return genphy_parse_link(phydev);
  354. }
  355. int genphy_shutdown(struct phy_device *phydev)
  356. {
  357. return 0;
  358. }
  359. static struct phy_driver genphy_driver = {
  360. .uid = 0xffffffff,
  361. .mask = 0xffffffff,
  362. .name = "Generic PHY",
  363. .features = PHY_GBIT_FEATURES | SUPPORTED_MII |
  364. SUPPORTED_AUI | SUPPORTED_FIBRE |
  365. SUPPORTED_BNC,
  366. .config = genphy_config,
  367. .startup = genphy_startup,
  368. .shutdown = genphy_shutdown,
  369. };
  370. static LIST_HEAD(phy_drivers);
  371. int phy_init(void)
  372. {
  373. #ifdef CONFIG_B53_SWITCH
  374. phy_b53_init();
  375. #endif
  376. #ifdef CONFIG_MV88E61XX_SWITCH
  377. phy_mv88e61xx_init();
  378. #endif
  379. #ifdef CONFIG_PHY_AQUANTIA
  380. phy_aquantia_init();
  381. #endif
  382. #ifdef CONFIG_PHY_ATHEROS
  383. phy_atheros_init();
  384. #endif
  385. #ifdef CONFIG_PHY_BROADCOM
  386. phy_broadcom_init();
  387. #endif
  388. #ifdef CONFIG_PHY_CORTINA
  389. phy_cortina_init();
  390. #endif
  391. #ifdef CONFIG_PHY_DAVICOM
  392. phy_davicom_init();
  393. #endif
  394. #ifdef CONFIG_PHY_ET1011C
  395. phy_et1011c_init();
  396. #endif
  397. #ifdef CONFIG_PHY_LXT
  398. phy_lxt_init();
  399. #endif
  400. #ifdef CONFIG_PHY_MARVELL
  401. phy_marvell_init();
  402. #endif
  403. #ifdef CONFIG_PHY_MICREL_KSZ8XXX
  404. phy_micrel_ksz8xxx_init();
  405. #endif
  406. #ifdef CONFIG_PHY_MICREL_KSZ90X1
  407. phy_micrel_ksz90x1_init();
  408. #endif
  409. #ifdef CONFIG_PHY_MESON_GXL
  410. phy_meson_gxl_init();
  411. #endif
  412. #ifdef CONFIG_PHY_NATSEMI
  413. phy_natsemi_init();
  414. #endif
  415. #ifdef CONFIG_PHY_REALTEK
  416. phy_realtek_init();
  417. #endif
  418. #ifdef CONFIG_PHY_SMSC
  419. phy_smsc_init();
  420. #endif
  421. #ifdef CONFIG_PHY_TERANETICS
  422. phy_teranetics_init();
  423. #endif
  424. #ifdef CONFIG_PHY_TI
  425. phy_ti_init();
  426. #endif
  427. #ifdef CONFIG_PHY_VITESSE
  428. phy_vitesse_init();
  429. #endif
  430. #ifdef CONFIG_PHY_XILINX
  431. phy_xilinx_init();
  432. #endif
  433. #ifdef CONFIG_PHY_MSCC
  434. phy_mscc_init();
  435. #endif
  436. #ifdef CONFIG_PHY_FIXED
  437. phy_fixed_init();
  438. #endif
  439. return 0;
  440. }
  441. int phy_register(struct phy_driver *drv)
  442. {
  443. INIT_LIST_HEAD(&drv->list);
  444. list_add_tail(&drv->list, &phy_drivers);
  445. #ifdef CONFIG_NEEDS_MANUAL_RELOC
  446. if (drv->probe)
  447. drv->probe += gd->reloc_off;
  448. if (drv->config)
  449. drv->config += gd->reloc_off;
  450. if (drv->startup)
  451. drv->startup += gd->reloc_off;
  452. if (drv->shutdown)
  453. drv->shutdown += gd->reloc_off;
  454. if (drv->readext)
  455. drv->readext += gd->reloc_off;
  456. if (drv->writeext)
  457. drv->writeext += gd->reloc_off;
  458. #endif
  459. return 0;
  460. }
  461. int phy_set_supported(struct phy_device *phydev, u32 max_speed)
  462. {
  463. /* The default values for phydev->supported are provided by the PHY
  464. * driver "features" member, we want to reset to sane defaults first
  465. * before supporting higher speeds.
  466. */
  467. phydev->supported &= PHY_DEFAULT_FEATURES;
  468. switch (max_speed) {
  469. default:
  470. return -ENOTSUPP;
  471. case SPEED_1000:
  472. phydev->supported |= PHY_1000BT_FEATURES;
  473. /* fall through */
  474. case SPEED_100:
  475. phydev->supported |= PHY_100BT_FEATURES;
  476. /* fall through */
  477. case SPEED_10:
  478. phydev->supported |= PHY_10BT_FEATURES;
  479. }
  480. return 0;
  481. }
  482. static int phy_probe(struct phy_device *phydev)
  483. {
  484. int err = 0;
  485. phydev->advertising = phydev->supported = phydev->drv->features;
  486. phydev->mmds = phydev->drv->mmds;
  487. if (phydev->drv->probe)
  488. err = phydev->drv->probe(phydev);
  489. return err;
  490. }
  491. static struct phy_driver *generic_for_interface(phy_interface_t interface)
  492. {
  493. #ifdef CONFIG_PHYLIB_10G
  494. if (is_10g_interface(interface))
  495. return &gen10g_driver;
  496. #endif
  497. return &genphy_driver;
  498. }
  499. static struct phy_driver *get_phy_driver(struct phy_device *phydev,
  500. phy_interface_t interface)
  501. {
  502. struct list_head *entry;
  503. int phy_id = phydev->phy_id;
  504. struct phy_driver *drv = NULL;
  505. list_for_each(entry, &phy_drivers) {
  506. drv = list_entry(entry, struct phy_driver, list);
  507. if ((drv->uid & drv->mask) == (phy_id & drv->mask))
  508. return drv;
  509. }
  510. /* If we made it here, there's no driver for this PHY */
  511. return generic_for_interface(interface);
  512. }
  513. static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
  514. u32 phy_id,
  515. phy_interface_t interface)
  516. {
  517. struct phy_device *dev;
  518. /* We allocate the device, and initialize the
  519. * default values */
  520. dev = malloc(sizeof(*dev));
  521. if (!dev) {
  522. printf("Failed to allocate PHY device for %s:%d\n",
  523. bus->name, addr);
  524. return NULL;
  525. }
  526. memset(dev, 0, sizeof(*dev));
  527. dev->duplex = -1;
  528. dev->link = 0;
  529. dev->interface = interface;
  530. dev->autoneg = AUTONEG_ENABLE;
  531. dev->addr = addr;
  532. dev->phy_id = phy_id;
  533. dev->bus = bus;
  534. dev->drv = get_phy_driver(dev, interface);
  535. phy_probe(dev);
  536. bus->phymap[addr] = dev;
  537. return dev;
  538. }
  539. /**
  540. * get_phy_id - reads the specified addr for its ID.
  541. * @bus: the target MII bus
  542. * @addr: PHY address on the MII bus
  543. * @phy_id: where to store the ID retrieved.
  544. *
  545. * Description: Reads the ID registers of the PHY at @addr on the
  546. * @bus, stores it in @phy_id and returns zero on success.
  547. */
  548. int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
  549. {
  550. int phy_reg;
  551. /* Grab the bits from PHYIR1, and put them
  552. * in the upper half */
  553. phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
  554. if (phy_reg < 0)
  555. return -EIO;
  556. *phy_id = (phy_reg & 0xffff) << 16;
  557. /* Grab the bits from PHYIR2, and put them in the lower half */
  558. phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
  559. if (phy_reg < 0)
  560. return -EIO;
  561. *phy_id |= (phy_reg & 0xffff);
  562. return 0;
  563. }
  564. static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
  565. unsigned phy_mask, int devad, phy_interface_t interface)
  566. {
  567. u32 phy_id = 0xffffffff;
  568. while (phy_mask) {
  569. int addr = ffs(phy_mask) - 1;
  570. int r = get_phy_id(bus, addr, devad, &phy_id);
  571. /* If the PHY ID is mostly f's, we didn't find anything */
  572. if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff)
  573. return phy_device_create(bus, addr, phy_id, interface);
  574. phy_mask &= ~(1 << addr);
  575. }
  576. return NULL;
  577. }
  578. static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
  579. unsigned phy_mask, phy_interface_t interface)
  580. {
  581. /* If we have one, return the existing device, with new interface */
  582. while (phy_mask) {
  583. int addr = ffs(phy_mask) - 1;
  584. if (bus->phymap[addr]) {
  585. bus->phymap[addr]->interface = interface;
  586. return bus->phymap[addr];
  587. }
  588. phy_mask &= ~(1 << addr);
  589. }
  590. return NULL;
  591. }
  592. static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
  593. unsigned phy_mask, phy_interface_t interface)
  594. {
  595. int i;
  596. struct phy_device *phydev;
  597. phydev = search_for_existing_phy(bus, phy_mask, interface);
  598. if (phydev)
  599. return phydev;
  600. /* Try Standard (ie Clause 22) access */
  601. /* Otherwise we have to try Clause 45 */
  602. for (i = 0; i < 5; i++) {
  603. phydev = create_phy_by_mask(bus, phy_mask,
  604. i ? i : MDIO_DEVAD_NONE, interface);
  605. if (IS_ERR(phydev))
  606. return NULL;
  607. if (phydev)
  608. return phydev;
  609. }
  610. debug("\n%s PHY: ", bus->name);
  611. while (phy_mask) {
  612. int addr = ffs(phy_mask) - 1;
  613. debug("%d ", addr);
  614. phy_mask &= ~(1 << addr);
  615. }
  616. debug("not found\n");
  617. return NULL;
  618. }
  619. /**
  620. * get_phy_device - reads the specified PHY device and returns its @phy_device struct
  621. * @bus: the target MII bus
  622. * @addr: PHY address on the MII bus
  623. *
  624. * Description: Reads the ID registers of the PHY at @addr on the
  625. * @bus, then allocates and returns the phy_device to represent it.
  626. */
  627. static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
  628. phy_interface_t interface)
  629. {
  630. return get_phy_device_by_mask(bus, 1 << addr, interface);
  631. }
  632. int phy_reset(struct phy_device *phydev)
  633. {
  634. int reg;
  635. int timeout = 500;
  636. int devad = MDIO_DEVAD_NONE;
  637. if (phydev->flags & PHY_FLAG_BROKEN_RESET)
  638. return 0;
  639. #ifdef CONFIG_PHYLIB_10G
  640. /* If it's 10G, we need to issue reset through one of the MMDs */
  641. if (is_10g_interface(phydev->interface)) {
  642. if (!phydev->mmds)
  643. gen10g_discover_mmds(phydev);
  644. devad = ffs(phydev->mmds) - 1;
  645. }
  646. #endif
  647. if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) {
  648. debug("PHY reset failed\n");
  649. return -1;
  650. }
  651. #ifdef CONFIG_PHY_RESET_DELAY
  652. udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
  653. #endif
  654. /*
  655. * Poll the control register for the reset bit to go to 0 (it is
  656. * auto-clearing). This should happen within 0.5 seconds per the
  657. * IEEE spec.
  658. */
  659. reg = phy_read(phydev, devad, MII_BMCR);
  660. while ((reg & BMCR_RESET) && timeout--) {
  661. reg = phy_read(phydev, devad, MII_BMCR);
  662. if (reg < 0) {
  663. debug("PHY status read failed\n");
  664. return -1;
  665. }
  666. udelay(1000);
  667. }
  668. if (reg & BMCR_RESET) {
  669. puts("PHY reset timed out\n");
  670. return -1;
  671. }
  672. return 0;
  673. }
  674. int miiphy_reset(const char *devname, unsigned char addr)
  675. {
  676. struct mii_dev *bus = miiphy_get_dev_by_name(devname);
  677. struct phy_device *phydev;
  678. /*
  679. * miiphy_reset was only used on standard PHYs, so we'll fake it here.
  680. * If later code tries to connect with the right interface, this will
  681. * be corrected by get_phy_device in phy_connect()
  682. */
  683. phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
  684. return phy_reset(phydev);
  685. }
  686. struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
  687. phy_interface_t interface)
  688. {
  689. /* Reset the bus */
  690. if (bus->reset) {
  691. bus->reset(bus);
  692. /* Wait 15ms to make sure the PHY has come out of hard reset */
  693. udelay(15000);
  694. }
  695. return get_phy_device_by_mask(bus, phy_mask, interface);
  696. }
  697. #ifdef CONFIG_DM_ETH
  698. void phy_connect_dev(struct phy_device *phydev, struct udevice *dev)
  699. #else
  700. void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
  701. #endif
  702. {
  703. /* Soft Reset the PHY */
  704. phy_reset(phydev);
  705. if (phydev->dev && phydev->dev != dev) {
  706. printf("%s:%d is connected to %s. Reconnecting to %s\n",
  707. phydev->bus->name, phydev->addr,
  708. phydev->dev->name, dev->name);
  709. }
  710. phydev->dev = dev;
  711. debug("%s connected to %s\n", dev->name, phydev->drv->name);
  712. }
  713. #ifdef CONFIG_DM_ETH
  714. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  715. struct udevice *dev, phy_interface_t interface)
  716. #else
  717. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  718. struct eth_device *dev, phy_interface_t interface)
  719. #endif
  720. {
  721. struct phy_device *phydev = NULL;
  722. #ifdef CONFIG_PHY_FIXED
  723. int sn;
  724. const char *name;
  725. sn = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev));
  726. while (sn > 0) {
  727. name = fdt_get_name(gd->fdt_blob, sn, NULL);
  728. if (name != NULL && strcmp(name, "fixed-link") == 0) {
  729. phydev = phy_device_create(bus,
  730. sn, PHY_FIXED_ID, interface);
  731. break;
  732. }
  733. sn = fdt_next_subnode(gd->fdt_blob, sn);
  734. }
  735. #endif
  736. if (phydev == NULL)
  737. phydev = phy_find_by_mask(bus, 1 << addr, interface);
  738. if (phydev)
  739. phy_connect_dev(phydev, dev);
  740. else
  741. printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
  742. return phydev;
  743. }
  744. /*
  745. * Start the PHY. Returns 0 on success, or a negative error code.
  746. */
  747. int phy_startup(struct phy_device *phydev)
  748. {
  749. if (phydev->drv->startup)
  750. return phydev->drv->startup(phydev);
  751. return 0;
  752. }
  753. __weak int board_phy_config(struct phy_device *phydev)
  754. {
  755. if (phydev->drv->config)
  756. return phydev->drv->config(phydev);
  757. return 0;
  758. }
  759. int phy_config(struct phy_device *phydev)
  760. {
  761. /* Invoke an optional board-specific helper */
  762. return board_phy_config(phydev);
  763. }
  764. int phy_shutdown(struct phy_device *phydev)
  765. {
  766. if (phydev->drv->shutdown)
  767. phydev->drv->shutdown(phydev);
  768. return 0;
  769. }
  770. int phy_get_interface_by_name(const char *str)
  771. {
  772. int i;
  773. for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) {
  774. if (!strcmp(str, phy_interface_strings[i]))
  775. return i;
  776. }
  777. return -1;
  778. }