ssc-regs.h 1.6 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465
  1. /*
  2. * UniPhier System Cache (L2 Cache) registers
  3. *
  4. * Copyright (C) 2011-2014 Panasonic Corporation
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. #ifndef ARCH_SSC_REGS_H
  9. #define ARCH_SSC_REGS_H
  10. #define SSCC 0x500c0000
  11. #define SSCC_BST (0x1 << 20)
  12. #define SSCC_ACT (0x1 << 19)
  13. #define SSCC_WTG (0x1 << 18)
  14. #define SSCC_PRD (0x1 << 17)
  15. #define SSCC_WBWA (0x1 << 16)
  16. #define SSCC_EX (0x1 << 13)
  17. #define SSCC_ON (0x1 << 0)
  18. #define SSCLPDAWCR 0x500c0030
  19. #define SSCOPE 0x506c0244
  20. #define SSCOPE_CM_SYNC 0x00000008
  21. #define SSCOQM 0x506c0248
  22. #define SSCOQM_TID_MASK (0x3 << 21)
  23. #define SSCOQM_TID_BY_WAY (0x2 << 21)
  24. #define SSCOQM_TID_BY_INST_WAY (0x1 << 21)
  25. #define SSCOQM_TID_BY_DATA_WAY (0x0 << 21)
  26. #define SSCOQM_S_MASK (0x3 << 17)
  27. #define SSCOQM_S_WAY (0x2 << 17)
  28. #define SSCOQM_S_ALL (0x1 << 17)
  29. #define SSCOQM_S_ADDRESS (0x0 << 17)
  30. #define SSCOQM_CE (0x1 << 15)
  31. #define SSCOQM_CW (0x1 << 14)
  32. #define SSCOQM_CM_MASK (0x7)
  33. #define SSCOQM_CM_DIRT_TOUCH (0x7)
  34. #define SSCOQM_CM_ZERO_TOUCH (0x6)
  35. #define SSCOQM_CM_NORM_TOUCH (0x5)
  36. #define SSCOQM_CM_PREF_FETCH (0x4)
  37. #define SSCOQM_CM_SSC_FETCH (0x3)
  38. #define SSCOQM_CM_WB_INV (0x2)
  39. #define SSCOQM_CM_WB (0x1)
  40. #define SSCOQM_CM_INV (0x0)
  41. #define SSCOQAD 0x506c024c
  42. #define SSCOQSZ 0x506c0250
  43. #define SSCOQWN 0x506c0258
  44. #define SSCOPPQSEF 0x506c025c
  45. #define SSCOPPQSEF_FE (0x1 << 1)
  46. #define SSCOPPQSEF_OE (0x1 << 0)
  47. #define SSCOLPQS 0x506c0260
  48. #define SSCOLPQS_EF (0x1 << 2)
  49. #define SSCOLPQS_EST (0x1 << 1)
  50. #define SSCOLPQS_QST (0x1 << 0)
  51. #define SSCOQCE0 0x506c0270
  52. #define SSC_LINE_SIZE 128
  53. #define SSC_RANGE_OP_MAX_SIZE (0x00400000 - (SSC_LINE_SIZE))
  54. #endif /* ARCH_SSC_REGS_H */