car.S 2.2 KB

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  1. /*
  2. * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <config.h>
  7. #include <asm/pci.h>
  8. #include <asm/post.h>
  9. #include <asm/arch/quark.h>
  10. #include <asm/arch/msg_port.h>
  11. .globl car_init
  12. car_init:
  13. post_code(POST_CAR_START)
  14. /*
  15. * Quark SoC contains an embedded 512KiB SRAM (eSRAM) that is
  16. * initialized by hardware. eSRAM is the ideal place to be used
  17. * for Cache-As-RAM (CAR) before system memory is available.
  18. *
  19. * Relocate this eSRAM to a suitable location in the physical
  20. * memory map and enable it.
  21. */
  22. /* Host Memory Bound Register P03h:R08h */
  23. mov $((MSG_PORT_HOST_BRIDGE << 16) | (HM_BOUND << 8)), %eax
  24. mov $(DRAM_BASE + DRAM_MAX_SIZE + ESRAM_SIZE), %edx
  25. lea 1f, %esp
  26. jmp msg_port_write
  27. 1:
  28. /* eSRAM Block Page Control Register P05h:R82h */
  29. mov $((MSG_PORT_MEM_MGR << 16) | (ESRAM_BLK_CTRL << 8)), %eax
  30. mov $(ESRAM_BLOCK_MODE | (CONFIG_ESRAM_BASE >> 24)), %edx
  31. lea 2f, %esp
  32. jmp msg_port_write
  33. 2:
  34. post_code(POST_CAR_CPU_CACHE)
  35. jmp car_init_ret
  36. msg_port_read:
  37. /*
  38. * Parameter:
  39. * eax[23:16] - Message Port ID
  40. * eax[15:08] - Register Address
  41. *
  42. * Return Value:
  43. * eax - Message Port Register value
  44. *
  45. * Return Address: esp
  46. */
  47. or $((MSG_OP_READ << 24) | MSG_BYTE_ENABLE), %eax
  48. mov %eax, %ebx
  49. /* Write MCR B0:D0:F0:RD0 */
  50. mov $(PCI_CFG_EN | MSG_CTRL_REG), %eax
  51. mov $PCI_REG_ADDR, %dx
  52. out %eax, %dx
  53. mov $PCI_REG_DATA, %dx
  54. mov %ebx, %eax
  55. out %eax, %dx
  56. /* Read MDR B0:D0:F0:RD4 */
  57. mov $(PCI_CFG_EN | MSG_DATA_REG), %eax
  58. mov $PCI_REG_ADDR, %dx
  59. out %eax, %dx
  60. mov $PCI_REG_DATA, %dx
  61. in %dx, %eax
  62. jmp *%esp
  63. msg_port_write:
  64. /*
  65. * Parameter:
  66. * eax[23:16] - Message Port ID
  67. * eax[15:08] - Register Address
  68. * edx - Message Port Register value to write
  69. *
  70. * Return Address: esp
  71. */
  72. or $((MSG_OP_WRITE << 24) | MSG_BYTE_ENABLE), %eax
  73. mov %eax, %esi
  74. mov %edx, %edi
  75. /* Write MDR B0:D0:F0:RD4 */
  76. mov $(PCI_CFG_EN | MSG_DATA_REG), %eax
  77. mov $PCI_REG_ADDR, %dx
  78. out %eax, %dx
  79. mov $PCI_REG_DATA, %dx
  80. mov %edi, %eax
  81. out %eax, %dx
  82. /* Write MCR B0:D0:F0:RD0 */
  83. mov $(PCI_CFG_EN | MSG_CTRL_REG), %eax
  84. mov $PCI_REG_ADDR, %dx
  85. out %eax, %dx
  86. mov $PCI_REG_DATA, %dx
  87. mov %esi, %eax
  88. out %eax, %dx
  89. jmp *%esp