pci_rom.c 7.7 KB

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  1. /*
  2. * Copyright (C) 2014 Google, Inc
  3. *
  4. * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
  5. *
  6. * Modifications are:
  7. * Copyright (C) 2003-2004 Linux Networx
  8. * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
  9. * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com>
  10. * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov>
  11. * Copyright (C) 2005-2006 Tyan
  12. * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
  13. * Copyright (C) 2005-2009 coresystems GmbH
  14. * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
  15. *
  16. * PCI Bus Services, see include/linux/pci.h for further explanation.
  17. *
  18. * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
  19. * David Mosberger-Tang
  20. *
  21. * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
  22. * SPDX-License-Identifier: GPL-2.0
  23. */
  24. #include <common.h>
  25. #include <bios_emul.h>
  26. #include <errno.h>
  27. #include <malloc.h>
  28. #include <pci.h>
  29. #include <pci_rom.h>
  30. #include <vbe.h>
  31. #include <video_fb.h>
  32. #ifdef CONFIG_HAVE_ACPI_RESUME
  33. #include <asm/acpi.h>
  34. #endif
  35. __weak bool board_should_run_oprom(pci_dev_t dev)
  36. {
  37. return true;
  38. }
  39. static bool should_load_oprom(pci_dev_t dev)
  40. {
  41. #ifdef CONFIG_HAVE_ACPI_RESUME
  42. if (acpi_get_slp_type() == 3)
  43. return false;
  44. #endif
  45. if (IS_ENABLED(CONFIG_ALWAYS_LOAD_OPROM))
  46. return 1;
  47. if (board_should_run_oprom(dev))
  48. return 1;
  49. return 0;
  50. }
  51. __weak uint32_t board_map_oprom_vendev(uint32_t vendev)
  52. {
  53. return vendev;
  54. }
  55. static int pci_rom_probe(pci_dev_t dev, uint class,
  56. struct pci_rom_header **hdrp)
  57. {
  58. struct pci_rom_header *rom_header;
  59. struct pci_rom_data *rom_data;
  60. u16 vendor, device;
  61. u16 rom_vendor, rom_device;
  62. u32 rom_class;
  63. u32 vendev;
  64. u32 mapped_vendev;
  65. u32 rom_address;
  66. pci_read_config_word(dev, PCI_VENDOR_ID, &vendor);
  67. pci_read_config_word(dev, PCI_DEVICE_ID, &device);
  68. vendev = vendor << 16 | device;
  69. mapped_vendev = board_map_oprom_vendev(vendev);
  70. if (vendev != mapped_vendev)
  71. debug("Device ID mapped to %#08x\n", mapped_vendev);
  72. #ifdef CONFIG_X86_OPTION_ROM_ADDR
  73. rom_address = CONFIG_X86_OPTION_ROM_ADDR;
  74. #else
  75. if (pciauto_setup_rom(pci_bus_to_hose(PCI_BUS(dev)), dev)) {
  76. debug("Cannot find option ROM\n");
  77. return -ENOENT;
  78. }
  79. pci_read_config_dword(dev, PCI_ROM_ADDRESS, &rom_address);
  80. if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
  81. debug("%s: rom_address=%x\n", __func__, rom_address);
  82. return -ENOENT;
  83. }
  84. /* Enable expansion ROM address decoding. */
  85. pci_write_config_dword(dev, PCI_ROM_ADDRESS,
  86. rom_address | PCI_ROM_ADDRESS_ENABLE);
  87. #endif
  88. debug("Option ROM address %x\n", rom_address);
  89. rom_header = (struct pci_rom_header *)(unsigned long)rom_address;
  90. debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
  91. le16_to_cpu(rom_header->signature),
  92. rom_header->size * 512, le16_to_cpu(rom_header->data));
  93. if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
  94. printf("Incorrect expansion ROM header signature %04x\n",
  95. le16_to_cpu(rom_header->signature));
  96. return -EINVAL;
  97. }
  98. rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data));
  99. rom_vendor = le16_to_cpu(rom_data->vendor);
  100. rom_device = le16_to_cpu(rom_data->device);
  101. debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
  102. rom_vendor, rom_device);
  103. /* If the device id is mapped, a mismatch is expected */
  104. if ((vendor != rom_vendor || device != rom_device) &&
  105. (vendev == mapped_vendev)) {
  106. printf("ID mismatch: vendor ID %04x, device ID %04x\n",
  107. rom_vendor, rom_device);
  108. /* Continue anyway */
  109. }
  110. rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo;
  111. debug("PCI ROM image, Class Code %06x, Code Type %02x\n",
  112. rom_class, rom_data->type);
  113. if (class != rom_class) {
  114. debug("Class Code mismatch ROM %06x, dev %06x\n",
  115. rom_class, class);
  116. }
  117. *hdrp = rom_header;
  118. return 0;
  119. }
  120. int pci_rom_load(struct pci_rom_header *rom_header,
  121. struct pci_rom_header **ram_headerp)
  122. {
  123. struct pci_rom_data *rom_data;
  124. unsigned int rom_size;
  125. unsigned int image_size = 0;
  126. void *target;
  127. do {
  128. /* Get next image, until we see an x86 version */
  129. rom_header = (struct pci_rom_header *)((void *)rom_header +
  130. image_size);
  131. rom_data = (struct pci_rom_data *)((void *)rom_header +
  132. le16_to_cpu(rom_header->data));
  133. image_size = le16_to_cpu(rom_data->ilen) * 512;
  134. } while ((rom_data->type != 0) && (rom_data->indicator == 0));
  135. if (rom_data->type != 0)
  136. return -EACCES;
  137. rom_size = rom_header->size * 512;
  138. #ifdef PCI_VGA_RAM_IMAGE_START
  139. target = (void *)PCI_VGA_RAM_IMAGE_START;
  140. #else
  141. target = (void *)malloc(rom_size);
  142. if (!target)
  143. return -ENOMEM;
  144. #endif
  145. if (target != rom_header) {
  146. ulong start = get_timer(0);
  147. debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
  148. rom_header, target, rom_size);
  149. memcpy(target, rom_header, rom_size);
  150. if (memcmp(target, rom_header, rom_size)) {
  151. printf("VGA ROM copy failed\n");
  152. return -EFAULT;
  153. }
  154. debug("Copy took %lums\n", get_timer(start));
  155. }
  156. *ram_headerp = target;
  157. return 0;
  158. }
  159. static struct vbe_mode_info mode_info;
  160. int vbe_get_video_info(struct graphic_device *gdev)
  161. {
  162. #ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
  163. struct vesa_mode_info *vesa = &mode_info.vesa;
  164. gdev->winSizeX = vesa->x_resolution;
  165. gdev->winSizeY = vesa->y_resolution;
  166. gdev->plnSizeX = vesa->x_resolution;
  167. gdev->plnSizeY = vesa->y_resolution;
  168. gdev->gdfBytesPP = vesa->bits_per_pixel / 8;
  169. switch (vesa->bits_per_pixel) {
  170. case 32:
  171. case 24:
  172. gdev->gdfIndex = GDF_32BIT_X888RGB;
  173. break;
  174. case 16:
  175. gdev->gdfIndex = GDF_16BIT_565RGB;
  176. break;
  177. default:
  178. gdev->gdfIndex = GDF__8BIT_INDEX;
  179. break;
  180. }
  181. gdev->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS;
  182. gdev->pciBase = vesa->phys_base_ptr;
  183. gdev->frameAdrs = vesa->phys_base_ptr;
  184. gdev->memSize = vesa->bytes_per_scanline * vesa->y_resolution;
  185. gdev->vprBase = vesa->phys_base_ptr;
  186. gdev->cprBase = vesa->phys_base_ptr;
  187. return gdev->winSizeX ? 0 : -ENOSYS;
  188. #else
  189. return -ENOSYS;
  190. #endif
  191. }
  192. int pci_run_vga_bios(pci_dev_t dev, int (*int15_handler)(void), int exec_method)
  193. {
  194. struct pci_rom_header *rom, *ram;
  195. int vesa_mode = -1;
  196. uint class;
  197. bool emulate;
  198. int ret;
  199. /* Only execute VGA ROMs */
  200. pci_read_config_dword(dev, PCI_REVISION_ID, &class);
  201. if (((class >> 16) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
  202. debug("%s: Class %#x, should be %#x\n", __func__, class,
  203. PCI_CLASS_DISPLAY_VGA);
  204. return -ENODEV;
  205. }
  206. class >>= 8;
  207. if (!should_load_oprom(dev))
  208. return -ENXIO;
  209. ret = pci_rom_probe(dev, class, &rom);
  210. if (ret)
  211. return ret;
  212. ret = pci_rom_load(rom, &ram);
  213. if (ret)
  214. return ret;
  215. if (!board_should_run_oprom(dev))
  216. return -ENXIO;
  217. #if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
  218. defined(CONFIG_FRAMEBUFFER_VESA_MODE)
  219. vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
  220. #endif
  221. debug("Selected vesa mode %#x\n", vesa_mode);
  222. if (exec_method & PCI_ROM_USE_NATIVE) {
  223. #ifdef CONFIG_X86
  224. emulate = false;
  225. #else
  226. if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
  227. printf("BIOS native execution is only available on x86\n");
  228. return -ENOSYS;
  229. }
  230. emulate = true;
  231. #endif
  232. } else {
  233. #ifdef CONFIG_BIOSEMU
  234. emulate = true;
  235. #else
  236. if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
  237. printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
  238. return -ENOSYS;
  239. }
  240. emulate = false;
  241. #endif
  242. }
  243. if (emulate) {
  244. #ifdef CONFIG_BIOSEMU
  245. BE_VGAInfo *info;
  246. ret = biosemu_setup(dev, &info);
  247. if (ret)
  248. return ret;
  249. biosemu_set_interrupt_handler(0x15, int15_handler);
  250. ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info, true,
  251. vesa_mode, &mode_info);
  252. if (ret)
  253. return ret;
  254. #endif
  255. } else {
  256. #ifdef CONFIG_X86
  257. bios_set_interrupt_handler(0x15, int15_handler);
  258. bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
  259. &mode_info);
  260. #endif
  261. }
  262. debug("Final vesa mode %#x\n", mode_info.video_mode);
  263. return 0;
  264. }