sf_probe.c 12 KB

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  1. /*
  2. * SPI flash probing
  3. *
  4. * Copyright (C) 2008 Atmel Corporation
  5. * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
  6. * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
  7. *
  8. * SPDX-License-Identifier: GPL-2.0+
  9. */
  10. #include <common.h>
  11. #include <fdtdec.h>
  12. #include <malloc.h>
  13. #include <spi.h>
  14. #include <spi_flash.h>
  15. #include "sf_internal.h"
  16. DECLARE_GLOBAL_DATA_PTR;
  17. /**
  18. * struct spi_flash_params - SPI/QSPI flash device params structure
  19. *
  20. * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
  21. * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
  22. * @ext_jedec: Device ext_jedec ID
  23. * @sector_size: Sector size of this device
  24. * @nr_sectors: No.of sectors on this device
  25. * @flags: Importent param, for flash specific behaviour
  26. */
  27. struct spi_flash_params {
  28. const char *name;
  29. u32 jedec;
  30. u16 ext_jedec;
  31. u32 sector_size;
  32. u32 nr_sectors;
  33. u16 flags;
  34. };
  35. static const struct spi_flash_params spi_flash_params_table[] = {
  36. #ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
  37. {"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, SECT_4K},
  38. {"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, SECT_4K},
  39. {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, SECT_4K},
  40. {"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, SECT_4K},
  41. {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, SECT_4K},
  42. {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, SECT_4K},
  43. {"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, SECT_4K},
  44. #endif
  45. #ifdef CONFIG_SPI_FLASH_EON /* EON */
  46. {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0},
  47. {"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, SECT_4K},
  48. {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0},
  49. {"EN25S64", 0x1c3817, 0x0, 64 * 1024, 128, 0},
  50. #endif
  51. #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
  52. {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, SECT_4K},
  53. {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, SECT_4K},
  54. #endif
  55. #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
  56. {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0},
  57. {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0},
  58. {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0},
  59. {"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, 0},
  60. {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0},
  61. {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, 0},
  62. {"MX25L25635F", 0xc22019, 0x0, 64 * 1024, 512, 0},
  63. {"MX25L51235F", 0xc2201A, 0x0, 64 * 1024, 1024, 0},
  64. {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, 0},
  65. #endif
  66. #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
  67. {"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, 0},
  68. {"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0},
  69. {"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0},
  70. {"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0},
  71. {"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, 0},
  72. {"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, 0},
  73. {"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, 0},
  74. {"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, 0},
  75. {"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, 0},
  76. {"S25FL256S_256K", 0x010219, 0x4d00, 64 * 1024, 512, 0},
  77. {"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, 0},
  78. {"S25FL512S_256K", 0x010220, 0x4d00, 64 * 1024, 1024, 0},
  79. {"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, 0},
  80. #endif
  81. #ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */
  82. {"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0},
  83. {"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0},
  84. {"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0},
  85. {"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0},
  86. {"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0},
  87. {"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0},
  88. {"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0},
  89. {"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0},
  90. {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, SECT_4K},
  91. {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, SECT_4K},
  92. {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, SECT_4K},
  93. {"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, SECT_4K},
  94. {"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, SECT_4K},
  95. {"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, SECT_4K},
  96. {"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, SECT_4K},
  97. {"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, SECT_4K},
  98. {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, E_FSR | SECT_4K},
  99. {"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, E_FSR | SECT_4K},
  100. {"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, E_FSR | SECT_4K},
  101. {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, E_FSR | SECT_4K},
  102. #endif
  103. #ifdef CONFIG_SPI_FLASH_SST /* SST */
  104. {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WP},
  105. {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WP},
  106. {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WP},
  107. {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WP},
  108. {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, SECT_4K},
  109. {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WP},
  110. {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WP},
  111. {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WP},
  112. {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WP},
  113. {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WP},
  114. #endif
  115. #ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */
  116. {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0},
  117. {"W25P16", 0xef2015, 0x0, 64 * 1024, 32, 0},
  118. {"W25P32", 0xef2016, 0x0, 64 * 1024, 64, 0},
  119. {"W25X40", 0xef3013, 0x0, 64 * 1024, 8, SECT_4K},
  120. {"W25X16", 0xef3015, 0x0, 64 * 1024, 32, SECT_4K},
  121. {"W25X32", 0xef3016, 0x0, 64 * 1024, 64, SECT_4K},
  122. {"W25X64", 0xef3017, 0x0, 64 * 1024, 128, SECT_4K},
  123. {"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, SECT_4K},
  124. {"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, SECT_4K},
  125. {"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, SECT_4K},
  126. {"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, SECT_4K},
  127. {"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, SECT_4K},
  128. {"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, SECT_4K},
  129. {"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, SECT_4K},
  130. {"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, SECT_4K},
  131. {"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, SECT_4K},
  132. {"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, SECT_4K},
  133. {"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, SECT_4K},
  134. #endif
  135. /*
  136. * Note:
  137. * Below paired flash devices has similar spi_flash params.
  138. * (S25FL129P_64K, S25FL128S_64K)
  139. * (W25Q80BL, W25Q80BV)
  140. * (W25Q16CL, W25Q16DV)
  141. * (W25Q32BV, W25Q32FV_SPI)
  142. * (W25Q64CV, W25Q64FV_SPI)
  143. * (W25Q128BV, W25Q128FV_SPI)
  144. * (W25Q32DW, W25Q32FV_QPI)
  145. * (W25Q64DW, W25Q64FV_QPI)
  146. * (W25Q128FW, W25Q128FV_QPI)
  147. */
  148. };
  149. static struct spi_flash *spi_flash_validate_params(struct spi_slave *spi,
  150. u8 *idcode)
  151. {
  152. const struct spi_flash_params *params;
  153. struct spi_flash *flash;
  154. int i;
  155. u16 jedec = idcode[1] << 8 | idcode[2];
  156. u16 ext_jedec = idcode[3] << 8 | idcode[4];
  157. /* Get the flash id (jedec = manuf_id + dev_id, ext_jedec) */
  158. for (i = 0; i < ARRAY_SIZE(spi_flash_params_table); i++) {
  159. params = &spi_flash_params_table[i];
  160. if ((params->jedec >> 16) == idcode[0]) {
  161. if ((params->jedec & 0xFFFF) == jedec) {
  162. if (params->ext_jedec == 0)
  163. break;
  164. else if (params->ext_jedec == ext_jedec)
  165. break;
  166. }
  167. }
  168. }
  169. if (i == ARRAY_SIZE(spi_flash_params_table)) {
  170. printf("SF: Unsupported flash IDs: ");
  171. printf("manuf %02x, jedec %04x, ext_jedec %04x\n",
  172. idcode[0], jedec, ext_jedec);
  173. return NULL;
  174. }
  175. flash = malloc(sizeof(*flash));
  176. if (!flash) {
  177. debug("SF: Failed to allocate spi_flash\n");
  178. return NULL;
  179. }
  180. memset(flash, '\0', sizeof(*flash));
  181. /* Assign spi data */
  182. flash->spi = spi;
  183. flash->name = params->name;
  184. flash->memory_map = spi->memory_map;
  185. /* Assign spi_flash ops */
  186. flash->write = spi_flash_cmd_write_ops;
  187. #ifdef CONFIG_SPI_FLASH_SST
  188. if (params->flags & SST_WP)
  189. flash->write = sst_write_wp;
  190. #endif
  191. flash->erase = spi_flash_cmd_erase_ops;
  192. flash->read = spi_flash_cmd_read_ops;
  193. /* Compute the flash size */
  194. flash->page_size = (ext_jedec == 0x4d00) ? 512 : 256;
  195. flash->sector_size = params->sector_size;
  196. flash->size = flash->sector_size * params->nr_sectors;
  197. /* Compute erase sector and command */
  198. if (params->flags & SECT_4K) {
  199. flash->erase_cmd = CMD_ERASE_4K;
  200. flash->erase_size = 4096;
  201. } else if (params->flags & SECT_32K) {
  202. flash->erase_cmd = CMD_ERASE_32K;
  203. flash->erase_size = 32768;
  204. } else {
  205. flash->erase_cmd = CMD_ERASE_64K;
  206. flash->erase_size = flash->sector_size;
  207. }
  208. /* Poll cmd seclection */
  209. flash->poll_cmd = CMD_READ_STATUS;
  210. #ifdef CONFIG_SPI_FLASH_STMICRO
  211. if (params->flags & E_FSR)
  212. flash->poll_cmd = CMD_FLAG_STATUS;
  213. #endif
  214. /* Configure the BAR - discover bank cmds and read current bank */
  215. #ifdef CONFIG_SPI_FLASH_BAR
  216. u8 curr_bank = 0;
  217. if (flash->size > SPI_FLASH_16MB_BOUN) {
  218. flash->bank_read_cmd = (idcode[0] == 0x01) ?
  219. CMD_BANKADDR_BRRD : CMD_EXTNADDR_RDEAR;
  220. flash->bank_write_cmd = (idcode[0] == 0x01) ?
  221. CMD_BANKADDR_BRWR : CMD_EXTNADDR_WREAR;
  222. if (spi_flash_read_common(flash, &flash->bank_read_cmd, 1,
  223. &curr_bank, 1)) {
  224. debug("SF: fail to read bank addr register\n");
  225. return NULL;
  226. }
  227. flash->bank_curr = curr_bank;
  228. } else {
  229. flash->bank_curr = curr_bank;
  230. }
  231. #endif
  232. /* Flash powers up read-only, so clear BP# bits */
  233. #if defined(CONFIG_SPI_FLASH_ATMEL) || \
  234. defined(CONFIG_SPI_FLASH_MACRONIX) || \
  235. defined(CONFIG_SPI_FLASH_SST)
  236. spi_flash_cmd_write_status(flash, 0);
  237. #endif
  238. return flash;
  239. }
  240. #ifdef CONFIG_OF_CONTROL
  241. int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
  242. {
  243. fdt_addr_t addr;
  244. fdt_size_t size;
  245. int node;
  246. /* If there is no node, do nothing */
  247. node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
  248. if (node < 0)
  249. return 0;
  250. addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
  251. if (addr == FDT_ADDR_T_NONE) {
  252. debug("%s: Cannot decode address\n", __func__);
  253. return 0;
  254. }
  255. if (flash->size != size) {
  256. debug("%s: Memory map must cover entire device\n", __func__);
  257. return -1;
  258. }
  259. flash->memory_map = (void *)addr;
  260. return 0;
  261. }
  262. #endif /* CONFIG_OF_CONTROL */
  263. struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
  264. unsigned int max_hz, unsigned int spi_mode)
  265. {
  266. struct spi_slave *spi;
  267. struct spi_flash *flash = NULL;
  268. u8 idcode[5];
  269. int ret;
  270. /* Setup spi_slave */
  271. spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
  272. if (!spi) {
  273. printf("SF: Failed to set up slave\n");
  274. return NULL;
  275. }
  276. /* Claim spi bus */
  277. ret = spi_claim_bus(spi);
  278. if (ret) {
  279. debug("SF: Failed to claim SPI bus: %d\n", ret);
  280. goto err_claim_bus;
  281. }
  282. /* Read the ID codes */
  283. ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
  284. if (ret) {
  285. printf("SF: Failed to get idcodes\n");
  286. goto err_read_id;
  287. }
  288. #ifdef DEBUG
  289. printf("SF: Got idcodes\n");
  290. print_buffer(0, idcode, 1, sizeof(idcode), 0);
  291. #endif
  292. /* Validate params from spi_flash_params table */
  293. flash = spi_flash_validate_params(spi, idcode);
  294. if (!flash)
  295. goto err_read_id;
  296. #ifdef CONFIG_OF_CONTROL
  297. if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
  298. debug("SF: FDT decode error\n");
  299. goto err_read_id;
  300. }
  301. #endif
  302. #ifndef CONFIG_SPL_BUILD
  303. printf("SF: Detected %s with page size ", flash->name);
  304. print_size(flash->page_size, ", erase size ");
  305. print_size(flash->erase_size, ", total ");
  306. print_size(flash->size, "");
  307. if (flash->memory_map)
  308. printf(", mapped at %p", flash->memory_map);
  309. puts("\n");
  310. #endif
  311. #ifndef CONFIG_SPI_FLASH_BAR
  312. if (flash->size > SPI_FLASH_16MB_BOUN) {
  313. puts("SF: Warning - Only lower 16MiB accessible,");
  314. puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");
  315. }
  316. #endif
  317. /* Release spi bus */
  318. spi_release_bus(spi);
  319. return flash;
  320. err_read_id:
  321. spi_release_bus(spi);
  322. err_claim_bus:
  323. spi_free_slave(spi);
  324. return NULL;
  325. }
  326. void spi_flash_free(struct spi_flash *flash)
  327. {
  328. spi_free_slave(flash->spi);
  329. free(flash);
  330. }