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u-boot
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arch
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arm
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include
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asm
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arch-keystone
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ddr3.h

ddr3.h 1.0 KB
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  1. /*
    2. 

  2.  * DDR3
    3. 

  3.  *
    4. 

  4.  * (C) Copyright 2014
    5. 

  5.  *     Texas Instruments Incorporated, <www.ti.com>
    6. 

  6.  *
    7. 

  7.  * SPDX-License-Identifier:     GPL-2.0+
    8. 

  8.  */
    9. 

  9. 

  10. #ifndef _DDR3_H_
    11. 

  11. #define _DDR3_H_
    12. 

  12. 

  13. #include <asm/arch/hardware.h>
    14. 

  14. 

  15. struct ddr3_phy_config {
    16. 

  16. 	unsigned int pllcr;
    17. 

  17. 	unsigned int pgcr1_mask;
    18. 

  18. 	unsigned int pgcr1_val;
    19. 

  19. 	unsigned int ptr0;
    20. 

  20. 	unsigned int ptr1;
    21. 

  21. 	unsigned int ptr2;
    22. 

  22. 	unsigned int ptr3;
    23. 

  23. 	unsigned int ptr4;
    24. 

  24. 	unsigned int dcr_mask;
    25. 

  25. 	unsigned int dcr_val;
    26. 

  26. 	unsigned int dtpr0;
    27. 

  27. 	unsigned int dtpr1;
    28. 

  28. 	unsigned int dtpr2;
    29. 

  29. 	unsigned int mr0;
    30. 

  30. 	unsigned int mr1;
    31. 

  31. 	unsigned int mr2;
    32. 

  32. 	unsigned int dtcr;
    33. 

  33. 	unsigned int pgcr2;
    34. 

  34. 	unsigned int zq0cr1;
    35. 

  35. 	unsigned int zq1cr1;
    36. 

  36. 	unsigned int zq2cr1;
    37. 

  37. 	unsigned int pir_v1;
    38. 

  38. 	unsigned int pir_v2;
    39. 

  39. };
    40. 

  40. 

  41. struct ddr3_emif_config {
    42. 

  42. 	unsigned int sdcfg;
    43. 

  43. 	unsigned int sdtim1;
    44. 

  44. 	unsigned int sdtim2;
    45. 

  45. 	unsigned int sdtim3;
    46. 

  46. 	unsigned int sdtim4;
    47. 

  47. 	unsigned int zqcfg;
    48. 

  48. 	unsigned int sdrfc;
    49. 

  49. };
    50. 

  50. 

  51. void ddr3_init(void);
    52. 

  52. void ddr3_init_ddrphy(u32 base, struct ddr3_phy_config *phy_cfg);
    53. 

  53. void ddr3_init_ddremif(u32 base, struct ddr3_emif_config *emif_cfg);
    54. 

  54. 

  55. #endif
    56.