mrccache.c 6.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * From coreboot src/southbridge/intel/bd82x6x/mrccache.c
  4. *
  5. * Copyright (C) 2014 Google Inc.
  6. * Copyright (C) 2015 Bin Meng <bmeng.cn@gmail.com>
  7. */
  8. #include <common.h>
  9. #include <dm.h>
  10. #include <errno.h>
  11. #include <fdtdec.h>
  12. #include <net.h>
  13. #include <spi.h>
  14. #include <spi_flash.h>
  15. #include <asm/mrccache.h>
  16. DECLARE_GLOBAL_DATA_PTR;
  17. static struct mrc_data_container *next_mrc_block(
  18. struct mrc_data_container *cache)
  19. {
  20. /* MRC data blocks are aligned within the region */
  21. u32 mrc_size = sizeof(*cache) + cache->data_size;
  22. u8 *region_ptr = (u8 *)cache;
  23. if (mrc_size & (MRC_DATA_ALIGN - 1UL)) {
  24. mrc_size &= ~(MRC_DATA_ALIGN - 1UL);
  25. mrc_size += MRC_DATA_ALIGN;
  26. }
  27. region_ptr += mrc_size;
  28. return (struct mrc_data_container *)region_ptr;
  29. }
  30. static int is_mrc_cache(struct mrc_data_container *cache)
  31. {
  32. return cache && (cache->signature == MRC_DATA_SIGNATURE);
  33. }
  34. struct mrc_data_container *mrccache_find_current(struct mrc_region *entry)
  35. {
  36. struct mrc_data_container *cache, *next;
  37. ulong base_addr, end_addr;
  38. uint id;
  39. base_addr = entry->base + entry->offset;
  40. end_addr = base_addr + entry->length;
  41. cache = NULL;
  42. /* Search for the last filled entry in the region */
  43. for (id = 0, next = (struct mrc_data_container *)base_addr;
  44. is_mrc_cache(next);
  45. id++) {
  46. cache = next;
  47. next = next_mrc_block(next);
  48. if ((ulong)next >= end_addr)
  49. break;
  50. }
  51. if (id-- == 0) {
  52. debug("%s: No valid MRC cache found.\n", __func__);
  53. return NULL;
  54. }
  55. /* Verify checksum */
  56. if (cache->checksum != compute_ip_checksum(cache->data,
  57. cache->data_size)) {
  58. printf("%s: MRC cache checksum mismatch\n", __func__);
  59. return NULL;
  60. }
  61. debug("%s: picked entry %u from cache block\n", __func__, id);
  62. return cache;
  63. }
  64. /**
  65. * find_next_mrc_cache() - get next cache entry
  66. *
  67. * @entry: MRC cache flash area
  68. * @cache: Entry to start from
  69. *
  70. * @return next cache entry if found, NULL if we got to the end
  71. */
  72. static struct mrc_data_container *find_next_mrc_cache(struct mrc_region *entry,
  73. struct mrc_data_container *cache)
  74. {
  75. ulong base_addr, end_addr;
  76. base_addr = entry->base + entry->offset;
  77. end_addr = base_addr + entry->length;
  78. cache = next_mrc_block(cache);
  79. if ((ulong)cache >= end_addr) {
  80. /* Crossed the boundary */
  81. cache = NULL;
  82. debug("%s: no available entries found\n", __func__);
  83. } else {
  84. debug("%s: picked next entry from cache block at %p\n",
  85. __func__, cache);
  86. }
  87. return cache;
  88. }
  89. int mrccache_update(struct udevice *sf, struct mrc_region *entry,
  90. struct mrc_data_container *cur)
  91. {
  92. struct mrc_data_container *cache;
  93. ulong offset;
  94. ulong base_addr;
  95. int ret;
  96. if (!is_mrc_cache(cur))
  97. return -EINVAL;
  98. /* Find the last used block */
  99. base_addr = entry->base + entry->offset;
  100. debug("Updating MRC cache data\n");
  101. cache = mrccache_find_current(entry);
  102. if (cache && (cache->data_size == cur->data_size) &&
  103. (!memcmp(cache, cur, cache->data_size + sizeof(*cur)))) {
  104. debug("MRC data in flash is up to date. No update\n");
  105. return -EEXIST;
  106. }
  107. /* Move to the next block, which will be the first unused block */
  108. if (cache)
  109. cache = find_next_mrc_cache(entry, cache);
  110. /*
  111. * If we have got to the end, erase the entire mrc-cache area and start
  112. * again at block 0.
  113. */
  114. if (!cache) {
  115. debug("Erasing the MRC cache region of %x bytes at %x\n",
  116. entry->length, entry->offset);
  117. ret = spi_flash_erase_dm(sf, entry->offset, entry->length);
  118. if (ret) {
  119. debug("Failed to erase flash region\n");
  120. return ret;
  121. }
  122. cache = (struct mrc_data_container *)base_addr;
  123. }
  124. /* Write the data out */
  125. offset = (ulong)cache - base_addr + entry->offset;
  126. debug("Write MRC cache update to flash at %lx\n", offset);
  127. ret = spi_flash_write_dm(sf, offset, cur->data_size + sizeof(*cur),
  128. cur);
  129. if (ret) {
  130. debug("Failed to write to SPI flash\n");
  131. return ret;
  132. }
  133. return 0;
  134. }
  135. int mrccache_reserve(void)
  136. {
  137. struct mrc_data_container *cache;
  138. u16 checksum;
  139. if (!gd->arch.mrc_output_len)
  140. return 0;
  141. /* adjust stack pointer to store pure cache data plus the header */
  142. gd->start_addr_sp -= (gd->arch.mrc_output_len + MRC_DATA_HEADER_SIZE);
  143. cache = (struct mrc_data_container *)gd->start_addr_sp;
  144. cache->signature = MRC_DATA_SIGNATURE;
  145. cache->data_size = gd->arch.mrc_output_len;
  146. checksum = compute_ip_checksum(gd->arch.mrc_output, cache->data_size);
  147. debug("Saving %d bytes for MRC output data, checksum %04x\n",
  148. cache->data_size, checksum);
  149. cache->checksum = checksum;
  150. cache->reserved = 0;
  151. memcpy(cache->data, gd->arch.mrc_output, cache->data_size);
  152. /* gd->arch.mrc_output now points to the container */
  153. gd->arch.mrc_output = (char *)cache;
  154. gd->start_addr_sp &= ~0xf;
  155. return 0;
  156. }
  157. int mrccache_get_region(struct udevice **devp, struct mrc_region *entry)
  158. {
  159. const void *blob = gd->fdt_blob;
  160. int node, mrc_node;
  161. u32 reg[2];
  162. int ret;
  163. /* Find the flash chip within the SPI controller node */
  164. node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
  165. if (node < 0) {
  166. debug("%s: Cannot find SPI flash\n", __func__);
  167. return -ENOENT;
  168. }
  169. if (fdtdec_get_int_array(blob, node, "memory-map", reg, 2))
  170. return -EINVAL;
  171. entry->base = reg[0];
  172. /* Find the place where we put the MRC cache */
  173. mrc_node = fdt_subnode_offset(blob, node, "rw-mrc-cache");
  174. if (mrc_node < 0)
  175. return -EPERM;
  176. if (fdtdec_get_int_array(blob, mrc_node, "reg", reg, 2))
  177. return -EINVAL;
  178. entry->offset = reg[0];
  179. entry->length = reg[1];
  180. if (devp) {
  181. ret = uclass_get_device_by_of_offset(UCLASS_SPI_FLASH, node,
  182. devp);
  183. debug("ret = %d\n", ret);
  184. if (ret)
  185. return ret;
  186. }
  187. return 0;
  188. }
  189. int mrccache_save(void)
  190. {
  191. struct mrc_data_container *data;
  192. struct mrc_region entry;
  193. struct udevice *sf;
  194. int ret;
  195. if (!gd->arch.mrc_output_len)
  196. return 0;
  197. debug("Saving %d bytes of MRC output data to SPI flash\n",
  198. gd->arch.mrc_output_len);
  199. ret = mrccache_get_region(&sf, &entry);
  200. if (ret)
  201. goto err_entry;
  202. data = (struct mrc_data_container *)gd->arch.mrc_output;
  203. ret = mrccache_update(sf, &entry, data);
  204. if (!ret) {
  205. debug("Saved MRC data with checksum %04x\n", data->checksum);
  206. } else if (ret == -EEXIST) {
  207. debug("MRC data is the same as last time, skipping save\n");
  208. ret = 0;
  209. }
  210. err_entry:
  211. if (ret)
  212. debug("%s: Failed: %d\n", __func__, ret);
  213. return ret;
  214. }