pic32mzda.dtsi 4.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2015 Microchip Technology, Inc.
  4. * Purna Chandra Mandal, <purna.mandal@microchip.com>
  5. */
  6. #include <dt-bindings/interrupt-controller/irq.h>
  7. #include <dt-bindings/clock/microchip,clock.h>
  8. #include <dt-bindings/gpio/gpio.h>
  9. #include "skeleton.dtsi"
  10. / {
  11. compatible = "microchip,pic32mzda", "microchip,pic32mz";
  12. aliases {
  13. gpio0 = &gpioA;
  14. gpio1 = &gpioB;
  15. gpio2 = &gpioC;
  16. gpio3 = &gpioD;
  17. gpio4 = &gpioE;
  18. gpio5 = &gpioF;
  19. gpio6 = &gpioG;
  20. gpio7 = &gpioH;
  21. gpio8 = &gpioJ;
  22. gpio9 = &gpioK;
  23. };
  24. cpus {
  25. cpu@0 {
  26. compatible = "mips,mips14kc";
  27. };
  28. };
  29. clock: clk@1f801200 {
  30. compatible = "microchip,pic32mzda-clk";
  31. reg = <0x1f801200 0x1000>;
  32. #clock-cells = <1>;
  33. };
  34. uart1: serial@1f822000 {
  35. compatible = "microchip,pic32mzda-uart";
  36. reg = <0x1f822000 0x50>;
  37. interrupts = <112 IRQ_TYPE_LEVEL_HIGH>;
  38. status = "disabled";
  39. clocks = <&clock PB2CLK>;
  40. };
  41. uart2: serial@1f822200 {
  42. compatible = "microchip,pic32mzda-uart";
  43. reg = <0x1f822200 0x50>;
  44. interrupts = <145 IRQ_TYPE_LEVEL_HIGH>;
  45. clocks = <&clock PB2CLK>;
  46. status = "disabled";
  47. };
  48. uart6: serial@1f822a00 {
  49. compatible = "microchip,pic32mzda-uart";
  50. reg = <0x1f822a00 0x50>;
  51. interrupts = <188 IRQ_TYPE_LEVEL_HIGH>;
  52. clocks = <&clock PB2CLK>;
  53. status = "disabled";
  54. };
  55. evic: interrupt-controller@1f810000 {
  56. compatible = "microchip,pic32mzda-evic";
  57. interrupt-controller;
  58. #interrupt-cells = <2>;
  59. reg = <0x1f810000 0x1000>;
  60. };
  61. pinctrl: pinctrl@1f801400 {
  62. compatible = "microchip,pic32mzda-pinctrl";
  63. reg = <0x1f801400 0x100>, /* in */
  64. <0x1f801500 0x200>, /* out */
  65. <0x1f860000 0xa00>; /* port */
  66. reg-names = "ppsin","ppsout","port";
  67. status = "disabled";
  68. ranges = <0 0x1f860000 0xa00>;
  69. #address-cells = <1>;
  70. #size-cells = <1>;
  71. gpioA: gpio0@0 {
  72. compatible = "microchip,pic32mzda-gpio";
  73. reg = <0x000 0x48>;
  74. gpio-controller;
  75. #gpio-cells = <2>;
  76. };
  77. gpioB: gpio1@100 {
  78. compatible = "microchip,pic32mzda-gpio";
  79. reg = <0x100 0x48>;
  80. gpio-controller;
  81. #gpio-cells = <2>;
  82. };
  83. gpioC: gpio2@200 {
  84. compatible = "microchip,pic32mzda-gpio";
  85. reg = <0x200 0x48>;
  86. gpio-controller;
  87. #gpio-cells = <2>;
  88. };
  89. gpioD: gpio3@300 {
  90. compatible = "microchip,pic32mzda-gpio";
  91. reg = <0x300 0x48>;
  92. gpio-controller;
  93. #gpio-cells = <2>;
  94. };
  95. gpioE: gpio4@400 {
  96. compatible = "microchip,pic32mzda-gpio";
  97. reg = <0x400 0x48>;
  98. gpio-controller;
  99. #gpio-cells = <2>;
  100. };
  101. gpioF: gpio5@500 {
  102. compatible = "microchip,pic32mzda-gpio";
  103. reg = <0x500 0x48>;
  104. gpio-controller;
  105. #gpio-cells = <2>;
  106. };
  107. gpioG: gpio6@600 {
  108. compatible = "microchip,pic32mzda-gpio";
  109. reg = <0x600 0x48>;
  110. gpio-controller;
  111. #gpio-cells = <2>;
  112. };
  113. gpioH: gpio7@700 {
  114. compatible = "microchip,pic32mzda-gpio";
  115. reg = <0x700 0x48>;
  116. gpio-controller;
  117. #gpio-cells = <2>;
  118. };
  119. gpioJ: gpio8@800 {
  120. compatible = "microchip,pic32mzda-gpio";
  121. reg = <0x800 0x48>;
  122. gpio-controller;
  123. #gpio-cells = <2>;
  124. };
  125. gpioK: gpio9@900 {
  126. compatible = "microchip,pic32mzda-gpio";
  127. reg = <0x900 0x48>;
  128. gpio-controller;
  129. #gpio-cells = <2>;
  130. };
  131. };
  132. sdhci: sdhci@1f8ec000 {
  133. compatible = "microchip,pic32mzda-sdhci";
  134. reg = <0x1f8ec000 0x100>;
  135. interrupts = <191 IRQ_TYPE_LEVEL_HIGH>;
  136. clocks = <&clock REF4CLK>, <&clock PB5CLK>;
  137. clock-names = "base_clk", "sys_clk";
  138. clock-freq-min-max = <25000000>,<25000000>;
  139. bus-width = <4>;
  140. status = "disabled";
  141. };
  142. ethernet: ethernet@1f882000 {
  143. compatible = "microchip,pic32mzda-eth";
  144. reg = <0x1f882000 0x1000>;
  145. interrupts = <153 IRQ_TYPE_LEVEL_HIGH>;
  146. clocks = <&clock PB5CLK>;
  147. status = "disabled";
  148. #address-cells = <1>;
  149. #size-cells = <0>;
  150. };
  151. usb: musb@1f8e3000 {
  152. compatible = "microchip,pic32mzda-usb";
  153. reg = <0x1f8e3000 0x1000>,
  154. <0x1f884000 0x1000>;
  155. reg-names = "mc", "control";
  156. interrupts = <132 IRQ_TYPE_EDGE_RISING>,
  157. <133 IRQ_TYPE_LEVEL_HIGH>;
  158. clocks = <&clock PB5CLK>;
  159. clock-names = "usb_clk";
  160. status = "disabled";
  161. };
  162. };