clk-pxs2.c 1.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
  4. */
  5. #include <linux/bitops.h>
  6. #include <linux/io.h>
  7. #include "../init.h"
  8. #include "../sc-regs.h"
  9. void uniphier_pxs2_clk_init(void)
  10. {
  11. u32 tmp;
  12. /* deassert reset */
  13. tmp = readl(SC_RSTCTRL);
  14. #ifdef CONFIG_USB_DWC3_UNIPHIER
  15. tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO;
  16. #endif
  17. #ifdef CONFIG_NAND_DENALI
  18. tmp |= SC_RSTCTRL_NRST_NAND;
  19. #endif
  20. writel(tmp, SC_RSTCTRL);
  21. readl(SC_RSTCTRL); /* dummy read */
  22. #ifdef CONFIG_USB_DWC3_UNIPHIER
  23. tmp = readl(SC_RSTCTRL2);
  24. tmp |= SC_RSTCTRL2_NRST_USB3B1;
  25. writel(tmp, SC_RSTCTRL2);
  26. readl(SC_RSTCTRL2); /* dummy read */
  27. tmp = readl(SC_RSTCTRL6);
  28. tmp |= 0x37;
  29. writel(tmp, SC_RSTCTRL6);
  30. #endif
  31. /* provide clocks */
  32. tmp = readl(SC_CLKCTRL);
  33. #ifdef CONFIG_USB_DWC3_UNIPHIER
  34. tmp |= BIT(20) | BIT(19) | SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
  35. SC_CLKCTRL_CEN_GIO;
  36. #endif
  37. #ifdef CONFIG_NAND_DENALI
  38. tmp |= SC_CLKCTRL_CEN_NAND;
  39. #endif
  40. writel(tmp, SC_CLKCTRL);
  41. readl(SC_CLKCTRL); /* dummy read */
  42. }