clk-ld4.c 748 B

1234567891011121314151617181920212223242526272829303132333435
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2011-2015 Panasonic Corporation
  4. * Copyright (C) 2015-2016 Socionext Inc.
  5. * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  6. */
  7. #include <linux/io.h>
  8. #include "../init.h"
  9. #include "../sc-regs.h"
  10. void uniphier_ld4_clk_init(void)
  11. {
  12. u32 tmp;
  13. /* deassert reset */
  14. tmp = readl(SC_RSTCTRL);
  15. #ifdef CONFIG_NAND_DENALI
  16. tmp |= SC_RSTCTRL_NRST_NAND;
  17. #endif
  18. writel(tmp, SC_RSTCTRL);
  19. readl(SC_RSTCTRL); /* dummy read */
  20. /* provide clocks */
  21. tmp = readl(SC_CLKCTRL);
  22. #ifdef CONFIG_USB_EHCI_HCD
  23. tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
  24. #endif
  25. #ifdef CONFIG_NAND_DENALI
  26. tmp |= SC_CLKCTRL_CEN_NAND;
  27. #endif
  28. writel(tmp, SC_CLKCTRL);
  29. readl(SC_CLKCTRL); /* dummy read */
  30. }