pmic_bus.c 2.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com>
  4. *
  5. * Sunxi PMIC bus access helpers
  6. *
  7. * The axp152 & axp209 use an i2c bus, the axp221 uses the p2wi bus and the
  8. * axp223 uses the rsb bus, these functions abstract this.
  9. */
  10. #include <common.h>
  11. #include <asm/arch/p2wi.h>
  12. #include <asm/arch/rsb.h>
  13. #include <i2c.h>
  14. #include <asm/arch/pmic_bus.h>
  15. #define AXP152_I2C_ADDR 0x30
  16. #define AXP209_I2C_ADDR 0x34
  17. #define AXP221_CHIP_ADDR 0x68
  18. #define AXP221_CTRL_ADDR 0x3e
  19. #define AXP221_INIT_DATA 0x3e
  20. /* AXP818 device and runtime addresses are same as AXP223 */
  21. #define AXP223_DEVICE_ADDR 0x3a3
  22. #define AXP223_RUNTIME_ADDR 0x2d
  23. int pmic_bus_init(void)
  24. {
  25. /* This cannot be 0 because it is used in SPL before BSS is ready */
  26. static int needs_init = 1;
  27. __maybe_unused int ret;
  28. if (!needs_init)
  29. return 0;
  30. #if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER
  31. # ifdef CONFIG_MACH_SUN6I
  32. p2wi_init();
  33. ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR, AXP221_CTRL_ADDR,
  34. AXP221_INIT_DATA);
  35. # elif defined CONFIG_MACH_SUN8I_R40
  36. /* Nothing. R40 uses the AXP221s in I2C mode */
  37. ret = 0;
  38. # else
  39. ret = rsb_init();
  40. if (ret)
  41. return ret;
  42. ret = rsb_set_device_address(AXP223_DEVICE_ADDR, AXP223_RUNTIME_ADDR);
  43. # endif
  44. if (ret)
  45. return ret;
  46. #endif
  47. needs_init = 0;
  48. return 0;
  49. }
  50. int pmic_bus_read(u8 reg, u8 *data)
  51. {
  52. #ifdef CONFIG_AXP152_POWER
  53. return i2c_read(AXP152_I2C_ADDR, reg, 1, data, 1);
  54. #elif defined CONFIG_AXP209_POWER
  55. return i2c_read(AXP209_I2C_ADDR, reg, 1, data, 1);
  56. #elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER
  57. # ifdef CONFIG_MACH_SUN6I
  58. return p2wi_read(reg, data);
  59. # elif defined CONFIG_MACH_SUN8I_R40
  60. return i2c_read(AXP209_I2C_ADDR, reg, 1, data, 1);
  61. # else
  62. return rsb_read(AXP223_RUNTIME_ADDR, reg, data);
  63. # endif
  64. #endif
  65. }
  66. int pmic_bus_write(u8 reg, u8 data)
  67. {
  68. #ifdef CONFIG_AXP152_POWER
  69. return i2c_write(AXP152_I2C_ADDR, reg, 1, &data, 1);
  70. #elif defined CONFIG_AXP209_POWER
  71. return i2c_write(AXP209_I2C_ADDR, reg, 1, &data, 1);
  72. #elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER
  73. # ifdef CONFIG_MACH_SUN6I
  74. return p2wi_write(reg, data);
  75. # elif defined CONFIG_MACH_SUN8I_R40
  76. return i2c_write(AXP209_I2C_ADDR, reg, 1, &data, 1);
  77. # else
  78. return rsb_write(AXP223_RUNTIME_ADDR, reg, data);
  79. # endif
  80. #endif
  81. }
  82. int pmic_bus_setbits(u8 reg, u8 bits)
  83. {
  84. int ret;
  85. u8 val;
  86. ret = pmic_bus_read(reg, &val);
  87. if (ret)
  88. return ret;
  89. val |= bits;
  90. return pmic_bus_write(reg, val);
  91. }
  92. int pmic_bus_clrbits(u8 reg, u8 bits)
  93. {
  94. int ret;
  95. u8 val;
  96. ret = pmic_bus_read(reg, &val);
  97. if (ret)
  98. return ret;
  99. val &= ~bits;
  100. return pmic_bus_write(reg, val);
  101. }