Kconfig 3.0 KB

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  1. if ARCH_DAVINCI
  2. choice
  3. prompt "DaVinci board select"
  4. optional
  5. config TARGET_IPAM390
  6. bool "IPAM390 board"
  7. select MACH_DAVINCI_DA850_EVM
  8. select SOC_DA850
  9. select SUPPORT_SPL
  10. config TARGET_DA850EVM
  11. bool "DA850 EVM board"
  12. select MACH_DAVINCI_DA850_EVM
  13. select SOC_DA850
  14. select SUPPORT_SPL
  15. config TARGET_EA20
  16. bool "EA20 board"
  17. select MACH_DAVINCI_DA850_EVM
  18. select SOC_DA850
  19. select BOARD_LATE_INIT
  20. config TARGET_OMAPL138_LCDK
  21. bool "OMAPL138 LCDK"
  22. select SOC_DA8XX
  23. select SUPPORT_SPL
  24. config TARGET_CALIMAIN
  25. bool "Calimain board"
  26. select SOC_DA850
  27. config TARGET_LEGOEV3
  28. bool "LEGO MINDSTORMS EV3"
  29. select MACH_DAVINCI_DA850_EVM
  30. select SOC_DA850
  31. endchoice
  32. config SYS_SOC
  33. default "davinci"
  34. config DA850_LOWLEVEL
  35. bool "Enable Lowlevel DA850 initialization"
  36. depends on SOC_DA850
  37. config SYS_DA850_PLL_INIT
  38. bool
  39. config SYS_DA850_DDR_INIT
  40. bool
  41. config SOC_DA850
  42. bool
  43. select SOC_DA8XX
  44. config SOC_DA8XX
  45. bool
  46. select SYS_DA850_PLL_INIT if SUPPORT_SPL || DA850_LOWLEVEL
  47. select SYS_DA850_DDR_INIT if SUPPORT_SPL || DA850_LOWLEVEL
  48. config MACH_DAVINCI_DA850_EVM
  49. bool
  50. if SYS_DA850_PLL_INIT
  51. comment "DA850 PLL Initialization Parameters"
  52. config SYS_DV_CLKMODE
  53. int "PLLCTL Clock Mode"
  54. default 0
  55. help
  56. Set PLLCTL Clock Mode bit as External Clock or On Chip oscillator
  57. config SYS_DA850_PLL0_POSTDIV
  58. int "PLLC0 PLL Post-Divider"
  59. default 1
  60. help
  61. Value written to PLLC0 PLL Post-Divider Control Register
  62. config SYS_DA850_PLL0_PLLDIV1
  63. hex "PLLC0 Divider 1"
  64. default 0x8000
  65. help
  66. Value written to PLLC0 Divider 1 register
  67. config SYS_DA850_PLL0_PLLDIV2
  68. hex "PLLC0 Divider 2"
  69. default 0x8001
  70. help
  71. Value written to PLLC0 Divider 2 register
  72. config SYS_DA850_PLL0_PLLDIV3
  73. hex "PLLC0 Divider 3"
  74. default 0x8002
  75. help
  76. Value written to PLLC0 Divider 3 register
  77. config SYS_DA850_PLL0_PLLDIV4
  78. hex "PLLC0 Divider 4"
  79. default 0x8003
  80. help
  81. Value written to PLLC0 Divider 4 register
  82. config SYS_DA850_PLL0_PLLDIV5
  83. hex "PLLC0 Divider 5"
  84. default 0x8002
  85. help
  86. Value written to PLLC0 Divider 5 register
  87. config SYS_DA850_PLL0_PLLDIV6
  88. hex "PLLC0 Divider 6"
  89. default 0x8000
  90. help
  91. Value written to PLLC0 Divider 6 register
  92. config SYS_DA850_PLL0_PLLDIV7
  93. hex "PLLC0 Divider 7"
  94. default 0x8005
  95. help
  96. Value written to PLLC0 Divider 7 register
  97. config SYS_DA850_PLL1_POSTDIV
  98. hex "PLLC1 PLL Post-Divider"
  99. default 1
  100. help
  101. Value written to PLLC1 PLL Post-Divider Control Register
  102. config SYS_DA850_PLL1_PLLDIV1
  103. hex "PLLC1 Divider 2"
  104. default 0x8000
  105. help
  106. Value written to PLLC1 Divider 1 register
  107. config SYS_DA850_PLL1_PLLDIV2
  108. hex "PLLC1 Divider 2"
  109. default 0x8001
  110. help
  111. Value written to PLLC1 Divider 2 register
  112. config SYS_DA850_PLL1_PLLDIV3
  113. hex "PLLC1 Divider 3"
  114. default 0x8002
  115. help
  116. Value written to PLLC1 Divider 3 register
  117. endif
  118. source "board/Barix/ipam390/Kconfig"
  119. source "board/davinci/da8xxevm/Kconfig"
  120. source "board/davinci/ea20/Kconfig"
  121. source "board/omicron/calimain/Kconfig"
  122. source "board/lego/ev3/Kconfig"
  123. config SPL_LDSCRIPT
  124. default "board/$(BOARDDIR)/u-boot-spl-ipam390.lds" if TARGET_IPAM390
  125. default "board/$(BOARDDIR)/u-boot-spl-da850evm.lds"
  126. endif