grf_rk322x.h 2.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
  4. */
  5. #ifndef _ASM_ARCH_GRF_RK322X_H
  6. #define _ASM_ARCH_GRF_RK322X_H
  7. #include <common.h>
  8. struct rk322x_grf {
  9. unsigned int gpio0a_iomux;
  10. unsigned int gpio0b_iomux;
  11. unsigned int gpio0c_iomux;
  12. unsigned int gpio0d_iomux;
  13. unsigned int gpio1a_iomux;
  14. unsigned int gpio1b_iomux;
  15. unsigned int gpio1c_iomux;
  16. unsigned int gpio1d_iomux;
  17. unsigned int gpio2a_iomux;
  18. unsigned int gpio2b_iomux;
  19. unsigned int gpio2c_iomux;
  20. unsigned int gpio2d_iomux;
  21. unsigned int gpio3a_iomux;
  22. unsigned int gpio3b_iomux;
  23. unsigned int gpio3c_iomux;
  24. unsigned int gpio3d_iomux;
  25. unsigned int reserved1[4];
  26. unsigned int con_iomux;
  27. unsigned int reserved2[(0x100 - 0x50) / 4 - 1];
  28. unsigned int gpio0_p[4];
  29. unsigned int gpio1_p[4];
  30. unsigned int gpio2_p[4];
  31. unsigned int gpio3_p[4];
  32. unsigned int reserved3[(0x200 - 0x13c) / 4 - 1];
  33. unsigned int gpio0_e[4];
  34. unsigned int gpio1_e[4];
  35. unsigned int gpio2_e[4];
  36. unsigned int gpio3_e[4];
  37. unsigned int reserved4[(0x400 - 0x23c) / 4 - 1];
  38. unsigned int soc_con[7];
  39. unsigned int reserved5[(0x480 - 0x418) / 4 - 1];
  40. unsigned int soc_status[3];
  41. unsigned int chip_id;
  42. unsigned int reserved6[(0x500 - 0x48c) / 4 - 1];
  43. unsigned int cpu_con[4];
  44. unsigned int reserved7[4];
  45. unsigned int cpu_status[2];
  46. unsigned int reserved8[(0x5c8 - 0x524) / 4 - 1];
  47. unsigned int os_reg[8];
  48. unsigned int reserved9[(0x604 - 0x5e4) / 4 - 1];
  49. unsigned int ddrc_stat;
  50. unsigned int reserved10[(0x680 - 0x604) / 4 - 1];
  51. unsigned int sig_detect_con[2];
  52. unsigned int reserved11[(0x690 - 0x684) / 4 - 1];
  53. unsigned int sig_detect_status[2];
  54. unsigned int reserved12[(0x6a0 - 0x694) / 4 - 1];
  55. unsigned int sig_detect_clr[2];
  56. unsigned int reserved13[(0x6b0 - 0x6a4) / 4 - 1];
  57. unsigned int emmc_det;
  58. unsigned int reserved14[(0x700 - 0x6b0) / 4 - 1];
  59. unsigned int host0_con[3];
  60. unsigned int reserved15;
  61. unsigned int host1_con[3];
  62. unsigned int reserved16;
  63. unsigned int host2_con[3];
  64. unsigned int reserved17[(0x760 - 0x728) / 4 - 1];
  65. unsigned int usbphy0_con[27];
  66. unsigned int reserved18[(0x800 - 0x7c8) / 4 - 1];
  67. unsigned int usbphy1_con[27];
  68. unsigned int reserved19[(0x880 - 0x868) / 4 - 1];
  69. unsigned int otg_con0;
  70. unsigned int uoc_status0;
  71. unsigned int reserved20[(0x900 - 0x884) / 4 - 1];
  72. unsigned int mac_con[2];
  73. unsigned int reserved21[(0xb00 - 0x904) / 4 - 1];
  74. unsigned int macphy_con[4];
  75. unsigned int macphy_status;
  76. };
  77. check_member(rk322x_grf, ddrc_stat, 0x604);
  78. struct rk322x_sgrf {
  79. unsigned int soc_con[11];
  80. unsigned int busdmac_con[4];
  81. };
  82. /* GRF_MACPHY_CON0 */
  83. enum {
  84. MACPHY_CFG_ENABLE_SHIFT = 0,
  85. MACPHY_CFG_ENABLE_MASK = 1 << MACPHY_CFG_ENABLE_SHIFT,
  86. };
  87. #endif