clock.h 1.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2011
  4. * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
  5. */
  6. #ifndef __ASM_ARCH_CLOCK_H
  7. #define __ASM_ARCH_CLOCK_H
  8. #include <common.h>
  9. #ifdef CONFIG_MX35_HCLK_FREQ
  10. #define MXC_HCLK CONFIG_MX35_HCLK_FREQ
  11. #else
  12. #define MXC_HCLK 24000000
  13. #endif
  14. #ifdef CONFIG_MX35_CLK32
  15. #define MXC_CLK32 CONFIG_MX35_CLK32
  16. #else
  17. #define MXC_CLK32 32768
  18. #endif
  19. enum mxc_clock {
  20. MXC_ARM_CLK,
  21. MXC_AHB_CLK,
  22. MXC_IPG_CLK,
  23. MXC_IPG_PERCLK,
  24. MXC_UART_CLK,
  25. MXC_ESDHC1_CLK,
  26. MXC_ESDHC2_CLK,
  27. MXC_ESDHC3_CLK,
  28. MXC_USB_CLK,
  29. MXC_CSPI_CLK,
  30. MXC_FEC_CLK,
  31. MXC_I2C_CLK,
  32. };
  33. enum mxc_main_clock {
  34. CPU_CLK,
  35. AHB_CLK,
  36. IPG_CLK,
  37. IPG_PER_CLK,
  38. NFC_CLK,
  39. USB_CLK,
  40. HSP_CLK,
  41. };
  42. enum mxc_peri_clock {
  43. UART1_BAUD,
  44. UART2_BAUD,
  45. UART3_BAUD,
  46. SSI1_BAUD,
  47. SSI2_BAUD,
  48. CSI_BAUD,
  49. MSHC_CLK,
  50. ESDHC1_CLK,
  51. ESDHC2_CLK,
  52. ESDHC3_CLK,
  53. SPDIF_CLK,
  54. SPI1_CLK,
  55. SPI2_CLK,
  56. };
  57. u32 imx_get_uartclk(void);
  58. u32 imx_get_fecclk(void);
  59. unsigned int mxc_get_clock(enum mxc_clock clk);
  60. #endif /* __ASM_ARCH_CLOCK_H */