dwc2_udc_otg_priv.h 2.2 KB

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  1. /*
  2. * Designware DWC2 on-chip full/high speed USB device controllers
  3. * Copyright (C) 2005 for Samsung Electronics
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #ifndef __DWC2_UDC_OTG_PRIV__
  8. #define __DWC2_UDC_OTG_PRIV__
  9. #include <asm/errno.h>
  10. #include <linux/sizes.h>
  11. #include <linux/usb/ch9.h>
  12. #include <linux/usb/gadget.h>
  13. #include <linux/list.h>
  14. #include <usb/lin_gadget_compat.h>
  15. #include <usb/dwc2_udc.h>
  16. /*-------------------------------------------------------------------------*/
  17. /* DMA bounce buffer size, 16K is enough even for mass storage */
  18. #define DMA_BUFFER_SIZE (16*SZ_1K)
  19. #define EP0_FIFO_SIZE 64
  20. #define EP_FIFO_SIZE 512
  21. #define EP_FIFO_SIZE2 1024
  22. /* ep0-control, ep1in-bulk, ep2out-bulk, ep3in-int */
  23. #define DWC2_MAX_ENDPOINTS 4
  24. #define DWC2_MAX_HW_ENDPOINTS 16
  25. #define WAIT_FOR_SETUP 0
  26. #define DATA_STATE_XMIT 1
  27. #define DATA_STATE_NEED_ZLP 2
  28. #define WAIT_FOR_OUT_STATUS 3
  29. #define DATA_STATE_RECV 4
  30. #define WAIT_FOR_COMPLETE 5
  31. #define WAIT_FOR_OUT_COMPLETE 6
  32. #define WAIT_FOR_IN_COMPLETE 7
  33. #define WAIT_FOR_NULL_COMPLETE 8
  34. #define TEST_J_SEL 0x1
  35. #define TEST_K_SEL 0x2
  36. #define TEST_SE0_NAK_SEL 0x3
  37. #define TEST_PACKET_SEL 0x4
  38. #define TEST_FORCE_ENABLE_SEL 0x5
  39. /* ************************************************************************* */
  40. /* IO
  41. */
  42. enum ep_type {
  43. ep_control, ep_bulk_in, ep_bulk_out, ep_interrupt
  44. };
  45. struct dwc2_ep {
  46. struct usb_ep ep;
  47. struct dwc2_udc *dev;
  48. const struct usb_endpoint_descriptor *desc;
  49. struct list_head queue;
  50. unsigned long pio_irqs;
  51. int len;
  52. void *dma_buf;
  53. u8 stopped;
  54. u8 bEndpointAddress;
  55. u8 bmAttributes;
  56. enum ep_type ep_type;
  57. int fifo_num;
  58. };
  59. struct dwc2_request {
  60. struct usb_request req;
  61. struct list_head queue;
  62. };
  63. struct dwc2_udc {
  64. struct usb_gadget gadget;
  65. struct usb_gadget_driver *driver;
  66. struct dwc2_plat_otg_data *pdata;
  67. int ep0state;
  68. struct dwc2_ep ep[DWC2_MAX_ENDPOINTS];
  69. unsigned char usb_address;
  70. unsigned req_pending:1, req_std:1;
  71. };
  72. #define ep_is_in(EP) (((EP)->bEndpointAddress&USB_DIR_IN) == USB_DIR_IN)
  73. #define ep_index(EP) ((EP)->bEndpointAddress&0xF)
  74. #define ep_maxpacket(EP) ((EP)->ep.maxpacket)
  75. void otg_phy_init(struct dwc2_udc *dev);
  76. void otg_phy_off(struct dwc2_udc *dev);
  77. #endif /* __DWC2_UDC_OTG_PRIV__ */