atmel_usba_udc.c 31 KB

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  1. /*
  2. * Driver for the Atmel USBA high speed USB device controller
  3. * [Original from Linux kernel: drivers/usb/gadget/atmel_usba_udc.c]
  4. *
  5. * Copyright (C) 2005-2013 Atmel Corporation
  6. * Bo Shen <voice.shen@atmel.com>
  7. *
  8. * SPDX-License-Identifier: GPL-2.0+
  9. */
  10. #include <common.h>
  11. #include <asm/errno.h>
  12. #include <asm/gpio.h>
  13. #include <asm/hardware.h>
  14. #include <linux/list.h>
  15. #include <linux/usb/ch9.h>
  16. #include <linux/usb/gadget.h>
  17. #include <linux/usb/atmel_usba_udc.h>
  18. #include <malloc.h>
  19. #include <usb/lin_gadget_compat.h>
  20. #include "atmel_usba_udc.h"
  21. static int vbus_is_present(struct usba_udc *udc)
  22. {
  23. /* No Vbus detection: Assume always present */
  24. return 1;
  25. }
  26. static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
  27. {
  28. unsigned int transaction_len;
  29. transaction_len = req->req.length - req->req.actual;
  30. req->last_transaction = 1;
  31. if (transaction_len > ep->ep.maxpacket) {
  32. transaction_len = ep->ep.maxpacket;
  33. req->last_transaction = 0;
  34. } else if (transaction_len == ep->ep.maxpacket && req->req.zero) {
  35. req->last_transaction = 0;
  36. }
  37. DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
  38. ep->ep.name, req, transaction_len,
  39. req->last_transaction ? ", done" : "");
  40. memcpy(ep->fifo, req->req.buf + req->req.actual, transaction_len);
  41. usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
  42. req->req.actual += transaction_len;
  43. }
  44. static void submit_request(struct usba_ep *ep, struct usba_request *req)
  45. {
  46. DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d), dma: %d\n",
  47. ep->ep.name, req, req->req.length, req->using_dma);
  48. req->req.actual = 0;
  49. req->submitted = 1;
  50. next_fifo_transaction(ep, req);
  51. if (req->last_transaction) {
  52. usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
  53. usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
  54. } else {
  55. usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
  56. usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
  57. }
  58. }
  59. static void submit_next_request(struct usba_ep *ep)
  60. {
  61. struct usba_request *req;
  62. if (list_empty(&ep->queue)) {
  63. usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
  64. return;
  65. }
  66. req = list_entry(ep->queue.next, struct usba_request, queue);
  67. if (!req->submitted)
  68. submit_request(ep, req);
  69. }
  70. static void send_status(struct usba_udc *udc, struct usba_ep *ep)
  71. {
  72. ep->state = STATUS_STAGE_IN;
  73. usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
  74. usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
  75. }
  76. static void receive_data(struct usba_ep *ep)
  77. {
  78. struct usba_udc *udc = ep->udc;
  79. struct usba_request *req;
  80. unsigned long status;
  81. unsigned int bytecount, nr_busy;
  82. int is_complete = 0;
  83. status = usba_ep_readl(ep, STA);
  84. nr_busy = USBA_BFEXT(BUSY_BANKS, status);
  85. DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
  86. while (nr_busy > 0) {
  87. if (list_empty(&ep->queue)) {
  88. usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
  89. break;
  90. }
  91. req = list_entry(ep->queue.next,
  92. struct usba_request, queue);
  93. bytecount = USBA_BFEXT(BYTE_COUNT, status);
  94. if (status & USBA_SHORT_PACKET)
  95. is_complete = 1;
  96. if (req->req.actual + bytecount >= req->req.length) {
  97. is_complete = 1;
  98. bytecount = req->req.length - req->req.actual;
  99. }
  100. memcpy(req->req.buf + req->req.actual, ep->fifo, bytecount);
  101. req->req.actual += bytecount;
  102. usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
  103. if (is_complete) {
  104. DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
  105. req->req.status = 0;
  106. list_del_init(&req->queue);
  107. usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
  108. spin_lock(&udc->lock);
  109. req->req.complete(&ep->ep, &req->req);
  110. spin_unlock(&udc->lock);
  111. }
  112. status = usba_ep_readl(ep, STA);
  113. nr_busy = USBA_BFEXT(BUSY_BANKS, status);
  114. if (is_complete && ep_is_control(ep)) {
  115. send_status(udc, ep);
  116. break;
  117. }
  118. }
  119. }
  120. static void
  121. request_complete(struct usba_ep *ep, struct usba_request *req, int status)
  122. {
  123. if (req->req.status == -EINPROGRESS)
  124. req->req.status = status;
  125. DBG(DBG_GADGET | DBG_REQ, "%s: req %p complete: status %d, actual %u\n",
  126. ep->ep.name, req, req->req.status, req->req.actual);
  127. req->req.complete(&ep->ep, &req->req);
  128. }
  129. static void
  130. request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
  131. {
  132. struct usba_request *req, *tmp_req;
  133. list_for_each_entry_safe(req, tmp_req, list, queue) {
  134. list_del_init(&req->queue);
  135. request_complete(ep, req, status);
  136. }
  137. }
  138. static int
  139. usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
  140. {
  141. struct usba_ep *ep = to_usba_ep(_ep);
  142. struct usba_udc *udc = ep->udc;
  143. unsigned long flags = 0, ept_cfg, maxpacket;
  144. unsigned int nr_trans;
  145. DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
  146. maxpacket = usb_endpoint_maxp(desc) & 0x7ff;
  147. if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
  148. != ep->index) ||
  149. ep->index == 0 ||
  150. desc->bDescriptorType != USB_DT_ENDPOINT ||
  151. maxpacket == 0 ||
  152. maxpacket > ep->fifo_size) {
  153. DBG(DBG_ERR, "ep_enable: Invalid argument");
  154. return -EINVAL;
  155. }
  156. ep->is_isoc = 0;
  157. ep->is_in = 0;
  158. if (maxpacket <= 8)
  159. ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
  160. else
  161. /* LSB is bit 1, not 0 */
  162. ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3);
  163. DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n",
  164. ep->ep.name, ept_cfg, maxpacket);
  165. if (usb_endpoint_dir_in(desc)) {
  166. ep->is_in = 1;
  167. ept_cfg |= USBA_EPT_DIR_IN;
  168. }
  169. switch (usb_endpoint_type(desc)) {
  170. case USB_ENDPOINT_XFER_CONTROL:
  171. ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
  172. ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE);
  173. break;
  174. case USB_ENDPOINT_XFER_ISOC:
  175. if (!ep->can_isoc) {
  176. DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
  177. ep->ep.name);
  178. return -EINVAL;
  179. }
  180. /*
  181. * Bits 11:12 specify number of _additional_
  182. * transactions per microframe.
  183. */
  184. nr_trans = ((usb_endpoint_maxp(desc) >> 11) & 3) + 1;
  185. if (nr_trans > 3)
  186. return -EINVAL;
  187. ep->is_isoc = 1;
  188. ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
  189. /*
  190. * Do triple-buffering on high-bandwidth iso endpoints.
  191. */
  192. if (nr_trans > 1 && ep->nr_banks == 3)
  193. ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_TRIPLE);
  194. else
  195. ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
  196. ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
  197. break;
  198. case USB_ENDPOINT_XFER_BULK:
  199. ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
  200. ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE);
  201. break;
  202. case USB_ENDPOINT_XFER_INT:
  203. ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
  204. ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE);
  205. break;
  206. }
  207. spin_lock_irqsave(&ep->udc->lock, flags);
  208. ep->desc = desc;
  209. ep->ep.maxpacket = maxpacket;
  210. usba_ep_writel(ep, CFG, ept_cfg);
  211. usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
  212. usba_writel(udc, INT_ENB,
  213. (usba_readl(udc, INT_ENB)
  214. | USBA_BF(EPT_INT, 1 << ep->index)));
  215. spin_unlock_irqrestore(&udc->lock, flags);
  216. DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
  217. (unsigned long)usba_ep_readl(ep, CFG));
  218. DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
  219. (unsigned long)usba_readl(udc, INT_ENB));
  220. return 0;
  221. }
  222. static int usba_ep_disable(struct usb_ep *_ep)
  223. {
  224. struct usba_ep *ep = to_usba_ep(_ep);
  225. struct usba_udc *udc = ep->udc;
  226. LIST_HEAD(req_list);
  227. unsigned long flags = 0;
  228. DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
  229. spin_lock_irqsave(&udc->lock, flags);
  230. if (!ep->desc) {
  231. spin_unlock_irqrestore(&udc->lock, flags);
  232. /* REVISIT because this driver disables endpoints in
  233. * reset_all_endpoints() before calling disconnect(),
  234. * most gadget drivers would trigger this non-error ...
  235. */
  236. if (udc->gadget.speed != USB_SPEED_UNKNOWN)
  237. DBG(DBG_ERR, "ep_disable: %s not enabled\n",
  238. ep->ep.name);
  239. return -EINVAL;
  240. }
  241. ep->desc = NULL;
  242. list_splice_init(&ep->queue, &req_list);
  243. usba_ep_writel(ep, CFG, 0);
  244. usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
  245. usba_writel(udc, INT_ENB,
  246. usba_readl(udc, INT_ENB) &
  247. ~USBA_BF(EPT_INT, 1 << ep->index));
  248. request_complete_list(ep, &req_list, -ESHUTDOWN);
  249. spin_unlock_irqrestore(&udc->lock, flags);
  250. return 0;
  251. }
  252. static struct usb_request *
  253. usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
  254. {
  255. struct usba_request *req;
  256. DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
  257. req = calloc(1, sizeof(struct usba_request));
  258. if (!req)
  259. return NULL;
  260. INIT_LIST_HEAD(&req->queue);
  261. return &req->req;
  262. }
  263. static void
  264. usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
  265. {
  266. struct usba_request *req = to_usba_req(_req);
  267. DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
  268. free(req);
  269. }
  270. static int
  271. usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
  272. {
  273. struct usba_request *req = to_usba_req(_req);
  274. struct usba_ep *ep = to_usba_ep(_ep);
  275. struct usba_udc *udc = ep->udc;
  276. unsigned long flags = 0;
  277. int ret;
  278. DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
  279. ep->ep.name, req, _req->length);
  280. if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN ||
  281. !ep->desc)
  282. return -ESHUTDOWN;
  283. req->submitted = 0;
  284. req->using_dma = 0;
  285. req->last_transaction = 0;
  286. _req->status = -EINPROGRESS;
  287. _req->actual = 0;
  288. /* May have received a reset since last time we checked */
  289. ret = -ESHUTDOWN;
  290. spin_lock_irqsave(&udc->lock, flags);
  291. if (ep->desc) {
  292. list_add_tail(&req->queue, &ep->queue);
  293. if ((!ep_is_control(ep) && ep->is_in) ||
  294. (ep_is_control(ep) && (ep->state == DATA_STAGE_IN ||
  295. ep->state == STATUS_STAGE_IN)))
  296. usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
  297. else
  298. usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
  299. ret = 0;
  300. }
  301. spin_unlock_irqrestore(&udc->lock, flags);
  302. return ret;
  303. }
  304. static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  305. {
  306. struct usba_ep *ep = to_usba_ep(_ep);
  307. struct usba_request *req = to_usba_req(_req);
  308. DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
  309. ep->ep.name, req);
  310. /*
  311. * Errors should stop the queue from advancing until the
  312. * completion function returns.
  313. */
  314. list_del_init(&req->queue);
  315. request_complete(ep, req, -ECONNRESET);
  316. /* Process the next request if any */
  317. submit_next_request(ep);
  318. return 0;
  319. }
  320. static int usba_ep_set_halt(struct usb_ep *_ep, int value)
  321. {
  322. struct usba_ep *ep = to_usba_ep(_ep);
  323. unsigned long flags = 0;
  324. int ret = 0;
  325. DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
  326. value ? "set" : "clear");
  327. if (!ep->desc) {
  328. DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
  329. ep->ep.name);
  330. return -ENODEV;
  331. }
  332. if (ep->is_isoc) {
  333. DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
  334. ep->ep.name);
  335. return -ENOTTY;
  336. }
  337. spin_lock_irqsave(&udc->lock, flags);
  338. /*
  339. * We can't halt IN endpoints while there are still data to be
  340. * transferred
  341. */
  342. if (!list_empty(&ep->queue) ||
  343. ((value && ep->is_in && (usba_ep_readl(ep, STA) &
  344. USBA_BF(BUSY_BANKS, -1L))))) {
  345. ret = -EAGAIN;
  346. } else {
  347. if (value)
  348. usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
  349. else
  350. usba_ep_writel(ep, CLR_STA,
  351. USBA_FORCE_STALL | USBA_TOGGLE_CLR);
  352. usba_ep_readl(ep, STA);
  353. }
  354. spin_unlock_irqrestore(&udc->lock, flags);
  355. return ret;
  356. }
  357. static int usba_ep_fifo_status(struct usb_ep *_ep)
  358. {
  359. struct usba_ep *ep = to_usba_ep(_ep);
  360. return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
  361. }
  362. static void usba_ep_fifo_flush(struct usb_ep *_ep)
  363. {
  364. struct usba_ep *ep = to_usba_ep(_ep);
  365. struct usba_udc *udc = ep->udc;
  366. usba_writel(udc, EPT_RST, 1 << ep->index);
  367. }
  368. static const struct usb_ep_ops usba_ep_ops = {
  369. .enable = usba_ep_enable,
  370. .disable = usba_ep_disable,
  371. .alloc_request = usba_ep_alloc_request,
  372. .free_request = usba_ep_free_request,
  373. .queue = usba_ep_queue,
  374. .dequeue = usba_ep_dequeue,
  375. .set_halt = usba_ep_set_halt,
  376. .fifo_status = usba_ep_fifo_status,
  377. .fifo_flush = usba_ep_fifo_flush,
  378. };
  379. static int usba_udc_get_frame(struct usb_gadget *gadget)
  380. {
  381. struct usba_udc *udc = to_usba_udc(gadget);
  382. return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
  383. }
  384. static int usba_udc_wakeup(struct usb_gadget *gadget)
  385. {
  386. struct usba_udc *udc = to_usba_udc(gadget);
  387. unsigned long flags = 0;
  388. u32 ctrl;
  389. int ret = -EINVAL;
  390. spin_lock_irqsave(&udc->lock, flags);
  391. if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) {
  392. ctrl = usba_readl(udc, CTRL);
  393. usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP);
  394. ret = 0;
  395. }
  396. spin_unlock_irqrestore(&udc->lock, flags);
  397. return ret;
  398. }
  399. static int
  400. usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
  401. {
  402. struct usba_udc *udc = to_usba_udc(gadget);
  403. unsigned long flags = 0;
  404. spin_lock_irqsave(&udc->lock, flags);
  405. if (is_selfpowered)
  406. udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
  407. else
  408. udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
  409. spin_unlock_irqrestore(&udc->lock, flags);
  410. return 0;
  411. }
  412. static const struct usb_gadget_ops usba_udc_ops = {
  413. .get_frame = usba_udc_get_frame,
  414. .wakeup = usba_udc_wakeup,
  415. .set_selfpowered = usba_udc_set_selfpowered,
  416. };
  417. static struct usb_endpoint_descriptor usba_ep0_desc = {
  418. .bLength = USB_DT_ENDPOINT_SIZE,
  419. .bDescriptorType = USB_DT_ENDPOINT,
  420. .bEndpointAddress = 0,
  421. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  422. .wMaxPacketSize = cpu_to_le16(64),
  423. /* FIXME: I have no idea what to put here */
  424. .bInterval = 1,
  425. };
  426. /*
  427. * Called with interrupts disabled and udc->lock held.
  428. */
  429. static void reset_all_endpoints(struct usba_udc *udc)
  430. {
  431. struct usba_ep *ep;
  432. struct usba_request *req, *tmp_req;
  433. usba_writel(udc, EPT_RST, ~0UL);
  434. ep = to_usba_ep(udc->gadget.ep0);
  435. list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
  436. list_del_init(&req->queue);
  437. request_complete(ep, req, -ECONNRESET);
  438. }
  439. /* NOTE: normally, the next call to the gadget driver is in
  440. * charge of disabling endpoints... usually disconnect().
  441. * The exception would be entering a high speed test mode.
  442. *
  443. * FIXME remove this code ... and retest thoroughly.
  444. */
  445. list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
  446. if (ep->desc) {
  447. spin_unlock(&udc->lock);
  448. usba_ep_disable(&ep->ep);
  449. spin_lock(&udc->lock);
  450. }
  451. }
  452. }
  453. static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
  454. {
  455. struct usba_ep *ep;
  456. if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
  457. return to_usba_ep(udc->gadget.ep0);
  458. list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
  459. u8 bEndpointAddress;
  460. if (!ep->desc)
  461. continue;
  462. bEndpointAddress = ep->desc->bEndpointAddress;
  463. if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
  464. continue;
  465. if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
  466. == (wIndex & USB_ENDPOINT_NUMBER_MASK))
  467. return ep;
  468. }
  469. return NULL;
  470. }
  471. /* Called with interrupts disabled and udc->lock held */
  472. static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
  473. {
  474. usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
  475. ep->state = WAIT_FOR_SETUP;
  476. }
  477. static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
  478. {
  479. if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
  480. return 1;
  481. return 0;
  482. }
  483. static inline void set_address(struct usba_udc *udc, unsigned int addr)
  484. {
  485. u32 regval;
  486. DBG(DBG_BUS, "setting address %u...\n", addr);
  487. regval = usba_readl(udc, CTRL);
  488. regval = USBA_BFINS(DEV_ADDR, addr, regval);
  489. usba_writel(udc, CTRL, regval);
  490. }
  491. static int do_test_mode(struct usba_udc *udc)
  492. {
  493. static const char test_packet_buffer[] = {
  494. /* JKJKJKJK * 9 */
  495. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  496. /* JJKKJJKK * 8 */
  497. 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
  498. /* JJKKJJKK * 8 */
  499. 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
  500. /* JJJJJJJKKKKKKK * 8 */
  501. 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
  502. 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
  503. /* JJJJJJJK * 8 */
  504. 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
  505. /* {JKKKKKKK * 10}, JK */
  506. 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
  507. };
  508. struct usba_ep *ep;
  509. int test_mode;
  510. test_mode = udc->test_mode;
  511. /* Start from a clean slate */
  512. reset_all_endpoints(udc);
  513. switch (test_mode) {
  514. case 0x0100:
  515. /* Test_J */
  516. usba_writel(udc, TST, USBA_TST_J_MODE);
  517. DBG(DBG_ALL, "Entering Test_J mode...\n");
  518. break;
  519. case 0x0200:
  520. /* Test_K */
  521. usba_writel(udc, TST, USBA_TST_K_MODE);
  522. DBG(DBG_ALL, "Entering Test_K mode...\n");
  523. break;
  524. case 0x0300:
  525. /*
  526. * Test_SE0_NAK: Force high-speed mode and set up ep0
  527. * for Bulk IN transfers
  528. */
  529. ep = &udc->usba_ep[0];
  530. usba_writel(udc, TST,
  531. USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
  532. usba_ep_writel(ep, CFG,
  533. USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
  534. | USBA_EPT_DIR_IN
  535. | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
  536. | USBA_BF(BK_NUMBER, 1));
  537. if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
  538. set_protocol_stall(udc, ep);
  539. DBG(DBG_ALL, "Test_SE0_NAK: ep0 not mapped\n");
  540. } else {
  541. usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
  542. DBG(DBG_ALL, "Entering Test_SE0_NAK mode...\n");
  543. }
  544. break;
  545. case 0x0400:
  546. /* Test_Packet */
  547. ep = &udc->usba_ep[0];
  548. usba_ep_writel(ep, CFG,
  549. USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
  550. | USBA_EPT_DIR_IN
  551. | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
  552. | USBA_BF(BK_NUMBER, 1));
  553. if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
  554. set_protocol_stall(udc, ep);
  555. DBG(DBG_ALL, "Test_Packet: ep0 not mapped\n");
  556. } else {
  557. usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
  558. usba_writel(udc, TST, USBA_TST_PKT_MODE);
  559. memcpy(ep->fifo, test_packet_buffer,
  560. sizeof(test_packet_buffer));
  561. usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
  562. DBG(DBG_ALL, "Entering Test_Packet mode...\n");
  563. }
  564. break;
  565. default:
  566. DBG(DBG_ERR, "Invalid test mode: 0x%04x\n", test_mode);
  567. return -EINVAL;
  568. }
  569. return 0;
  570. }
  571. /* Avoid overly long expressions */
  572. static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
  573. {
  574. if (crq->wValue == cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
  575. return true;
  576. return false;
  577. }
  578. static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
  579. {
  580. if (crq->wValue == cpu_to_le16(USB_DEVICE_TEST_MODE))
  581. return true;
  582. return false;
  583. }
  584. static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
  585. {
  586. if (crq->wValue == cpu_to_le16(USB_ENDPOINT_HALT))
  587. return true;
  588. return false;
  589. }
  590. static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
  591. struct usb_ctrlrequest *crq)
  592. {
  593. int retval = 0;
  594. switch (crq->bRequest) {
  595. case USB_REQ_GET_STATUS: {
  596. u16 status;
  597. if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
  598. status = cpu_to_le16(udc->devstatus);
  599. } else if (crq->bRequestType
  600. == (USB_DIR_IN | USB_RECIP_INTERFACE)) {
  601. status = cpu_to_le16(0);
  602. } else if (crq->bRequestType
  603. == (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
  604. struct usba_ep *target;
  605. target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
  606. if (!target)
  607. goto stall;
  608. status = 0;
  609. if (is_stalled(udc, target))
  610. status |= cpu_to_le16(1);
  611. } else {
  612. goto delegate;
  613. }
  614. /* Write directly to the FIFO. No queueing is done. */
  615. if (crq->wLength != cpu_to_le16(sizeof(status)))
  616. goto stall;
  617. ep->state = DATA_STAGE_IN;
  618. __raw_writew(status, ep->fifo);
  619. usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
  620. break;
  621. }
  622. case USB_REQ_CLEAR_FEATURE: {
  623. if (crq->bRequestType == USB_RECIP_DEVICE) {
  624. if (feature_is_dev_remote_wakeup(crq))
  625. udc->devstatus
  626. &= ~(1 << USB_DEVICE_REMOTE_WAKEUP);
  627. else
  628. /* Can't CLEAR_FEATURE TEST_MODE */
  629. goto stall;
  630. } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
  631. struct usba_ep *target;
  632. if (crq->wLength != cpu_to_le16(0) ||
  633. !feature_is_ep_halt(crq))
  634. goto stall;
  635. target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
  636. if (!target)
  637. goto stall;
  638. usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
  639. if (target->index != 0)
  640. usba_ep_writel(target, CLR_STA,
  641. USBA_TOGGLE_CLR);
  642. } else {
  643. goto delegate;
  644. }
  645. send_status(udc, ep);
  646. break;
  647. }
  648. case USB_REQ_SET_FEATURE: {
  649. if (crq->bRequestType == USB_RECIP_DEVICE) {
  650. if (feature_is_dev_test_mode(crq)) {
  651. send_status(udc, ep);
  652. ep->state = STATUS_STAGE_TEST;
  653. udc->test_mode = le16_to_cpu(crq->wIndex);
  654. return 0;
  655. } else if (feature_is_dev_remote_wakeup(crq)) {
  656. udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP;
  657. } else {
  658. goto stall;
  659. }
  660. } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
  661. struct usba_ep *target;
  662. if (crq->wLength != cpu_to_le16(0) ||
  663. !feature_is_ep_halt(crq))
  664. goto stall;
  665. target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
  666. if (!target)
  667. goto stall;
  668. usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
  669. } else {
  670. goto delegate;
  671. }
  672. send_status(udc, ep);
  673. break;
  674. }
  675. case USB_REQ_SET_ADDRESS:
  676. if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
  677. goto delegate;
  678. set_address(udc, le16_to_cpu(crq->wValue));
  679. send_status(udc, ep);
  680. ep->state = STATUS_STAGE_ADDR;
  681. break;
  682. default:
  683. delegate:
  684. spin_unlock(&udc->lock);
  685. retval = udc->driver->setup(&udc->gadget, crq);
  686. spin_lock(&udc->lock);
  687. }
  688. return retval;
  689. stall:
  690. DBG(DBG_ALL, "%s: Invalid setup request: %02x.%02x v%04x i%04x l%d\n",
  691. ep->ep.name, crq->bRequestType, crq->bRequest,
  692. le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
  693. le16_to_cpu(crq->wLength));
  694. set_protocol_stall(udc, ep);
  695. return -1;
  696. }
  697. static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
  698. {
  699. struct usba_request *req;
  700. u32 epstatus;
  701. u32 epctrl;
  702. restart:
  703. epstatus = usba_ep_readl(ep, STA);
  704. epctrl = usba_ep_readl(ep, CTL);
  705. DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
  706. ep->ep.name, ep->state, epstatus, epctrl);
  707. req = NULL;
  708. if (!list_empty(&ep->queue))
  709. req = list_entry(ep->queue.next,
  710. struct usba_request, queue);
  711. if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
  712. if (req->submitted)
  713. next_fifo_transaction(ep, req);
  714. else
  715. submit_request(ep, req);
  716. if (req->last_transaction) {
  717. usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
  718. usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
  719. }
  720. goto restart;
  721. }
  722. if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
  723. usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
  724. switch (ep->state) {
  725. case DATA_STAGE_IN:
  726. usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
  727. usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
  728. ep->state = STATUS_STAGE_OUT;
  729. break;
  730. case STATUS_STAGE_ADDR:
  731. /* Activate our new address */
  732. usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
  733. | USBA_FADDR_EN));
  734. usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
  735. ep->state = WAIT_FOR_SETUP;
  736. break;
  737. case STATUS_STAGE_IN:
  738. if (req) {
  739. list_del_init(&req->queue);
  740. request_complete(ep, req, 0);
  741. submit_next_request(ep);
  742. }
  743. usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
  744. ep->state = WAIT_FOR_SETUP;
  745. break;
  746. case STATUS_STAGE_TEST:
  747. usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
  748. ep->state = WAIT_FOR_SETUP;
  749. if (do_test_mode(udc))
  750. set_protocol_stall(udc, ep);
  751. break;
  752. default:
  753. DBG(DBG_ALL, "%s: TXCOMP: Invalid endpoint state %d\n",
  754. ep->ep.name, ep->state);
  755. set_protocol_stall(udc, ep);
  756. break;
  757. }
  758. goto restart;
  759. }
  760. if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
  761. switch (ep->state) {
  762. case STATUS_STAGE_OUT:
  763. usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
  764. usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
  765. if (req) {
  766. list_del_init(&req->queue);
  767. request_complete(ep, req, 0);
  768. }
  769. ep->state = WAIT_FOR_SETUP;
  770. break;
  771. case DATA_STAGE_OUT:
  772. receive_data(ep);
  773. break;
  774. default:
  775. usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
  776. usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
  777. DBG(DBG_ALL, "%s: RXRDY: Invalid endpoint state %d\n",
  778. ep->ep.name, ep->state);
  779. set_protocol_stall(udc, ep);
  780. break;
  781. }
  782. goto restart;
  783. }
  784. if (epstatus & USBA_RX_SETUP) {
  785. union {
  786. struct usb_ctrlrequest crq;
  787. unsigned long data[2];
  788. } crq;
  789. unsigned int pkt_len;
  790. int ret;
  791. if (ep->state != WAIT_FOR_SETUP) {
  792. /*
  793. * Didn't expect a SETUP packet at this
  794. * point. Clean up any pending requests (which
  795. * may be successful).
  796. */
  797. int status = -EPROTO;
  798. /*
  799. * RXRDY and TXCOMP are dropped when SETUP
  800. * packets arrive. Just pretend we received
  801. * the status packet.
  802. */
  803. if (ep->state == STATUS_STAGE_OUT ||
  804. ep->state == STATUS_STAGE_IN) {
  805. usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
  806. status = 0;
  807. }
  808. if (req) {
  809. list_del_init(&req->queue);
  810. request_complete(ep, req, status);
  811. }
  812. }
  813. pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
  814. DBG(DBG_HW, "Packet length: %u\n", pkt_len);
  815. if (pkt_len != sizeof(crq)) {
  816. DBG(DBG_ALL, "udc: Invalid length %u (expected %zu)\n",
  817. pkt_len, sizeof(crq));
  818. set_protocol_stall(udc, ep);
  819. return;
  820. }
  821. DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
  822. memcpy(crq.data, ep->fifo, sizeof(crq));
  823. /* Free up one bank in the FIFO so that we can
  824. * generate or receive a reply right away. */
  825. usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
  826. if (crq.crq.bRequestType & USB_DIR_IN) {
  827. /*
  828. * The USB 2.0 spec states that "if wLength is
  829. * zero, there is no data transfer phase."
  830. * However, testusb #14 seems to actually
  831. * expect a data phase even if wLength = 0...
  832. */
  833. ep->state = DATA_STAGE_IN;
  834. } else {
  835. if (crq.crq.wLength != cpu_to_le16(0))
  836. ep->state = DATA_STAGE_OUT;
  837. else
  838. ep->state = STATUS_STAGE_IN;
  839. }
  840. ret = -1;
  841. if (ep->index == 0) {
  842. ret = handle_ep0_setup(udc, ep, &crq.crq);
  843. } else {
  844. spin_unlock(&udc->lock);
  845. ret = udc->driver->setup(&udc->gadget, &crq.crq);
  846. spin_lock(&udc->lock);
  847. }
  848. DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
  849. crq.crq.bRequestType, crq.crq.bRequest,
  850. le16_to_cpu(crq.crq.wLength), ep->state, ret);
  851. if (ret < 0) {
  852. /* Let the host know that we failed */
  853. set_protocol_stall(udc, ep);
  854. }
  855. }
  856. }
  857. static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
  858. {
  859. struct usba_request *req;
  860. u32 epstatus;
  861. u32 epctrl;
  862. epstatus = usba_ep_readl(ep, STA);
  863. epctrl = usba_ep_readl(ep, CTL);
  864. DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
  865. while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
  866. DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
  867. if (list_empty(&ep->queue)) {
  868. DBG(DBG_INT, "ep_irq: queue empty\n");
  869. usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
  870. return;
  871. }
  872. req = list_entry(ep->queue.next, struct usba_request, queue);
  873. if (req->submitted)
  874. next_fifo_transaction(ep, req);
  875. else
  876. submit_request(ep, req);
  877. if (req->last_transaction) {
  878. list_del_init(&req->queue);
  879. submit_next_request(ep);
  880. request_complete(ep, req, 0);
  881. }
  882. epstatus = usba_ep_readl(ep, STA);
  883. epctrl = usba_ep_readl(ep, CTL);
  884. }
  885. if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
  886. DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
  887. receive_data(ep);
  888. }
  889. }
  890. static int usba_udc_irq(struct usba_udc *udc)
  891. {
  892. u32 status, ep_status;
  893. spin_lock(&udc->lock);
  894. status = usba_readl(udc, INT_STA);
  895. DBG(DBG_INT, "irq, status=%#08x\n", status);
  896. if (status & USBA_DET_SUSPEND) {
  897. usba_writel(udc, INT_CLR, USBA_DET_SUSPEND);
  898. DBG(DBG_BUS, "Suspend detected\n");
  899. if (udc->gadget.speed != USB_SPEED_UNKNOWN &&
  900. udc->driver && udc->driver->suspend) {
  901. spin_unlock(&udc->lock);
  902. udc->driver->suspend(&udc->gadget);
  903. spin_lock(&udc->lock);
  904. }
  905. }
  906. if (status & USBA_WAKE_UP) {
  907. usba_writel(udc, INT_CLR, USBA_WAKE_UP);
  908. DBG(DBG_BUS, "Wake Up CPU detected\n");
  909. }
  910. if (status & USBA_END_OF_RESUME) {
  911. usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
  912. DBG(DBG_BUS, "Resume detected\n");
  913. if (udc->gadget.speed != USB_SPEED_UNKNOWN &&
  914. udc->driver && udc->driver->resume) {
  915. spin_unlock(&udc->lock);
  916. udc->driver->resume(&udc->gadget);
  917. spin_lock(&udc->lock);
  918. }
  919. }
  920. ep_status = USBA_BFEXT(EPT_INT, status);
  921. if (ep_status) {
  922. int i;
  923. for (i = 0; i < USBA_NR_ENDPOINTS; i++)
  924. if (ep_status & (1 << i)) {
  925. if (ep_is_control(&udc->usba_ep[i]))
  926. usba_control_irq(udc, &udc->usba_ep[i]);
  927. else
  928. usba_ep_irq(udc, &udc->usba_ep[i]);
  929. }
  930. }
  931. if (status & USBA_END_OF_RESET) {
  932. struct usba_ep *ep0;
  933. usba_writel(udc, INT_CLR, USBA_END_OF_RESET);
  934. reset_all_endpoints(udc);
  935. if (udc->gadget.speed != USB_SPEED_UNKNOWN &&
  936. udc->driver->disconnect) {
  937. udc->gadget.speed = USB_SPEED_UNKNOWN;
  938. spin_unlock(&udc->lock);
  939. udc->driver->disconnect(&udc->gadget);
  940. spin_lock(&udc->lock);
  941. }
  942. if (status & USBA_HIGH_SPEED)
  943. udc->gadget.speed = USB_SPEED_HIGH;
  944. else
  945. udc->gadget.speed = USB_SPEED_FULL;
  946. ep0 = &udc->usba_ep[0];
  947. ep0->desc = &usba_ep0_desc;
  948. ep0->state = WAIT_FOR_SETUP;
  949. usba_ep_writel(ep0, CFG,
  950. (USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
  951. | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
  952. | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
  953. usba_ep_writel(ep0, CTL_ENB,
  954. USBA_EPT_ENABLE | USBA_RX_SETUP);
  955. usba_writel(udc, INT_ENB,
  956. (usba_readl(udc, INT_ENB)
  957. | USBA_BF(EPT_INT, 1)
  958. | USBA_DET_SUSPEND
  959. | USBA_END_OF_RESUME));
  960. /*
  961. * Unclear why we hit this irregularly, e.g. in usbtest,
  962. * but it's clearly harmless...
  963. */
  964. if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
  965. DBG(DBG_ALL, "ODD: EP0 configuration is invalid!\n");
  966. }
  967. spin_unlock(&udc->lock);
  968. return 0;
  969. }
  970. static int atmel_usba_start(struct usba_udc *udc)
  971. {
  972. udc->devstatus = 1 << USB_DEVICE_SELF_POWERED;
  973. udc->vbus_prev = 0;
  974. /* If Vbus is present, enable the controller and wait for reset */
  975. if (vbus_is_present(udc) && udc->vbus_prev == 0) {
  976. usba_writel(udc, CTRL, USBA_ENABLE_MASK);
  977. usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
  978. }
  979. return 0;
  980. }
  981. static int atmel_usba_stop(struct usba_udc *udc)
  982. {
  983. udc->gadget.speed = USB_SPEED_UNKNOWN;
  984. reset_all_endpoints(udc);
  985. /* This will also disable the DP pullup */
  986. usba_writel(udc, CTRL, USBA_DISABLE_MASK);
  987. return 0;
  988. }
  989. static struct usba_udc controller = {
  990. .regs = (unsigned *)ATMEL_BASE_UDPHS,
  991. .fifo = (unsigned *)ATMEL_BASE_UDPHS_FIFO,
  992. .gadget = {
  993. .ops = &usba_udc_ops,
  994. .ep_list = LIST_HEAD_INIT(controller.gadget.ep_list),
  995. .speed = USB_SPEED_HIGH,
  996. .is_dualspeed = 1,
  997. .name = "atmel_usba_udc",
  998. },
  999. };
  1000. int usb_gadget_handle_interrupts(int index)
  1001. {
  1002. struct usba_udc *udc = &controller;
  1003. return usba_udc_irq(udc);
  1004. }
  1005. int usb_gadget_register_driver(struct usb_gadget_driver *driver)
  1006. {
  1007. struct usba_udc *udc = &controller;
  1008. int ret;
  1009. if (!driver || !driver->bind || !driver->setup) {
  1010. printf("bad paramter\n");
  1011. return -EINVAL;
  1012. }
  1013. if (udc->driver) {
  1014. printf("UDC already has a gadget driver\n");
  1015. return -EBUSY;
  1016. }
  1017. atmel_usba_start(udc);
  1018. udc->driver = driver;
  1019. ret = driver->bind(&udc->gadget);
  1020. if (ret) {
  1021. error("driver->bind() returned %d\n", ret);
  1022. udc->driver = NULL;
  1023. }
  1024. return ret;
  1025. }
  1026. int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
  1027. {
  1028. struct usba_udc *udc = &controller;
  1029. if (!driver || !driver->unbind || !driver->disconnect) {
  1030. error("bad paramter\n");
  1031. return -EINVAL;
  1032. }
  1033. driver->disconnect(&udc->gadget);
  1034. driver->unbind(&udc->gadget);
  1035. udc->driver = NULL;
  1036. atmel_usba_stop(udc);
  1037. return 0;
  1038. }
  1039. static struct usba_ep *usba_udc_pdata(struct usba_platform_data *pdata,
  1040. struct usba_udc *udc)
  1041. {
  1042. struct usba_ep *eps;
  1043. int i;
  1044. eps = malloc(sizeof(struct usba_ep) * pdata->num_ep);
  1045. if (!eps) {
  1046. error("failed to alloc eps\n");
  1047. return NULL;
  1048. }
  1049. udc->gadget.ep0 = &eps[0].ep;
  1050. INIT_LIST_HEAD(&udc->gadget.ep_list);
  1051. INIT_LIST_HEAD(&eps[0].ep.ep_list);
  1052. for (i = 0; i < pdata->num_ep; i++) {
  1053. struct usba_ep *ep = &eps[i];
  1054. ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
  1055. ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
  1056. ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
  1057. ep->ep.ops = &usba_ep_ops;
  1058. ep->ep.name = pdata->ep[i].name;
  1059. ep->ep.maxpacket = pdata->ep[i].fifo_size;
  1060. ep->fifo_size = ep->ep.maxpacket;
  1061. ep->udc = udc;
  1062. INIT_LIST_HEAD(&ep->queue);
  1063. ep->nr_banks = pdata->ep[i].nr_banks;
  1064. ep->index = pdata->ep[i].index;
  1065. ep->can_dma = pdata->ep[i].can_dma;
  1066. ep->can_isoc = pdata->ep[i].can_isoc;
  1067. if (i)
  1068. list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
  1069. };
  1070. return eps;
  1071. }
  1072. int usba_udc_probe(struct usba_platform_data *pdata)
  1073. {
  1074. struct usba_udc *udc;
  1075. udc = &controller;
  1076. udc->usba_ep = usba_udc_pdata(pdata, udc);
  1077. return 0;
  1078. }