nyan-big.c 2.7 KB

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  1. /*
  2. * (C) Copyright 2014
  3. * NVIDIA Corporation <www.nvidia.com>
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #include <common.h>
  8. #include <errno.h>
  9. #include <asm/gpio.h>
  10. #include <asm/io.h>
  11. #include <asm/arch/pinmux.h>
  12. #include <asm/arch/clock.h>
  13. #include <asm/arch/mc.h>
  14. #include <asm/arch-tegra/clk_rst.h>
  15. #include <asm/arch-tegra/pmc.h>
  16. #include <power/as3722.h>
  17. #include <power/pmic.h>
  18. #include "pinmux-config-nyan-big.h"
  19. /*
  20. * Routine: pinmux_init
  21. * Description: Do individual peripheral pinmux configs
  22. */
  23. void pinmux_init(void)
  24. {
  25. gpio_config_table(nyan_big_gpio_inits,
  26. ARRAY_SIZE(nyan_big_gpio_inits));
  27. pinmux_config_pingrp_table(nyan_big_pingrps,
  28. ARRAY_SIZE(nyan_big_pingrps));
  29. pinmux_config_drvgrp_table(nyan_big_drvgrps,
  30. ARRAY_SIZE(nyan_big_drvgrps));
  31. }
  32. int tegra_board_id(void)
  33. {
  34. static const int vector[] = {GPIO_PQ3, GPIO_PT1, GPIO_PX1,
  35. GPIO_PX4, -1};
  36. gpio_claim_vector(vector, "board_id%d");
  37. return gpio_get_values_as_int(vector);
  38. }
  39. int tegra_lcd_pmic_init(int board_id)
  40. {
  41. struct udevice *pmic;
  42. int ret;
  43. ret = as3722_get(&pmic);
  44. if (ret)
  45. return -ENOENT;
  46. if (board_id == 0)
  47. as3722_write(pmic, 0x00, 0x3c);
  48. else
  49. as3722_write(pmic, 0x00, 0x50);
  50. as3722_write(pmic, 0x12, 0x10);
  51. as3722_write(pmic, 0x0c, 0x07);
  52. as3722_write(pmic, 0x20, 0x10);
  53. return 0;
  54. }
  55. /* Setup required information for Linux kernel */
  56. static void setup_kernel_info(void)
  57. {
  58. struct mc_ctlr *mc = (void *)NV_PA_MC_BASE;
  59. /* The kernel graphics driver needs this region locked down */
  60. writel(0, &mc->mc_video_protect_bom);
  61. writel(0, &mc->mc_video_protect_size_mb);
  62. writel(1, &mc->mc_video_protect_reg_ctrl);
  63. }
  64. /*
  65. * We need to take ALL audio devices conntected to AHUB (AUDIO, APBIF,
  66. * I2S, DAM, AMX, ADX, SPDIF, AFC) out of reset and enable the clocks.
  67. * Otherwise reading AHUB devices will hang when the kernel boots.
  68. */
  69. static void enable_required_clocks(void)
  70. {
  71. static enum periph_id ids[] = {
  72. PERIPH_ID_I2S0,
  73. PERIPH_ID_I2S1,
  74. PERIPH_ID_I2S2,
  75. PERIPH_ID_I2S3,
  76. PERIPH_ID_I2S4,
  77. PERIPH_ID_AUDIO,
  78. PERIPH_ID_APBIF,
  79. PERIPH_ID_DAM0,
  80. PERIPH_ID_DAM1,
  81. PERIPH_ID_DAM2,
  82. PERIPH_ID_AMX0,
  83. PERIPH_ID_AMX1,
  84. PERIPH_ID_ADX0,
  85. PERIPH_ID_ADX1,
  86. PERIPH_ID_SPDIF,
  87. PERIPH_ID_AFC0,
  88. PERIPH_ID_AFC1,
  89. PERIPH_ID_AFC2,
  90. PERIPH_ID_AFC3,
  91. PERIPH_ID_AFC4,
  92. PERIPH_ID_AFC5,
  93. PERIPH_ID_EXTPERIPH1
  94. };
  95. int i;
  96. for (i = 0; i < ARRAY_SIZE(ids); i++)
  97. clock_enable(ids[i]);
  98. udelay(2);
  99. for (i = 0; i < ARRAY_SIZE(ids); i++)
  100. reset_set_enable(ids[i], 0);
  101. }
  102. int nvidia_board_init(void)
  103. {
  104. clock_start_periph_pll(PERIPH_ID_EXTPERIPH1, CLOCK_ID_OSC, 12000000);
  105. clock_start_periph_pll(PERIPH_ID_I2S1, CLOCK_ID_OSC, 1500000);
  106. /* For external MAX98090 audio codec */
  107. clock_external_output(1);
  108. setup_kernel_info();
  109. enable_required_clocks();
  110. return 0;
  111. }